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Avoid resetting bufreg

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This commit is contained in:
Olof Kindgren
2020-03-03 09:21:55 +01:00
parent c9a3c883f1
commit 3e9e25e984
2 changed files with 1 additions and 5 deletions
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5
rtl/serv_bufreg.v
View File

@@ -1,7 +1,6 @@
module serv_bufreg
(
input wire i_clk,
input wire i_rst,
input wire [4:2] i_cnt,
input wire [1:0] i_cnt_r,
input wire i_en,
@@ -28,9 +27,7 @@ module serv_bufreg
//Clear carry when not in INIT state
c_r <= c & i_init;
if (i_rst)
data <= 32'd0;
else if (i_en)
if (i_en)
data <= {(i_loop & !i_init) ? o_q : q, data[31:1]};
if ((i_cnt[4:2] == 3'd0) & i_cnt_r[0] & i_init)

1
rtl/serv_top.v
View File

@@ -250,7 +250,6 @@ module serv_top
serv_bufreg bufreg
(
.i_clk (clk),
.i_rst (i_rst),
.i_cnt (cnt[4:2]),
.i_cnt_r (cnt_r[1:0]),
.i_en (!bufreg_hold),