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olofk.serv/servant
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Olof Kindgren c9a3c883f1 Refactor testbench 
Introduce an intermediate common simulation toplevel for verilator
and other sims
2020-03-03 09:15:50 +01:00
..
ice40_pll.v
Refactor to separate serv and servant
2019-06-24 13:18:34 +02:00
servant_arbiter.v
Simplify servant_arbiter
2019-10-29 21:53:13 +01:00
servant_clock_gen.v
Refactor to separate serv and servant
2019-06-24 13:18:34 +02:00
servant_gpio.v
Allow readback of GPIO signal
2019-11-19 10:46:30 +01:00
servant_mux.v
Allow readback of GPIO signal
2019-11-19 10:46:30 +01:00
servant_ram_quartus.sv
Add quartus-friendly RAM implementation
2020-02-29 15:26:17 +01:00
servant_ram.v
Remove unused signals
2020-02-17 23:01:49 +01:00
servant_timer.v
Remove unused signals
2020-02-17 23:01:49 +01:00
servant.v
Refactor testbench
2020-03-03 09:15:50 +01:00
servclone10_clock_gen.v
Add cyc1000 target
2020-02-29 15:29:07 +01:00
servclone10.v
Add cyc1000 target
2020-02-29 15:29:07 +01:00
service.v
Fix typo in service reset signal
2019-07-22 22:56:27 +02:00
servix_clock_gen.v
xilinx PLL: allows to specify PLL output frequency (16 or 32 MHz)
2019-11-10 21:44:50 +01:00
servix.v
xilinx PLL: allows to specify PLL output frequency (16 or 32 MHz)
2019-11-10 21:44:50 +01:00