Olof Kindgren a960fd768b Remove redundant bufreg_loop control signal

2020-12-22 22:13:57 +01:00

..

conf.py

Add dependencies for building documentation

2020-08-16 00:18:49 +02:00

index.rst

Move ibus_cyc handling to serv_state

2020-12-02 16:19:34 +01:00

make.bat

Add initial documentation

2020-08-13 23:44:05 +02:00

Makefile

Add initial documentation

2020-08-13 23:44:05 +02:00

requirements.txt

Add dependencies for building documentation

2020-08-16 00:18:49 +02:00

serv_alu_int.png

Update ALU documentation

2020-08-16 23:25:09 +02:00

serv_alu.png

Add initial documentation

2020-08-13 23:44:05 +02:00

serv_bufreg_int.png

Remove redundant bufreg_loop control signal

2020-12-22 22:13:57 +01:00

serv_bufreg.png

Add initial documentation

2020-08-13 23:44:05 +02:00

serv_csr_int.png

Add serv_csr block diagram

2020-08-25 19:04:45 +02:00

serv_csr.png

Add initial documentation

2020-08-13 23:44:05 +02:00

serv_ctrl_int.png

Move ibus_cyc handling to serv_state

2020-12-02 16:19:34 +01:00

serv_ctrl.png

Move ibus_cyc handling to serv_state

2020-12-02 16:19:34 +01:00

serv_dataflow.png

Add schematic for serv_decode

2020-08-27 21:03:52 +02:00

serv_decode_int.png

Add schematic for serv_decode

2020-08-27 21:03:52 +02:00

serv_decode.png

Add schematic for serv_decode

2020-08-27 21:03:52 +02:00

serv_mem_if.png

Add initial documentation

2020-08-13 23:44:05 +02:00

serv_rf_top.png

Add initial documentation

2020-08-13 23:44:05 +02:00