f75592c5b8
17 777 740 - 17 777 742, read-only error address registers, and 17 777 764, a read-only System ID register, and are not handled in the CPU70_wr() routine, which means for these addresses the routine returns NXM, which then translates to "bus timeout" (no response to address), and then, as a result, trap to vector 4. That is incorrect, IMO. These locations are read-only yet the address gets decoded, and even though writing does not have any effect, the write routine for these addresses should return SCPE_OK.
Open SIMH machine simulator
This is the codebase of SIMH, a framework and collection of computer system simulators.
SIMH was created by Bob Supnik, originally at Digital Equipment Corporation, and extended by contributions of many other people. It is now an open source project, licensed under an MIT open source license (see LICENSE.txt for the specific wording). The project gatekeepers are the members of the SIMH Steering Group. We welcome and encourage contributions from all. Contributions will be covered by the project license.
The Open SIMH code base was taken from a code base maintained by Mark Pizzolato as of 12 May 2022. From that point onward there is no connection between that source and the Open SIMH code base. A detailed listing of features as of that point may be found in SIMH-V4-status.
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Do not contribute material taken from github.com/simh/simh unless you are the author of the material in question.