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Some floating point fixes.

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- Fixed immediate source operand of LDEXP, LD[IL][FD]
  which is an integer, unlike several other FPP instructions.
- Renamed floating point instruction formats so they match the
  instruction descriptions in the architecture handbook better.
This commit is contained in:
Olaf Seibert
2021-03-30 20:13:31 +02:00
parent b9b61a4659
commit 22fdaedded
7 changed files with 172 additions and 78 deletions
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22
assemble.c
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@@ -1626,7 +1626,7 @@ static int assemble(
* Handbook describes it as a destination, and MACRO11 V05.05 doesn't
* allow a FP literal argument.
*/
case OC_FPPSRC:
case OC_FPP_FSRC:
/* One fp immediate or a general addressing mode */ {
ADDR_MODE mode;
unsigned word;
@@ -1644,16 +1644,24 @@ static int assemble(
return CHECK_EOL;
#endif
case OC_FPPGENAC:
case OC_FPP_SRCAC:
case OC_FPP_FSRCAC:
/* One gen and one reg 0-3 */ {
ADDR_MODE mode;
EX_TREE *value;
unsigned reg;
unsigned word;
if (!get_fp_src_mode(cp, &cp, &mode)) {
report(stack->top, "Invalid addressing mode (1st operand)\n");
return 0;
if ((op->flags & OC_MASK) == OC_FPP_FSRCAC) {
if (!get_fp_src_mode(cp, &cp, &mode)) {
report(stack->top, "Invalid addressing mode (1st operand, fsrc)\n");
return 0;
}
} else {
if (!get_mode(cp, &cp, &mode)) {
report(stack->top, "Invalid addressing mode (1st operand)\n");
return 0;
}
}
cp = skipwhite(cp);
@@ -1684,8 +1692,8 @@ static int assemble(
}
return CHECK_EOL;
case OC_FPPACGEN:
/* One reg 0-3 and one gen */ {
case OC_FPP_ACFDST:
/* One reg 0-3 and one fdst */ {
ADDR_MODE mode;
EX_TREE *value;
unsigned reg;