Jim bffaa206bf CPUT4 halt at 10203 reveals that the field length register bits 60-64 ...

are the high-order bits of the length, not the low-order bits as I had
assumed.

2011-08-08 19:03:25 -04:00

devpnc.h

Initial PNC driver (no receive yet), added #ifdefs for trace, allow

2011-07-30 17:06:19 -04:00

dispatch.h

For CPUT4, add LPID (only checks restricted) and mark some other

2011-08-06 09:30:27 -04:00

ea32i.h

More performance tweeaks: get/put(16/32)r, eaxxx()

2007-09-15 00:00:00 -04:00

ea64v.h

Changes for gcc on OSX 10.6, cross compile on Intel

2011-07-18 09:31:14 -04:00

em.c

CPUT4 halt at 10203 reveals that the field length register bits 60-64

2011-08-08 19:03:25 -04:00

emdev.h

Initial PNC driver (no receive yet), added #ifdefs for trace, allow

2011-07-30 17:06:19 -04:00

fp.h

FP exceptions, -DNOREG for -O0 and -DBG compiles, perf tweaks, gcov

2007-10-12 00:00:00 -04:00

geom.h

licensing, sys console, fixed rare hang in sleep if IMPS goes to zero

2008-04-25 00:00:00 -04:00

makefile

Initial PNC driver (no receive yet), added #ifdefs for trace, allow

2011-07-30 17:06:19 -04:00

regs.h

FP exceptions, -DNOREG for -O0 and -DBG compiles, perf tweaks, gcov

2007-10-12 00:00:00 -04:00

swap.h

Add an inline swab option to swap.h

2011-06-19 08:56:11 -04:00

Description

Prime 50-Series Emulator

14 MiB

Languages

C 97.8%

Roff 1.7%

Python 0.3%

Makefile 0.2%