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CPUT4 halt at 10203 reveals that the field length register bits 60-64

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are the high-order bits of the length, not the low-order bits as I had
assumed.
This commit is contained in:
Jim
2011-08-08 19:03:25 -04:00
parent 687d068335
commit bffaa206bf
1 changed files with 2 additions and 2 deletions
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4
em.c
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@@ -3817,8 +3817,8 @@ static sssn() {
/* Character instructions */
#define GETFLR(n) (((crsl[FLR0+2*(n)] >> 11) & 0x1FFFE0) | (crsl[FLR0+2*(n)] & 0x1F))
#define PUTFLR(n,v) crsl[FLR0+2*(n)] = (((v) << 11) & 0xFFFF0000) | (crsl[FLR0+2*(n)] & 0xF000) | ((v) & 0x1F)
#define GETFLR(n) ((crsl[FLR0+2*(n)] >> 16) | ((crsl[FLR0+2*(n)] & 0x1F) << 16))
#define PUTFLR(n,v) crsl[FLR0+2*(n)] = (((v) << 16) | (crsl[FLR0+2*(n)] & 0xF000) | (((v) >> 16) & 0x1F))
static inline unsigned short ldc(int n, unsigned short result) {
unsigned int utempl;