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Jim d99d16932d More performance tweeaks: get/put(16/32)r, eaxxx()
changed get/put(16,32)r to check for ring change and use regular
  get/put call if possible, so brp supercache can be used
FUTURE: could add separate brp cache entry for R0 accesses
changed ea32r64r live register test so normal path is first
changed ea64v live register test so normal path is first
change ea32i to use INCRP macro instead of RPL++
2007-09-15 00:00:00 -04:00
Description
Prime 50-Series Emulator
14 MiB
Languages
C 97.8%
Roff 1.7%
Python 0.3%
Makefile 0.2%