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mirror of https://github.com/rcornwell/sims.git synced 2026-04-14 23:58:21 +00:00

I7000: Updated more coverity errors.

This commit is contained in:
Richard Cornwell
2017-03-14 23:35:11 -04:00
parent 7360bb87bb
commit c76ad0296d
11 changed files with 27 additions and 19 deletions

View File

@@ -249,7 +249,7 @@ t_stat htc_srv(UNIT * uptr)
/* Handle sense on unit */
if (chan_test(chan, CTL_SNS)) {
uint8 ch;
uint8 ch = 0;
int eor = 0;
int i;
UNIT *up;

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@@ -773,6 +773,8 @@ t_stat mt_srv(UNIT * uptr)
case MT_RDS:
mode = 0100;
/* Fall through */
case MT_RDSB:
#ifndef I7010
/* Post EOR */

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@@ -147,7 +147,7 @@ struct urec_t {
t_stat
set_urec(UNIT * uptr, int32 val, CONST char *cptr, void *desc)
{
int chan = UNIT_G_CHAN(uptr->flags);
int chan;
int i;
if (cptr == NULL)
@@ -155,6 +155,7 @@ set_urec(UNIT * uptr, int32 val, CONST char *cptr, void *desc)
if (uptr == NULL)
return SCPE_IERR;
chan = UNIT_G_CHAN(uptr->flags);
for(i = 0; urec_devs[i].name != NULL; i++)
if (strcmp(cptr, urec_devs[i].name) == 0)
break;
@@ -168,11 +169,12 @@ set_urec(UNIT * uptr, int32 val, CONST char *cptr, void *desc)
t_stat
get_urec(FILE * st, UNIT * uptr, int32 v, CONST void *desc)
{
int chan = UNIT_G_CHAN(uptr->flags);
int chan;
int i;
if (uptr == NULL)
return SCPE_IERR;
chan = UNIT_G_CHAN(uptr->flags);
if (irqdev[chan] == 0) {
fprintf(st, "UREC=NONE");
return SCPE_OK;

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@@ -434,6 +434,7 @@ store:
goto iadd;
case 5: /* SUB */
SR ^= MSIGN;
/* Fall through */
case 9: /* ADD */
iadd:
f = 0;

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@@ -439,7 +439,7 @@ parse_sym(CONST char *cptr, t_addr addr, UNIT * uptr, t_value * val, int32 sw)
cptr = get_glyph(cptr, opcode, ',');
tag = parse_addr(&cpu_dev, opcode, &arg);
if (*arg != opcode[0])
d += (t_uint64)tag;
d += (t_value)tag;
} while (*cptr == ',');
if (*cptr != '\0')
return STOP_UUO;

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@@ -816,7 +816,7 @@ chan_trap:
if (chan_flags[chan] & DEV_FULL) {
/* Check if record mark */
if ((cmd[chan] & CHN_RECORD) &&
(assembly[chan] & DMASK) == ASIGN &&
(assembly[chan] & SMASK) == ASIGN &&
(assembly[chan] & 0xFF) == RM_CHAR) {
break;
}

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@@ -163,7 +163,7 @@ REG cpu_reg[] = {
MTAB cpu_mod[] = {
{UNIT_MODEL, MODEL(0x0), "7070", "7070", NULL, NULL, NULL},
{UNIT_MODEL, MODEL(0x1), "7074", "7074", NULL, NULL, NULL},
{UNIT_MSIZE, MEMAMOUNT(0), "5K", "5K", &cpu_set_size},
{UNIT_MSIZE, MEMAMOUNT(0), "5K", "5K", &cpu_set_size},
{UNIT_MSIZE, MEMAMOUNT(1), "10K", "10K", &cpu_set_size},
{UNIT_MSIZE, MEMAMOUNT(2), "15K", "15K", &cpu_set_size},
{UNIT_MSIZE, MEMAMOUNT(3), "20K", "20K", &cpu_set_size},
@@ -1015,6 +1015,7 @@ sim_instr(void)
/* fall through */
case OP_HP:
reason = STOP_HALT;
/* fall through */
case OP_NOP:
/* fall through */
if (hst_lnt) { /* history enabled? */
@@ -2818,7 +2819,7 @@ rtc_reset(DEVICE * dptr)
t_stat
cpu_ex(t_value * vptr, t_addr addr, UNIT * uptr, int32 sw)
{
if (addr >= MEMSIZE)
if (addr > MEMSIZE)
return SCPE_NXM;
if (vptr != NULL)
*vptr = M[addr];
@@ -2831,7 +2832,7 @@ cpu_ex(t_value * vptr, t_addr addr, UNIT * uptr, int32 sw)
t_stat
cpu_dep(t_value val, t_addr addr, UNIT * uptr, int32 sw)
{
if (addr >= MEMSIZE)
if (addr > MEMSIZE)
return SCPE_NXM;
M[addr] = val;
return SCPE_OK;
@@ -2849,12 +2850,12 @@ cpu_set_size(UNIT * uptr, int32 val, CONST char *cptr, void *desc)
val = (val + 1) * 5000;
if ((val < 0) || (val > MAXMEMSIZE))
return SCPE_ARG;
for (i = val; i < MEMSIZE; i++)
for (i = val; i < (MEMSIZE-1); i++)
mc |= M[i];
if ((mc != 0) && (!get_yn("Really truncate memory [N]?", FALSE)))
return SCPE_OK;
MEMSIZE = val;
for (i = MEMSIZE; i < MAXMEMSIZE; i++)
for (i = MEMSIZE-1; i < (MAXMEMSIZE-1); i++)
M[i] = 0;
return SCPE_OK;
}

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@@ -761,14 +761,14 @@ void chan_clear_attn_inq(int chan) {
int
chan_cmd(uint16 dev, uint16 dcmd, uint32 addr)
{
uint32 chan;
int chan;
int unit;
t_stat r;
int op;
/* Find device on given channel and give it the command */
chan = chan_mapdev(dev);
if (chan < 0 || chan >= NUM_CHAN)
if (chan < 0 || chan > NUM_CHAN)
return SCPE_IOERR;
/* If no channel device, quick exit */
if (chan_unit[chan].flags & UNIT_DIS)

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@@ -1705,8 +1705,9 @@ stop_cpu:
if ((flags & LOWFLAG) == 0)
break;
while ((cr1 = ReadP(MA, MCHCHK)) != CHR_RM ||
cr1 != CHR_GM)
cr1 != CHR_GM) {
Next(MA);
}
} while(cr1 != CHR_GM);
MAC2 = MA;
break;
@@ -2987,7 +2988,7 @@ step6:
if (AC[tsac] != 10)
remtrig = 1;
tsac = next_addr[tsac];
};
}
goto step6;
step8:
smt = 0;
@@ -3150,7 +3151,7 @@ void
mem_init() {
int i;
/* Force memory to be blanks on load */
for(i = 0; i < MAXMEMSIZE; i++)
for(i = 0; i < (MAXMEMSIZE-1); i++)
M[i] = CHR_BLANK;
MEMSIZE = (((cpu_unit.flags & UNIT_MSIZE) >> UNIT_V_MSIZE) + 1) * 10000;
EMEMSIZE = MEMSIZE;
@@ -3261,14 +3262,14 @@ cpu_set_size(UNIT * uptr, int32 val, CONST char *cptr, void *desc)
size *= 10000;
if (size > MAXMEMSIZE)
return SCPE_ARG;
for (i = size; i < MEMSIZE; i++)
for (i = size; i < (MEMSIZE-1); i++)
mc |= M[i];
if ((mc != 0) && (!get_yn("Really truncate memory [N]?", FALSE)))
return SCPE_OK;
cpu_unit.flags &= ~UNIT_MSIZE;
cpu_unit.flags |= val;
EMEMSIZE = MEMSIZE = size;
for (i = MEMSIZE; i < MAXMEMSIZE; i++)
for (i = MEMSIZE - 1; i < (MAXMEMSIZE-1); i++)
M[i] = CHR_BLANK;
return SCPE_OK;
}

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@@ -1447,6 +1447,7 @@ prottrap:
case OP_HTR:
/* Stop at HTR instruction if trapped */
IC--;
/* Fall through */
case OP_HPR:
halt:
hltinst = 1;

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@@ -41,7 +41,7 @@ uint32 hsdrm_cmd(UNIT *, uint16, uint16);
t_stat hsdrm_srv(UNIT *);
void hsdrm_ini(UNIT *, t_bool);
t_stat hsdrm_reset(DEVICE *);
uint32 hsdrm_addr; /* Read/write drum address */
t_uint64 hsdrm_addr; /* Read/write drum address */
t_stat set_hunits(UNIT * uptr, int32 val, CONST char *cptr, void *desc);
t_stat get_hunits(FILE * st, UNIT * uptr, int32 v, CONST void *desc);
t_stat hsdrm_attach(UNIT * uptr, CONST char *file);
@@ -150,7 +150,7 @@ t_stat hsdrm_srv(UNIT * uptr)
(uptr->u5 & DRMSTA_READ) ? "read" : "write",
addr, buf[addr]);
hsdrm_addr++;
hsdrm_addr &= 070007077777;
hsdrm_addr &= 070007077777LL;
if ((hsdrm_addr & (2048 - 1)) == 0)
chan_set(chan, DEV_REOR);
break;