1
0
mirror of synced 2026-01-18 00:42:34 +00:00
This commit is contained in:
Romain Dolbeau 2021-01-23 12:01:34 +01:00
parent 5986a8e30b
commit 64ddf0f1c3

View File

@ -10,6 +10,16 @@ I'm a software guy and know next to nothing about hardware design, so this is ve
To save on PCB cost, the board is smaller than a 'true' SBus board; the hardware directory includes an OpenSCAD 3D-printable extension to make the board compliant to the form factor (visible in the pictures in 'Pictures').
## Current status
2021-01-23: The adapter board seems to work fine in two different SS20. Currently the embedded PROM code exposes three devices in the FPGA:
* "RDOL,cryptoengine": exposes a (way too large) polynomial multiplier to implement GCM mode and a AES block. Currently used to implement DMA-based acceleration of AES-256-CBC through /dev/crypto. Unfortunately OpenSSL doesn't support AES-256-GCM in the cryptodev engine, and disagree with NetBSD's /dev/crypto on how to implement AES-256-CTR. And the default SSH cannot use cryptodev, it closes all file descriptors after cryptodev has opened /dev/crypto... still WiP.
* "RDOL,trng": exposes a 5 MHz counter (didn't realize the SS20 already had a good counter) and a so-far-not-true TRNG (implemented by a PRNG). The 'true' random generators I've found make Vivado screams very loudly when synthesizing... anyway both works fine in NetBSD 9.0 as a timecounter and an entropy source. still WiP.
* "RDOL,sdcard": trying to expose the micro-sd card slot as a storage device, at first using SPI mode. Not working, as I can't reliably get the FPGA to read from the micro-sd card in SPI mode. Frustratingly, the HW should be fine: a [Linux--on-LiteX-VexRiscV SoC](https://github.com/litex-hub/linux-on-litex-vexriscv) has no issue loading both the kernel and the filesystem image from a micro-sd card, using native SD mode - though it won't read the card in SPI mode either. Very much WiP.
## The hardware
Directory 'sbus-to-ztex'