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typos

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Romain Dolbeau 2022-12-11 14:37:23 +01:00
parent e7089c961d
commit a60b731d72
1 changed files with 4 additions and 4 deletions
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8
sbus-to-ztex-gateware/sbus-to-ztex-timings-V1_2.xdc
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@ -164,10 +164,10 @@ set_input_delay -clock SBUS_3V3_CLK -min 0.658 [get_ports {SBUS_3V3_PA[3]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.127 [get_ports {SBUS_3V3_PA[3]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.656 [get_ports {SBUS_3V3_PA[2]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.125 [get_ports {SBUS_3V3_PA[2]}]
set_input_delay -clock SBUS_3V3_CLK -min 0.688 [get_ports {SBUS_3V3_EERs}]
set_input_delay -clock SBUS_3V3_CLK -max 25.167 [get_ports {SBUS_3V3_EERs}]
set_output_delay -clock SBUS_3V3_CLK -min -1.888 [get_ports {SBUS_3V3_EERs}]
set_output_delay -clock SBUS_3V3_CLK -max 21.316 [get_ports {SBUS_3V3_EERs}]
set_input_delay -clock SBUS_3V3_CLK -min 0.688 [get_ports {SBUS_3V3_ERRs}]
set_input_delay -clock SBUS_3V3_CLK -max 25.167 [get_ports {SBUS_3V3_ERRs}]
set_output_delay -clock SBUS_3V3_CLK -min -1.888 [get_ports {SBUS_3V3_ERRs}]
set_output_delay -clock SBUS_3V3_CLK -max 21.316 [get_ports {SBUS_3V3_ERRs}]
set_input_delay -clock SBUS_3V3_CLK -min 0.679 [get_ports {SBUS_3V3_PA[4]}]
set_input_delay -clock SBUS_3V3_CLK -max 25.155 [get_ports {SBUS_3V3_PA[4]}]