Romain Dolbeau aea1865b7b commit the neorv32trgn-based trng

2021-07-20 07:45:51 -04:00

..

forth_to_migen_rom.sh

prom

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neorv32_trng_patched.vhd

commit the neorv32trgn-based trng

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netbsd_csr.h

commit the neorv32trgn-based trng

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prom_csr.fth

commit the neorv32trgn-based trng

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prom_migen.bth

prom

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prom_migen.fth

commit the neorv32trgn-based trng

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sbus_to_fpga_blk_dma.py

cleaning up some stuff, disable USB Host for testing SDRAM disk

2021-07-18 10:19:53 -04:00

sbus_to_fpga_export.py

commit the neorv32trgn-based trng

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sbus_to_fpga_fsm.py

re-enable USB in PROM, make sure the SDRAM request don't inadvertently kill the USB request

2021-07-18 12:44:48 -04:00

sbus_to_fpga_soc.py

commit the neorv32trgn-based trng

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sbus_to_fpga_trng.py

commit the neorv32trgn-based trng

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sdram_csr.fth

prom

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sdram_init.fth

prom

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ztex213_sbus.py

read PROM from Wishbone (simplify things, save resources as it was mapped there already anyway), add sd_card (unused, un-promed yet)

2021-07-14 08:30:27 -04:00