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cpu_basic.mac update section B,C, now complete
This commit is contained in:
wfjm
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commit
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@ -1,4 +1,4 @@
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# $Id: tb_pdp11core_stim.dat 1191 2019-07-13 17:21:02Z mueller $
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# $Id: tb_pdp11core_stim.dat 1251 2022-07-11 06:31:00Z mueller $
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# SPDX-License-Identifier: GPL-3.0-or-later
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# Copyright 2007-2016 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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#
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@ -50,6 +50,7 @@
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#
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C "Code 0" Some elementary initial tests
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C write registers
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# ==> now tested with cp/test_cp_gpr.tcl
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#
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wr0 000001 -- set r0,..,r7
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wr1 000101 --
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@ -61,6 +62,7 @@ wsp 000601 --
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wpc 000701 --
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#
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C read registers
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# ==> now tested with cp/test_cp_gpr.tcl
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#
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rr0 d=000001 -- ! r0
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rr1 d=000101 -- ! r1
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@ -72,6 +74,7 @@ rsp d=000601 -- ! sp
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rpc d=000701 -- ! pc
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#
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C write memory
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# ==> now tested with cp/test_cp_membasics.tcl
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#
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wal 002000 -- write mem(2000,...,2006)
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bwm 4
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@ -81,6 +84,7 @@ bwm 4
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007730 --
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#
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C read memory
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# ==> now tested with cp/test_cp_membasics.tcl
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#
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wal 002000
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brm 4
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@ -91,6 +95,7 @@ brm 4
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#
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C write/read PSW via various mechanisms
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C via wps/rps
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# ==> now tested with cp/cp/test_cp_psw.tcl
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#
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wps 000017
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rps d=000017
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@ -98,6 +103,7 @@ wps 000000
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rps d=000000
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#
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C via 16bit cp addressing (wal 177776)
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# ==> now tested with cp/test_cp_psw.tcl
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#
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wal 177776
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wm 000017 -- set all cc flags in psw
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@ -108,6 +114,7 @@ rm d=000000 -- ! psw
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rps d=000000
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#
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C via 22bit cp addressing (wal 177776; wah 177)
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# ==> now tested with cp/test_cp_psw.tcl
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#
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wal 177776
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wah 000177
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@ -119,6 +126,7 @@ rm d=000000 -- ! psw
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rps d=000000
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#
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C via ibr (ibrb 177700)
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# ==> now tested with cp/test_cp_psw.tcl
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#
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wibr 177776 000017 -- set all cc flags in psw
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ribr 177776 d=000017 -- ! psw
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@ -128,6 +136,7 @@ ribr 177776 d=000000 -- ! psw
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rps d=000000
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#
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C write register set 1, sm,um stack
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# ==> now tested with cp/test_cp_gpr.tcl
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#
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wps 004000 -- psw: cm=kernel, set=1
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wr0 010001 -- set r0,..,r5 [[r10]]
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@ -142,6 +151,7 @@ wps 144000 -- psw: cm=user(11),set=1
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wsp 110601 -- set usp [[usp]]
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#
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C read all registers set 0/1, km,sm,um stack
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# ==> now tested with cp/test_cp_gpr.tcl
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#
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wps 000000 -- psw: cm=kernel(00),set=0
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rr0 d=000001 -- ! r0
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@ -165,6 +175,7 @@ rr4 d=010401 -- ! r4 [[r14]]
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rr5 d=010501 -- ! r5 [[r15]]
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#
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C write IB space: MMU SAR supervisor mode (16 bit regs)
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# ==> now tested with cp/test_cp_ibrbasics.tcl
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#
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wal 172240 -- set first three SM I space address regs
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bwm 3
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@ -173,6 +184,7 @@ bwm 3
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012344
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#
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C read IB space: MMU SAR supervisor mode (16 bit regs)
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# ==> now tested with cp/test_cp_ibrbasics.tcl
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#
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wal 172240 -- ! verify first three SM I space address regs
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brm 3
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@ -181,6 +193,7 @@ brm 3
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d=012344
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#
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C read IB space via ibr: MMU SAR supervisor mode (16 bit regs)
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# ==> now tested with cp/test_cp_ibrbasics.tcl
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#
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ribr 172240 d=012340
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ribr 172242 d=012342
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@ -943,6 +956,7 @@ rpc d=003542 -- !
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# Setup code 14 --- code 14 doesn't exist anymore...
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#-----------------------------------------------------------------------------
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C Setup code 15 [base 3600; use 36-37] (test 4 traps)
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# ==> now tested with test_w11a_inst_traps.tcl
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#
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wal 003600 -- code:
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bwm 5
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@ -1143,7 +1157,7 @@ bwm 32
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005524 -- adc (r4)+ (#200)
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160124 -- sub r1,(r4)+ (#4711, #4700)
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005624 -- sbc (r4)+ (#200)
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000324 -- swap (r4)+ (#111000)
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000324 -- swab (r4)+ (#111000)
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006724 -- sxt (r4)+ (#111111 with N=1)
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074124 -- xor r1,(r4)+ (#070707,#4711)
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006724 -- sxt (r4)+ (#111111 with N=0)
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@ -1246,7 +1260,7 @@ brm 31
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d=000201 -- ! mem(4360)=000201; adc (r4)+ (#200)
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d=177770 -- ! mem(4362)=177770; sub r1,(r4)+ (#4711, #4701)
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d=000177 -- ! mem(4364)=000177; sbc (r4)+ (#200)
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d=000222 -- ! mem(4366)=000222; swap (r4)+ (#111000)
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d=000222 -- ! mem(4366)=000222; swab (r4)+ (#111000)
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d=177777 -- ! mem(4370)=177777; sxt (r4)+ (#111111)
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d=074016 -- ! mem(4372)=074016; xor r1,(r4)+ (#070707)
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d=000000 -- ! mem(4374)=000000; sxt (r4)+ (#111111)
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@ -1280,7 +1294,7 @@ brm 31
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d=000020 -- ! mem(4560)=0000; adc (r4)+ (#200)
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d=000031 -- ! mem(4562)=N00C; sub r1,(r4)+ (#4711, #4701)
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d=000020 -- ! mem(4564)=0000; sbc (r4)+ (#200)
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d=000030 -- ! mem(4566)=N000; swap (r4)+ (#111000)
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d=000030 -- ! mem(4566)=N000; swab (r4)+ (#111000)
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d=000030 -- ! mem(4570)=N000; sxt (r4)+ (#111111 with N=1)
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d=000020 -- ! mem(4572)=0000; xor r1,(r4)+ (#4711, #070707)
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d=000024 -- ! mem(4574)=0Z00; sxt (r4)+ (#111111 with N=0)
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@ -1887,7 +1901,7 @@ bwm 68
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006203 -- asr r3
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006203 -- asr r3
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160312 -- sub r3,(r2) ; correct register contents
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000300 -- swap r0
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000300 -- swab r0
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077114 -- sob r1,L1 (.-12)
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052737 -- bis #004000,psw
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004000
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@ -2149,6 +2163,7 @@ bwm 14
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#
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C Exec code 23 (test cmp and conditional branch)
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C Exec test 23.1 (explict cc setting)
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# ==> now tested with cpu_basics.mac:A1.2
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#
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wr0 006200 -- r0=6200 (input data)
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wr1 000005 -- r1=5
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@ -2177,6 +2192,7 @@ brm 10
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d=053244 -- ! mem(6322) 5 BNE,BLT,BLE,BMI,BHI,BVC,BCC
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#
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C Exec test 23.2 (tst testing)
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# ==> now tested with cpu_basics.mac:A1.2
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#
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wr0 006220 -- r0=6220 (input data)
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wr1 000003 -- r1=3
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@ -3765,6 +3781,7 @@ brm 11
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d=000002 -- 100000, 077777 --> nzvc=0010
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#-----------------------------------------------------------------------------
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C Setup code 37 [base 12300] (systematic DIV test)
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# ==> now tested with cpu_eis.mac:A*
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#
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wal 012300 -- code:
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bwm 9
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@ -3793,11 +3810,11 @@ bwm 57
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000000 -- 0, 6, 2, 0, 3, 0# 6/ 2 -> 0000 3 0
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000006 --
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000002 --
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000000 -- 0, 4, -2, 10, -2, 0# 4/-2 ->1000 -2 0
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000000 -- 0, 4, -2, 10, -2, 0# 4/-2 -> 1000 -2 0
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000004 --
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177776 --
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#36030
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000002 -- 2, 0, 1, 2, 2, 0# 0x20000 / 1
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000002 -- 2, 0, 1, 2, 2, 0# 0x20000 / 1
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000000 --
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000001 --
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000002 -- 2, 0, -2, 12, 2, 0# 0x20000 / -2
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@ -3873,7 +3890,7 @@ brm 57
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d=177776 --!
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d=000000 --!
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#37030
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d=000002 --! 2, 0, 1, 2, 2, 0# 0x20000 / 1
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d=000002 --! 2, 0, 1, 2, 2, 0# 0x20000 / 1
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d=000002 --!
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d=000000 --!
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d=000012 --! 2, 0, -2, 12, 2, 0# 0x20000 / -2
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@ -5837,6 +5854,7 @@ bwm 9
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#----
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C Exec code 46 pass 1 (systematic result+cc test of 1+2op instructions; word)
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C Exec test 46.1wr: COM - reg
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# ==> tested now with cpu_basics.mac:B3.*
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#
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wal 036000 -- setup test vector: for com,inc,dec,neg,adc,sbc,tst
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bwm 5
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@ -5875,6 +5893,7 @@ brm 10
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d=000000 -- !
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#--------
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C Exec test 46.1wm: COM - mem
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# ==> tested now with cpu_basics.mac:B3.*
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#
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wal 013224 -- setup test instructions:
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bwm 2
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@ -5906,6 +5925,7 @@ brm 10
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d=000000 -- !
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#--------
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C Exec test 46.2wrc0: INC - reg,C=0
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# ==> now tested with cpu_basics.mac:B1.*
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#
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wal 013204 -- setup test instructions:
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bwm 2
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@ -5937,6 +5957,7 @@ brm 10
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d=000000 -- !
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#--------
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C Exec test 46.2wrc1: INC - reg,C=1
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# ==> now tested with cpu_basics.mac:B1.*
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#
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wal 013204 -- setup test instructions:
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bwm 2
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@ -5968,6 +5989,7 @@ brm 10
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d=000000 -- !
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#--------
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C Exec test 46.3wrc0: DEC - reg,C=0
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# ==> now tested with cpu_basics.mac:B2.*
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#
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wal 013204 -- setup test instructions:
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bwm 2
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@ -5999,6 +6021,7 @@ brm 10
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d=177776 -- !
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#--------
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C Exec test 46.3wrc1: DEC - reg,C=1
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# ==> now tested with cpu_basics.mac:B2.*
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#
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wal 013204 -- setup test instructions:
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bwm 2
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@ -6030,6 +6053,7 @@ brm 10
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d=177776 -- !
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#--------
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C Exec test 46.4wr: NEG - reg
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# ==> tested now with cou_basics.mac:B4.*
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#
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wal 013204 -- setup test instructions:
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bwm 2
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@ -6061,6 +6085,7 @@ brm 10
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d=000001 -- !
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#--------
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C Exec test 46.5wrc0: ADC - reg,C=0
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# ==> tested now with cou_basics.mac:B5.*
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#
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wal 013204 -- setup test instructions:
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bwm 2
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@ -6092,6 +6117,7 @@ brm 10
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d=177777 -- !
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#--------
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C Exec test 46.5wrc1: ADC - reg,C=1
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# ==> tested now with cou_basics.mac:B5.*
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#
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wal 013204 -- setup test instructions:
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bwm 2
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@ -6123,6 +6149,7 @@ brm 10
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d=000000 -- !
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#--------
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C Exec test 46.6wrc0: SBC - reg,C=0
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# ==> tested now with cou_basics.mac:B6.*
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#
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wal 013204 -- setup test instructions:
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bwm 2
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@ -6154,6 +6181,7 @@ brm 10
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d=177777 -- !
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#--------
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C Exec test 46.6wrc1: SBC - reg,C=1
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# ==> tested now with cou_basics.mac:B6.*
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#
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wal 013204 -- setup test instructions:
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bwm 2
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@ -6185,6 +6213,7 @@ brm 10
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d=177776 -- !
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#--------
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C Exec test 46.7wr: TST - reg
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# ==> tested now with cou_basics.mac:B7.*
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#
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wal 013204 -- setup test instructions:
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bwm 2
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@ -6216,6 +6245,7 @@ brm 10
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d=177777 -- !
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#--------
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C Exec test 46.7wm: TST - mem
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# ==> tested now with cou_basics.mac:B7.*
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#
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wal 013224 -- setup test instructions:
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bwm 2
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@ -6247,6 +6277,7 @@ brm 10
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d=177777 -- !
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#--------
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C Exec test 46.8wrc0: ROR - reg, C=0
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# ==> tested now with cou_basics.mac:B8.*
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#
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wal 036000 -- setup test vector: for ror,rol,ars,asl
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bwm 7
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@ -6291,6 +6322,7 @@ brm 14
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d=040040 -- !
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#--------
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C Exec test 46.8wrc1: ROR - reg, C=1
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# ==> tested now with cou_basics.mac:B8.*
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#
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wal 013204 -- setup test instructions:
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bwm 2
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@ -6326,6 +6358,7 @@ brm 14
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d=140040 -- !
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#--------
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C Exec test 46.9wrc0: ROL - reg, C=0
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# ==> tested now with cou_basics.mac:B9.*
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#
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wal 013204 -- setup test instructions:
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bwm 2
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@ -6361,6 +6394,7 @@ brm 14
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d=000200 -- !
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#--------
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C Exec test 46.9wrc1: ROL - reg, C=1
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# ==> tested now with cou_basics.mac:B9.*
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#
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wal 013204 -- setup test instructions:
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bwm 2
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@ -6396,6 +6430,7 @@ brm 14
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d=000201 -- !
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#--------
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C Exec test 46.10wrc0: ASR - reg, C=0
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# ==> tested now with cou_basics.mac:B10.*
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#
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wal 013204 -- setup test instructions:
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bwm 2
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@ -6431,6 +6466,7 @@ brm 14
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d=140040 -- !
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#--------
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C Exec test 46.10wrc1: ASR - reg, C=1
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# ==> tested now with cou_basics.mac:B10.*
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#
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wal 013204 -- setup test instructions:
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bwm 2
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@ -6466,6 +6502,7 @@ brm 14
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d=140040 -- !
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#--------
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C Exec test 46.11wrc0: ASL - reg, C=0
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# ==> tested now with cou_basics.mac:B11.*
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#
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wal 013204 -- setup test instructions:
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bwm 2
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@ -6501,6 +6538,7 @@ brm 14
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d=000200 -- !
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#--------
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C Exec test 46.11wrc1: ASL - reg, C=1
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# ==> tested now with cou_basics.mac:B11.*
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#
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wal 013204 -- setup test instructions:
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bwm 2
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@ -6536,6 +6574,7 @@ brm 14
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d=000200 -- !
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#--------
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C Exec test 46.12wrc0: MOV - reg, C=0
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# ==> tested now with cou_basics.mac:C7.*
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#
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wal 036000 -- setup test vector: for mov
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bwm 6
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@ -6571,6 +6610,7 @@ brm 6
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d=100000 -- !
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#--------
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C Exec test 46.12wrc1: MOV - reg, C=1
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# ==> tested now with cou_basics.mac:C7.*
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#
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wal 013246 -- setup test instructions:
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bwm 2
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@ -6598,6 +6638,7 @@ brm 6
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d=100000 -- !
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#--------
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C Exec test 46.12mc0: MOV - mem, C=0
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# ==> tested now with cou_basics.mac:C7.*
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#
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wal 013276 -- setup test instructions:
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bwm 2
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@ -6625,6 +6666,7 @@ brm 6
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d=100000 -- !
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#--------
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C Exec test 46.13wrc0: BIT - reg, C=0
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# ==> now tested with cpu_basics.mac:C6.*
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#
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wal 036000 -- setup test vector: for bit,bic,bis,xor
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bwm 12
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@ -6668,10 +6710,11 @@ brm 12
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d=001100 -- !
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d=000000 -- ! bit 110000,011000 -> n0z0v0c0; (010000)
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d=011000 -- !
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d=000010 -- ! bit 110000,110000 -> n1z0v0c0; (100000)
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d=000010 -- ! bit 110000,110000 -> n1z0v0c0; (110000)
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d=110000 -- !
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#--------
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C Exec test 46.13wrc1: BIT - reg, C=1
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# ==> now tested with cpu_basics.mac:C6.*
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#
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wal 013246 -- setup test instructions:
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bwm 2
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@ -6701,10 +6744,11 @@ brm 12
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d=001100 -- !
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d=000001 -- ! bit 110000,011000 -> n0z0v0c1; (010000)
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d=011000 -- !
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d=000011 -- ! bit 110000,110000 -> n1z0v0c1; (100000)
|
||||
d=000011 -- ! bit 110000,110000 -> n1z0v0c1; (110000)
|
||||
d=110000 -- !
|
||||
#--------
|
||||
C Exec test 46.13wmc0: BIT - mem, C=0
|
||||
# ==> now tested with cpu_basics.mac:C6.*
|
||||
#
|
||||
wal 013276 -- setup test instructions:
|
||||
bwm 2
|
||||
@ -6734,10 +6778,11 @@ brm 12
|
||||
d=001100 -- !
|
||||
d=000000 -- ! bit 110000,011000 -> n0z0v0c0; (010000)
|
||||
d=011000 -- !
|
||||
d=000010 -- ! bit 110000,110000 -> n1z0v0c0; (100000)
|
||||
d=000010 -- ! bit 110000,110000 -> n1z0v0c0; (110000)
|
||||
d=110000 -- !
|
||||
#--------
|
||||
C Exec test 46.14wrc0: BIC - reg, C=0
|
||||
# ==> now tested with cpu_basics.mac:C3.*
|
||||
#
|
||||
wal 013246 -- setup test instructions:
|
||||
bwm 2
|
||||
@ -6771,6 +6816,7 @@ brm 12
|
||||
d=000000 -- !
|
||||
#--------
|
||||
C Exec test 46.14wrc1: BIC - reg, C=1
|
||||
# ==> now tested with cpu_basics.mac:C3.*
|
||||
#
|
||||
wal 013246 -- setup test instructions:
|
||||
bwm 2
|
||||
@ -6804,6 +6850,7 @@ brm 12
|
||||
d=000000 -- !
|
||||
#--------
|
||||
C Exec test 46.14wrc0: BIC - mem, C=0
|
||||
# ==> now tested with cpu_basics.mac:C3.*
|
||||
#
|
||||
wal 013276 -- setup test instructions:
|
||||
bwm 2
|
||||
@ -6837,6 +6884,7 @@ brm 12
|
||||
d=000000 -- !
|
||||
#--------
|
||||
C Exec test 46.15wrc0: BIS - reg, C=0
|
||||
# ==> now tested with cpu_basics.mac:C4.*
|
||||
#
|
||||
wal 013246 -- setup test instructions:
|
||||
bwm 2
|
||||
@ -6870,6 +6918,7 @@ brm 12
|
||||
d=110000 -- !
|
||||
#--------
|
||||
C Exec test 46.15wrc1: BIS - reg, C=1
|
||||
# ==> now tested with cpu_basics.mac:C4.*
|
||||
#
|
||||
wal 013246 -- setup test instructions:
|
||||
bwm 2
|
||||
@ -6969,6 +7018,7 @@ brm 12
|
||||
d=000000 -- !
|
||||
#--------
|
||||
C Exec test 46.17wr: CMP - reg
|
||||
# ==> now tested with cpu_basic.mac:C5.*
|
||||
#
|
||||
wal 036000 -- setup test vector: for cmp,add,sub
|
||||
bwm 38
|
||||
@ -7068,6 +7118,7 @@ brm 38
|
||||
d=177777 -- !
|
||||
#--------
|
||||
C Exec test 46.18r: ADD - reg
|
||||
# ==> now tested with cpu_basics.mac:C1.*
|
||||
#
|
||||
wal 013246 -- setup test instructions:
|
||||
bwm 2
|
||||
@ -7127,6 +7178,7 @@ brm 38
|
||||
d=177776 -- !
|
||||
#--------
|
||||
C Exec test 46.19r: SUB - reg
|
||||
# ==> now tested with cpu_basics.mac:C2.*
|
||||
#
|
||||
wal 013246 -- setup test instructions:
|
||||
bwm 2
|
||||
@ -7185,23 +7237,24 @@ brm 38
|
||||
d=000004 -- ! sub 177777,177777 -> n0z1v0c0; 000000
|
||||
d=000000 -- !
|
||||
#
|
||||
C Exec test 46.20r: SWAP - reg
|
||||
C Exec test 46.20r: SWAB - reg
|
||||
# ==> now tested with cpu_basics.mac:B13.*
|
||||
#
|
||||
wal 036000 -- setup test vector: for swap
|
||||
wal 036000 -- setup test vector: for swab
|
||||
bwm 9
|
||||
000000 -- swap 000000
|
||||
000001 -- swap 000001
|
||||
000200 -- swap 000200
|
||||
000400 -- swap 000400
|
||||
100000 -- swap 100000
|
||||
000401 -- swap 000401
|
||||
000600 -- swap 000600
|
||||
100001 -- swap 100001
|
||||
100200 -- swap 100200
|
||||
000000 -- swab 000000
|
||||
000001 -- swab 000001
|
||||
000200 -- swab 000200
|
||||
000400 -- swab 000400
|
||||
100000 -- swab 100000
|
||||
000401 -- swab 000401
|
||||
000600 -- swab 000600
|
||||
100001 -- swab 100001
|
||||
100200 -- swab 100200
|
||||
wal 013204 -- setup test instructions:
|
||||
bwm 2
|
||||
000241 -- ccmov= clc
|
||||
000305 -- iut= swap r5
|
||||
000305 -- iut= swab r5
|
||||
wr0 177776 -- r0=177776
|
||||
wr1 000011 -- r1=11 (9.)
|
||||
wr2 036000 -- r2=36000
|
||||
@ -7216,23 +7269,23 @@ rpc d=013220 -- ! pc=halt
|
||||
rr1 d=000000 -- ! r1=0
|
||||
wal 037000 -- check result area (Note: N,Z from lsb of result)
|
||||
brm 18
|
||||
d=000004 -- ! swap 000000 -> n0z1v0c0; 000000
|
||||
d=000004 -- ! swab 000000 -> n0z1v0c0; 000000
|
||||
d=000000 -- !
|
||||
d=000004 -- ! swap 000001 -> n0z1v0c0; 000400
|
||||
d=000004 -- ! swab 000001 -> n0z1v0c0; 000400
|
||||
d=000400 -- !
|
||||
d=000004 -- ! swap 000200 -> n0z1v0c0; 100000
|
||||
d=000004 -- ! swab 000200 -> n0z1v0c0; 100000
|
||||
d=100000 -- !
|
||||
d=000000 -- ! swap 000400 -> n0z0v0c0; 000001
|
||||
d=000000 -- ! swab 000400 -> n0z0v0c0; 000001
|
||||
d=000001 -- !
|
||||
d=000010 -- ! swap 100000 -> n1z0v0c0; 000200
|
||||
d=000010 -- ! swab 100000 -> n1z0v0c0; 000200
|
||||
d=000200 -- !
|
||||
d=000000 -- ! swap 000401 -> n0z0v0c0; 000401
|
||||
d=000000 -- ! swab 000401 -> n0z0v0c0; 000401
|
||||
d=000401 -- !
|
||||
d=000000 -- ! swap 000600 -> n0z0v0c0; 100001
|
||||
d=000000 -- ! swab 000600 -> n0z0v0c0; 100001
|
||||
d=100001 -- !
|
||||
d=000010 -- ! swap 100001 -> n1z0v0c0; 000600
|
||||
d=000010 -- ! swab 100001 -> n1z0v0c0; 000600
|
||||
d=000600 -- !
|
||||
d=000010 -- ! swap 100200 -> n1z0v0c0; 100200
|
||||
d=000010 -- ! swab 100200 -> n1z0v0c0; 100200
|
||||
d=100200 -- !
|
||||
#--------
|
||||
C Exec code 46 pass 2 (systematic result+cc test of 1+2op instructions; byte)
|
||||
@ -8478,7 +8531,7 @@ brm 13
|
||||
d=005200 -- ! inc r0 ;
|
||||
d=000000 -- ! halt ;
|
||||
#
|
||||
C Exec test 47.1 (pipeline tester adapted from KDJ11A.MAC, test 121, p. 70)
|
||||
C Exec test 47.2 (pipeline tester adapted from KDJ11A.MAC, test 121, p. 70)
|
||||
#
|
||||
wr1 013474 -- r1=13474 (alternate halt)
|
||||
cres
|
||||
|
||||
@ -1,9 +1,10 @@
|
||||
; $Id: cpu_basics.mac 1249 2022-07-08 06:27:59Z mueller $
|
||||
; $Id: cpu_basics.mac 1252 2022-07-11 09:22:42Z mueller $
|
||||
; SPDX-License-Identifier: GPL-3.0-or-later
|
||||
; Copyright 2015- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
|
||||
; Copyright 2015-2022 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
|
||||
;
|
||||
; Revision History:
|
||||
; Date Rev Version Comment
|
||||
; 2022-07-10 1251 1.0 Initial version
|
||||
; 2015-08-30 710 0.1 First draft
|
||||
;
|
||||
; Test CPU basics
|
||||
@ -12,7 +13,7 @@
|
||||
;
|
||||
; Section A: ccops + flow control bxx, sob, jmp, jsr, rts, mark ==============
|
||||
;
|
||||
; Test A1.1 -- ccop + bxx ++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
; Test A1: ccop + bxx +++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
; This sub-section verifies
|
||||
; x xxx xxx xxx xxx xxx NZVC Instruction / Remark
|
||||
; 0 000 000 010 10n zvc NZVC CLx
|
||||
@ -36,13 +37,105 @@
|
||||
; 1 000 011 0bb bbb bbb ---- BCC if C = 0
|
||||
; 1 000 011 1bb bbb bbb ---- BCS if C = 1
|
||||
;
|
||||
; Test A1.1 -- ccop + psw ++++++++++++++++++++++++++++++++++++++++++++
|
||||
; This test sets and clears all four condition codes and verifies that
|
||||
; the psw properly reflects this.
|
||||
;
|
||||
ta0101: mov #cp.psw,r0
|
||||
clr (r0)
|
||||
;
|
||||
ccc ; nzvc = 0000
|
||||
cmp (r0),#cp0000
|
||||
beq .+4
|
||||
halt
|
||||
; sec
|
||||
ccc
|
||||
sec ; nzvc = 0001
|
||||
cmp (r0),#cp000c
|
||||
beq .+4
|
||||
halt
|
||||
; sev
|
||||
ccc
|
||||
sev ; nzvc = 0010
|
||||
cmp (r0),#cp00v0
|
||||
beq .+4
|
||||
halt
|
||||
; sez
|
||||
ccc
|
||||
sez ; nzvc = 0100
|
||||
cmp (r0),#cp0z00
|
||||
beq .+4
|
||||
halt
|
||||
; sen
|
||||
ccc
|
||||
sen ; nzvc = 1000
|
||||
cmp (r0),#cpn000
|
||||
beq .+4
|
||||
halt
|
||||
; sen!sec
|
||||
ccc
|
||||
<sen!sec> ; nzvc = 1001
|
||||
cmp (r0),#cpn00c
|
||||
beq .+4
|
||||
halt
|
||||
; sez!sev
|
||||
ccc
|
||||
<sez!sev> ; nzvc = 1001
|
||||
cmp (r0),#cp0zv0
|
||||
beq .+4
|
||||
halt
|
||||
;
|
||||
scc ; nzvc = 1111
|
||||
cmp (r0),#cpnzvc
|
||||
beq .+4
|
||||
halt
|
||||
; clc
|
||||
scc
|
||||
clc ; nzvc = 1110
|
||||
cmp (r0),#cpnzv0
|
||||
beq .+4
|
||||
halt
|
||||
; clv
|
||||
scc
|
||||
clv ; nzvc = 1101
|
||||
cmp (r0),#cpnz0c
|
||||
beq .+4
|
||||
halt
|
||||
; clz
|
||||
scc
|
||||
clz ; nzvc = 1011
|
||||
cmp (r0),#cpn0vc
|
||||
beq .+4
|
||||
halt
|
||||
; cln
|
||||
scc
|
||||
cln ; nzvc = 0111
|
||||
cmp (r0),#cp0zvc
|
||||
beq .+4
|
||||
halt
|
||||
; cln!clc
|
||||
scc
|
||||
<cln!clc> ; nzvc = 0110
|
||||
cmp (r0),#cp0zv0
|
||||
beq .+4
|
||||
halt
|
||||
; clz!clv
|
||||
scc
|
||||
<clz!clv> ; nzvc = 1001
|
||||
cmp (r0),#cpn00c
|
||||
beq .+4
|
||||
halt
|
||||
;
|
||||
9999$: iot ; end of test A1.1
|
||||
|
||||
; Test A1.2 -- ccop + bxx ++++++++++++++++++++++++++++++++++++++++++++
|
||||
; This test sets all possible combinations of condition code bits
|
||||
; (with cc ops) and verifies the branch instruction response
|
||||
; Note: after normal compares N will never be 1 if Z=1 (a number can not
|
||||
; zero and negative simultaneously). Thus not all combinations are
|
||||
; used in normal code execution.
|
||||
;
|
||||
ta0101: clr @#cp.psw
|
||||
ta0102: clr @#cp.psw
|
||||
;
|
||||
; case NZVC = 0000 -- N=0 Z=0 V=0 C=0 ------------------------
|
||||
;
|
||||
@ -619,73 +712,6 @@ ta0101: clr @#cp.psw
|
||||
1714$: br 9999$
|
||||
1799$: halt
|
||||
;
|
||||
;;;
|
||||
9999$: iot ; end of test A1.1
|
||||
;
|
||||
; Test A1.2 -- ccop + psw ++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
; This test sets and clears all four condition codes and verifies that
|
||||
; the psw properly reflects this.
|
||||
;
|
||||
ta0102: mov #cp.psw,r0
|
||||
clr (r0)
|
||||
;
|
||||
ccc ; nzvc = 0000
|
||||
cmp (r0),#cp0000
|
||||
beq .+4
|
||||
halt
|
||||
;
|
||||
ccc
|
||||
sec ; nzvc = 0001
|
||||
cmp (r0),#cp000c
|
||||
beq .+4
|
||||
halt
|
||||
;
|
||||
ccc
|
||||
sev ; nzvc = 0010
|
||||
cmp (r0),#cp00v0
|
||||
beq .+4
|
||||
halt
|
||||
;
|
||||
ccc
|
||||
sez ; nzvc = 0100
|
||||
cmp (r0),#cp0z00
|
||||
beq .+4
|
||||
halt
|
||||
;
|
||||
ccc
|
||||
sen ; nzvc = 1000
|
||||
cmp (r0),#cpn000
|
||||
beq .+4
|
||||
halt
|
||||
;
|
||||
scc ; nzvc = 1111
|
||||
cmp (r0),#cpnzvc
|
||||
beq .+4
|
||||
halt
|
||||
;
|
||||
scc
|
||||
clc ; nzvc = 1110
|
||||
cmp (r0),#cpnzv0
|
||||
beq .+4
|
||||
halt
|
||||
;
|
||||
scc
|
||||
clv ; nzvc = 1101
|
||||
cmp (r0),#cpnz0c
|
||||
beq .+4
|
||||
halt
|
||||
;
|
||||
scc
|
||||
clz ; nzvc = 1011
|
||||
cmp (r0),#cpn0vc
|
||||
beq .+4
|
||||
halt
|
||||
;
|
||||
scc
|
||||
cln ; nzvc = 0111
|
||||
cmp (r0),#cp0zvc
|
||||
beq .+4
|
||||
halt
|
||||
;
|
||||
9999$: iot ; end of test A1.2
|
||||
;
|
||||
@ -754,7 +780,7 @@ ta0201: mov #cp.psw,r5
|
||||
beq .+4
|
||||
halt
|
||||
;
|
||||
9999$: iot ; end of test A1.3
|
||||
9999$: iot ; end of test A2.1
|
||||
;
|
||||
; Test A3 -- jmp +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
; This sub-section verifies
|
||||
@ -897,7 +923,7 @@ top1wm: mov (r5),101$ ; setup cc setter
|
||||
rts pc
|
||||
;
|
||||
200$: .word 0
|
||||
;
|
||||
;
|
||||
; Test B1 -- inc +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
; This sub-section verifies
|
||||
; x xxx xxx xxx xxx xxx NZVC Instruction / Remark
|
||||
@ -906,9 +932,9 @@ top1wm: mov (r5),101$ ; setup cc setter
|
||||
; Test B1.1 -- inc instruction ++++++++++++++++++++++++++++++++++++++++
|
||||
;
|
||||
tb0101: clr cp.psw
|
||||
mov #1000$,r5 ; reg mode tests
|
||||
mov #1000$,r5 ; reg mode tests (with ccc)
|
||||
jsr pc,top1wr
|
||||
mov #2000$,r5 ; mem mode tests
|
||||
mov #2000$,r5 ; mem mode tests (with scc)
|
||||
jsr pc,top1wm
|
||||
jmp 9999$
|
||||
;
|
||||
@ -926,7 +952,7 @@ tb0101: clr cp.psw
|
||||
.word 100001, cpn000, 100002
|
||||
.word 177776, cpn000, 177777
|
||||
.word 177777, cp0z00, 000000
|
||||
1011$:
|
||||
1011$:
|
||||
;
|
||||
2000$: scc
|
||||
inc (r1)
|
||||
@ -942,21 +968,21 @@ tb0101: clr cp.psw
|
||||
.word 100001, cpn00c, 100002
|
||||
.word 177776, cpn00c, 177777
|
||||
.word 177777, cp0z0c, 000000
|
||||
2011$:
|
||||
2011$:
|
||||
;
|
||||
9999$: iot ; end of test B1.1
|
||||
;
|
||||
;
|
||||
; Test B2 -- dec +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
; This sub-section verifies
|
||||
; x xxx xxx xxx xxx xxx NZVC Instruction / Remark
|
||||
; 0 000 101 011 ddd ddd NZV- DEC
|
||||
;
|
||||
; Test B2.1 -- dec instruction ++++++++++++++++++++++++++++++++++++++++
|
||||
; Test B2.1 -- dec instruction +++++++++++++++++++++++++++++++++++++++
|
||||
;
|
||||
tb0201: clr cp.psw
|
||||
mov #1000$,r5 ; reg mode tests
|
||||
mov #1000$,r5 ; reg mode tests (with ccc)
|
||||
jsr pc,top1wr
|
||||
mov #2000$,r5 ; mem mode tests
|
||||
mov #2000$,r5 ; mem mode tests (with scc)
|
||||
jsr pc,top1wm
|
||||
jmp 9999$
|
||||
;
|
||||
@ -974,7 +1000,7 @@ tb0201: clr cp.psw
|
||||
.word 100001, cpn000, 100000
|
||||
.word 177776, cpn000, 177775
|
||||
.word 177777, cpn000, 177776
|
||||
1011$:
|
||||
1011$:
|
||||
;
|
||||
2000$: scc ; c=1
|
||||
dec (r1) ; dec preserves c, so stays 1
|
||||
@ -990,9 +1016,478 @@ tb0201: clr cp.psw
|
||||
.word 100001, cpn00c, 100000
|
||||
.word 177776, cpn00c, 177775
|
||||
.word 177777, cpn00c, 177776
|
||||
2011$:
|
||||
2011$:
|
||||
;
|
||||
9999$: iot ; end of test B2.1
|
||||
;
|
||||
; Test B3 -- com +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
; This sub-section verifies
|
||||
; x xxx xxx xxx xxx xxx NZVC Instruction / Remark
|
||||
; 0 000 101 001 ddd ddd NZ01 COM
|
||||
;
|
||||
; Test B3.1 -- com instruction +++++++++++++++++++++++++++++++++++++++
|
||||
;
|
||||
tb0301: clr cp.psw
|
||||
mov #1000$,r5 ; reg mode tests (with ccc)
|
||||
jsr pc,top1wr
|
||||
mov #2000$,r5 ; mem mode tests (with scc)
|
||||
jsr pc,top1wm
|
||||
jmp 9999$
|
||||
;
|
||||
1000$: ccc
|
||||
com r1
|
||||
.word 1010$
|
||||
.word 1011$
|
||||
;
|
||||
; olddst psw newdst
|
||||
1010$: .word 000000, cpn00c, 177777
|
||||
.word 000001, cpn00c, 177776
|
||||
.word 077777, cpn00c, 100000
|
||||
.word 100000, cp000c, 077777
|
||||
.word 177777, cp0z0c, 000000
|
||||
1011$:
|
||||
;
|
||||
2000$: scc
|
||||
com (r1)
|
||||
.word 1010$
|
||||
.word 1011$
|
||||
;
|
||||
9999$: iot ; end of test B3.1
|
||||
;
|
||||
; Test B4 -- neg +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
; This sub-section verifies
|
||||
; x xxx xxx xxx xxx xxx NZVC Instruction / Remark
|
||||
; 0 000 101 100 ddd ddd NZVC NEG
|
||||
;
|
||||
; Test B4.1 -- neg instruction +++++++++++++++++++++++++++++++++++++++
|
||||
;
|
||||
tb0401: clr cp.psw
|
||||
mov #1000$,r5 ; reg mode tests (with ccc)
|
||||
jsr pc,top1wr
|
||||
mov #2000$,r5 ; mem mode tests (with scc)
|
||||
jsr pc,top1wm
|
||||
jmp 9999$
|
||||
;
|
||||
1000$: ccc
|
||||
neg r1
|
||||
.word 1010$
|
||||
.word 1011$
|
||||
;
|
||||
; olddst psw newdst
|
||||
1010$: .word 000000, cp0z00, 000000
|
||||
.word 000001, cpn00c, 177777
|
||||
.word 077777, cpn00c, 100001
|
||||
.word 100000, cpn0vc, 100000
|
||||
.word 177777, cp000c, 000001
|
||||
1011$:
|
||||
;
|
||||
2000$: scc
|
||||
neg (r1)
|
||||
.word 1010$
|
||||
.word 1011$
|
||||
;
|
||||
9999$: iot ; end of test B4.1
|
||||
;
|
||||
; Test B5 -- adc +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
; This sub-section verifies
|
||||
; x xxx xxx xxx xxx xxx NZVC Instruction / Remark
|
||||
; 0 000 101 101 ddd ddd NZVC ADC
|
||||
;
|
||||
; Test B5.1 -- adc instruction +++++++++++++++++++++++++++++++++++++++
|
||||
;
|
||||
tb0501: clr cp.psw
|
||||
mov #1000$,r5 ; reg mode tests (with ccc; C=0)
|
||||
jsr pc,top1wr
|
||||
mov #2000$,r5 ; mem mode tests (with scc; C=1)
|
||||
jsr pc,top1wm
|
||||
jmp 9999$
|
||||
;
|
||||
1000$: ccc ; c=0
|
||||
adc r1
|
||||
.word 1010$
|
||||
.word 1011$
|
||||
;
|
||||
; olddst psw newdst
|
||||
1010$: .word 000000, cp0z00, 000000
|
||||
.word 000001, cp0000, 000001
|
||||
.word 077777, cp0000, 077777
|
||||
.word 100000, cpn000, 100000
|
||||
.word 177777, cpn000, 177777
|
||||
1011$:
|
||||
;
|
||||
2000$: scc ; c=1
|
||||
adc (r1)
|
||||
.word 2010$
|
||||
.word 2011$
|
||||
;
|
||||
; olddst psw newdst
|
||||
2010$: .word 000000, cp0000, 000001
|
||||
.word 000001, cp0000, 000002
|
||||
.word 077777, cpn0v0, 100000
|
||||
.word 100000, cpn000, 100001
|
||||
.word 177777, cp0z0c, 000000
|
||||
2011$:
|
||||
;
|
||||
9999$: iot ; end of test B5.1
|
||||
;
|
||||
; Test B6 -- sbc +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
; This sub-section verifies
|
||||
; x xxx xxx xxx xxx xxx NZVC Instruction / Remark
|
||||
; 0 000 101 110 ddd ddd NZVC SBC
|
||||
;
|
||||
; Test B6.1 -- sbc instruction +++++++++++++++++++++++++++++++++++++++
|
||||
;
|
||||
tb0601: clr cp.psw
|
||||
mov #1000$,r5 ; reg mode tests (with ccc; C=0)
|
||||
jsr pc,top1wr
|
||||
mov #2000$,r5 ; mem mode tests (with scc; C=1)
|
||||
jsr pc,top1wm
|
||||
jmp 9999$
|
||||
;
|
||||
1000$: ccc ; c=0
|
||||
sbc r1
|
||||
.word 1010$
|
||||
.word 1011$
|
||||
;
|
||||
; olddst psw newdst
|
||||
1010$: .word 000000, cp0z00, 000000
|
||||
.word 000001, cp0000, 000001
|
||||
.word 077777, cp0000, 077777
|
||||
.word 100000, cpn000, 100000
|
||||
.word 177777, cpn000, 177777
|
||||
1011$:
|
||||
;
|
||||
2000$: scc ; c=1
|
||||
sbc (r1)
|
||||
.word 2010$
|
||||
.word 2011$
|
||||
;
|
||||
; olddst psw newdst
|
||||
2010$: .word 000000, cpn00c, 177777
|
||||
.word 000001, cp0z00, 000000
|
||||
.word 077777, cp0000, 077776
|
||||
.word 100000, cp00v0, 077777
|
||||
.word 177777, cpn000, 177776
|
||||
2011$:
|
||||
;
|
||||
9999$: iot ; end of test B6.1
|
||||
;
|
||||
; Test B7 -- tst +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
; This sub-section verifies
|
||||
; x xxx xxx xxx xxx xxx NZVC Instruction / Remark
|
||||
; 0 000 101 111 ddd ddd NZ00 TST
|
||||
;
|
||||
; Test B7.1 -- tst instruction +++++++++++++++++++++++++++++++++++++++
|
||||
;
|
||||
tb0701: clr cp.psw
|
||||
mov #1000$,r5 ; reg mode tests (with ccc)
|
||||
jsr pc,top1wr
|
||||
mov #2000$,r5 ; mem mode tests (with scc)
|
||||
jsr pc,top1wm
|
||||
jmp 9999$
|
||||
;
|
||||
1000$: ccc
|
||||
tst r1
|
||||
.word 1010$
|
||||
.word 1011$
|
||||
;
|
||||
; olddst psw newdst
|
||||
1010$: .word 000000, cp0z00, 000000
|
||||
.word 000001, cp0000, 000001
|
||||
.word 077777, cp0000, 077777
|
||||
.word 100000, cpn000, 100000
|
||||
.word 177777, cpn000, 177777
|
||||
1011$:
|
||||
;
|
||||
2000$: scc
|
||||
tst (r1)
|
||||
.word 1010$
|
||||
.word 1011$
|
||||
;
|
||||
9999$: iot ; end of test B7.1
|
||||
;
|
||||
; Test B8 -- ror +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
; This sub-section verifies
|
||||
; x xxx xxx xxx xxx xxx NZVC Instruction / Remark
|
||||
; 0 000 110 000 ddd ddd NZVC ROR
|
||||
;
|
||||
; Test B8.1 -- ror instruction +++++++++++++++++++++++++++++++++++++++
|
||||
;
|
||||
tb0801: clr cp.psw
|
||||
mov #1000$,r5 ; reg mode tests (with ccc; C=0)
|
||||
jsr pc,top1wr
|
||||
mov #2000$,r5 ; mem mode tests (with scc; C=1)
|
||||
jsr pc,top1wm
|
||||
jmp 9999$
|
||||
;
|
||||
1000$: ccc ; c=0
|
||||
ror r1
|
||||
.word 1010$
|
||||
.word 1011$
|
||||
;
|
||||
; olddst psw newdst
|
||||
1010$: .word 000000, cp0z00, 000000
|
||||
.word 000001, cp0zvc, 000000
|
||||
.word 100000, cp0000, 040000
|
||||
.word 000100, cp0000, 000040
|
||||
.word 000101, cp00vc, 000040
|
||||
.word 040100, cp0000, 020040
|
||||
.word 100100, cp0000, 040040
|
||||
1011$:
|
||||
;
|
||||
2000$: scc ; c=1
|
||||
ror (r1)
|
||||
.word 2010$
|
||||
.word 2011$
|
||||
;
|
||||
; olddst psw newdst
|
||||
2010$: .word 000000, cpn0v0, 100000
|
||||
.word 000001, cpn00c, 100000
|
||||
.word 100000, cpn0v0, 140000
|
||||
.word 000100, cpn0v0, 100040
|
||||
.word 000101, cpn00c, 100040
|
||||
.word 040100, cpn0v0, 120040
|
||||
.word 100100, cpn0v0, 140040
|
||||
2011$:
|
||||
;
|
||||
; olddst psw newdst
|
||||
;
|
||||
9999$: iot ; end of test B8.1
|
||||
;
|
||||
; Test B9 -- rol +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
; This sub-section verifies
|
||||
; x xxx xxx xxx xxx xxx NZVC Instruction / Remark
|
||||
; 0 000 110 001 ddd ddd NZVC ROL
|
||||
;
|
||||
; Test B9.1 -- rol instruction +++++++++++++++++++++++++++++++++++++++
|
||||
;
|
||||
tb0901: clr cp.psw
|
||||
mov #1000$,r5 ; reg mode tests (with ccc; C=0)
|
||||
jsr pc,top1wr
|
||||
mov #2000$,r5 ; mem mode tests (with scc; C=1)
|
||||
jsr pc,top1wm
|
||||
jmp 9999$
|
||||
;
|
||||
1000$: ccc ; c=0
|
||||
rol r1
|
||||
.word 1010$
|
||||
.word 1011$
|
||||
;
|
||||
; olddst psw newdst
|
||||
1010$: .word 000000, cp0z00, 000000
|
||||
.word 000001, cp0000, 000002
|
||||
.word 100000, cp0zvc, 000000
|
||||
.word 000100, cp0000, 000200
|
||||
.word 000101, cp0000, 000202
|
||||
.word 040100, cpn0v0, 100200
|
||||
.word 100100, cp00vc, 000200
|
||||
1011$:
|
||||
;
|
||||
2000$: scc ; c=1
|
||||
rol (r1)
|
||||
.word 2010$
|
||||
.word 2011$
|
||||
;
|
||||
; olddst psw newdst
|
||||
2010$: .word 000000, cp0000, 000001
|
||||
.word 000001, cp0000, 000003
|
||||
.word 100000, cp00vc, 000001
|
||||
.word 000100, cp0000, 000201
|
||||
.word 000101, cp0000, 000203
|
||||
.word 040100, cpn0v0, 100201
|
||||
.word 100100, cp00vc, 000201
|
||||
2011$:
|
||||
;
|
||||
; olddst psw newdst
|
||||
;
|
||||
9999$: iot ; end of test B9.1
|
||||
;
|
||||
; Test B10 -- asr ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
; This sub-section verifies
|
||||
; x xxx xxx xxx xxx xxx NZVC Instruction / Remark
|
||||
; 0 000 110 010 ddd ddd NZVC ASR
|
||||
;
|
||||
; Test B10.1 -- asr instruction ++++++++++++++++++++++++++++++++++++++
|
||||
;
|
||||
tb1001: clr cp.psw
|
||||
mov #1000$,r5 ; reg mode tests (with ccc)
|
||||
jsr pc,top1wr
|
||||
mov #2000$,r5 ; mem mode tests (with scc)
|
||||
jsr pc,top1wm
|
||||
jmp 9999$
|
||||
;
|
||||
1000$: ccc
|
||||
asr r1
|
||||
.word 1010$
|
||||
.word 1011$
|
||||
;
|
||||
; olddst psw newdst
|
||||
1010$: .word 000000, cp0z00, 000000
|
||||
.word 000001, cp0zvc, 000000
|
||||
.word 100000, cpn0v0, 140000
|
||||
.word 000100, cp0000, 000040
|
||||
.word 000101, cp00vc, 000040
|
||||
.word 040100, cp0000, 020040
|
||||
.word 100100, cpn0v0, 140040
|
||||
1011$:
|
||||
;
|
||||
2000$: scc
|
||||
asr (r1)
|
||||
.word 1010$
|
||||
.word 1011$
|
||||
;
|
||||
; olddst psw newdst
|
||||
;
|
||||
9999$: iot ; end of test B10.1
|
||||
;
|
||||
; Test B11 -- asl ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
; This sub-section verifies
|
||||
; x xxx xxx xxx xxx xxx NZVC Instruction / Remark
|
||||
; 0 000 110 011 ddd ddd NZVC ASL
|
||||
;
|
||||
; Test B11.1 -- asl instruction ++++++++++++++++++++++++++++++++++++++
|
||||
;
|
||||
tb1101: clr cp.psw
|
||||
mov #1000$,r5 ; reg mode tests (with ccc)
|
||||
jsr pc,top1wr
|
||||
mov #2000$,r5 ; mem mode tests (with scc)
|
||||
jsr pc,top1wm
|
||||
jmp 9999$
|
||||
;
|
||||
1000$: ccc
|
||||
asl r1
|
||||
.word 1010$
|
||||
.word 1011$
|
||||
;
|
||||
; olddst psw newdst
|
||||
1010$: .word 000000, cp0z00, 000000
|
||||
.word 000001, cp0000, 000002
|
||||
.word 100000, cp0zvc, 000000
|
||||
.word 000100, cp0000, 000200
|
||||
.word 000101, cp0000, 000202
|
||||
.word 040100, cpn0v0, 100200
|
||||
.word 100100, cp00vc, 000200
|
||||
1011$:
|
||||
;
|
||||
2000$: scc
|
||||
asl (r1)
|
||||
.word 1010$
|
||||
.word 1011$
|
||||
;
|
||||
; olddst psw newdst
|
||||
;
|
||||
9999$: iot ; end of test B11.1
|
||||
;
|
||||
; Test B12 -- sxt ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
; This sub-section verifies
|
||||
; x xxx xxx xxx xxx xxx NZVC Instruction / Remark
|
||||
; 0 000 110 111 ddd ddd -Z0- SXT
|
||||
;
|
||||
; Test B12.1 -- sxt instruction ++++++++++++++++++++++++++++++++++++++
|
||||
;
|
||||
tb1201: clr cp.psw
|
||||
mov #1000$,r5 ; reg mode tests (with ccc; N=0)
|
||||
jsr pc,top1wr
|
||||
mov #2000$,r5 ; mem mode tests (with scc; N=1)
|
||||
jsr pc,top1wm
|
||||
jmp 9999$
|
||||
;
|
||||
1000$: ccc ; n=0
|
||||
sxt r1
|
||||
.word 1010$
|
||||
.word 1011$
|
||||
;
|
||||
; olddst psw newdst
|
||||
1010$: .word 000000, cp0z00, 000000
|
||||
.word 177777, cp0z00, 000000
|
||||
1011$:
|
||||
;
|
||||
2000$: scc ; n=1
|
||||
sxt (r1)
|
||||
.word 2010$
|
||||
.word 2011$
|
||||
;
|
||||
; olddst psw newdst
|
||||
2010$: .word 000000, cpn00c, 177777
|
||||
.word 177777, cpn00c, 177777
|
||||
2011$:
|
||||
;
|
||||
; olddst psw newdst
|
||||
;
|
||||
9999$: iot ; end of test B12.1
|
||||
;
|
||||
; Test B13 -- swab +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
; This sub-section verifies
|
||||
; x xxx xxx xxx xxx xxx NZVC Instruction / Remark
|
||||
; 0 000 000 011 ddd ddd NZ00 SWAB
|
||||
;
|
||||
; Test B13.1 -- swab instruction +++++++++++++++++++++++++++++++++++++
|
||||
;
|
||||
tb1301: clr cp.psw
|
||||
mov #1000$,r5 ; reg mode tests (with ccc)
|
||||
jsr pc,top1wr
|
||||
mov #2000$,r5 ; mem mode tests (with scc)
|
||||
jsr pc,top1wm
|
||||
jmp 9999$
|
||||
;
|
||||
1000$: ccc
|
||||
swab r1
|
||||
.word 1010$
|
||||
.word 1011$
|
||||
;
|
||||
; olddst psw newdst
|
||||
1010$: .word 000000, cp0z00, 000000
|
||||
.word 000001, cp0z00, 000400
|
||||
.word 000200, cp0z00, 100000
|
||||
.word 000400, cp0000, 000001
|
||||
.word 100000, cpn000, 000200
|
||||
.word 000401, cp0000, 000401
|
||||
.word 000600, cp0000, 100001
|
||||
.word 100001, cpn000, 000600
|
||||
.word 100200, cpn000, 100200
|
||||
1011$:
|
||||
;
|
||||
2000$: scc
|
||||
swab (r1)
|
||||
.word 1010$
|
||||
.word 1011$
|
||||
;
|
||||
; olddst psw newdst
|
||||
;
|
||||
9999$: iot ; end of test B13.1
|
||||
;
|
||||
; Test B14 -- clr ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
; This sub-section verifies
|
||||
; x xxx xxx xxx xxx xxx NZVC Instruction / Remark
|
||||
; 0 000 101 000 ddd ddd 0100 CLR
|
||||
;
|
||||
; Test B14.1 -- clr instruction ++++++++++++++++++++++++++++++++++++++
|
||||
;
|
||||
tb1401: clr cp.psw
|
||||
mov #1000$,r5 ; reg mode tests (with ccc)
|
||||
jsr pc,top1wr
|
||||
mov #2000$,r5 ; mem mode tests (with scc)
|
||||
jsr pc,top1wm
|
||||
jmp 9999$
|
||||
;
|
||||
1000$: ccc
|
||||
clr r1
|
||||
.word 1010$
|
||||
.word 1011$
|
||||
;
|
||||
; olddst psw newdst
|
||||
1010$: .word 000000, cp0z00, 000000
|
||||
.word 177777, cp0z00, 000000
|
||||
1011$:
|
||||
;
|
||||
2000$: scc ; c=1
|
||||
clr (r1)
|
||||
.word 1010$
|
||||
.word 1011$
|
||||
;
|
||||
; olddst psw newdst
|
||||
;
|
||||
9999$: iot ; end of test B14.1
|
||||
|
||||
;
|
||||
; Section C: binary instructions =============================================
|
||||
@ -1050,18 +1545,17 @@ top2wm: mov (r5),101$ ; setup cc setter
|
||||
200$: .word 0
|
||||
300$: .word 0
|
||||
;
|
||||
;
|
||||
; Test C1 -- add +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
; This sub-section verifies
|
||||
; x xxx xxx xxx xxx xxx NZVC Instruction / Remark
|
||||
; 0 110 sss sss ddd ddd NZVC ADD
|
||||
;
|
||||
; Test C1.1 -- add instructions ++++++++++++++++++++++++++++++++++++++
|
||||
; Test C1.1 -- add instruction +++++++++++++++++++++++++++++++++++++++
|
||||
;
|
||||
tc0101: clr cp.psw
|
||||
mov #1000$,r5 ; reg mode tests
|
||||
mov #1000$,r5 ; reg mode tests (with ccc)
|
||||
jsr pc,top2wr
|
||||
mov #2000$,r5 ; mem mode tests
|
||||
mov #2000$,r5 ; mem mode tests (with scc)
|
||||
jsr pc,top2wm
|
||||
jmp 9999$
|
||||
;
|
||||
@ -1140,7 +1634,7 @@ tc0101: clr cp.psw
|
||||
.word 100002, 177777, cpn00c, 100001
|
||||
.word 177776, 177777, cpn00c, 177775
|
||||
.word 177777, 177777, cpn00c, 177776
|
||||
1011$:
|
||||
1011$:
|
||||
;
|
||||
2000$: scc
|
||||
add (r0),(r1)
|
||||
@ -1157,9 +1651,9 @@ tc0101: clr cp.psw
|
||||
; Test C2.1 -- sub instruction +++++++++++++++++++++++++++++++++++++++
|
||||
;
|
||||
tc0201: clr cp.psw
|
||||
mov #1000$,r5 ; reg mode tests
|
||||
mov #1000$,r5 ; reg mode tests (with ccc)
|
||||
jsr pc,top2wr
|
||||
mov #2000$,r5 ; mem mode tests
|
||||
mov #2000$,r5 ; mem mode tests (with scc)
|
||||
jsr pc,top2wm
|
||||
jmp 9999$
|
||||
;
|
||||
@ -1239,7 +1733,7 @@ tc0201: clr cp.psw
|
||||
.word 100001, 177777, cp0000, 077776
|
||||
.word 177776, 177777, cp0000, 000001
|
||||
.word 177777, 177777, cp0z00, 000000
|
||||
1011$:
|
||||
1011$:
|
||||
;
|
||||
2000$: scc
|
||||
sub (r0),(r1)
|
||||
@ -1256,9 +1750,9 @@ tc0201: clr cp.psw
|
||||
; Test C3.1 -- bic instruction +++++++++++++++++++++++++++++++++++++++
|
||||
;
|
||||
tc0301: clr cp.psw
|
||||
mov #1000$,r5 ; reg mode tests
|
||||
mov #1000$,r5 ; reg mode tests (with ccc)
|
||||
jsr pc,top2wr
|
||||
mov #2000$,r5 ; mem mode tests
|
||||
mov #2000$,r5 ; mem mode tests (with scc)
|
||||
jsr pc,top2wm
|
||||
jmp 9999$
|
||||
;
|
||||
@ -1280,7 +1774,7 @@ tc0301: clr cp.psw
|
||||
.word 100700, 100770, cp0000, 000070
|
||||
.word 177777, 100770, cp0z00, 000000
|
||||
|
||||
1011$:
|
||||
1011$:
|
||||
;
|
||||
2000$: scc
|
||||
bic (r0),(r1)
|
||||
@ -1300,7 +1794,7 @@ tc0301: clr cp.psw
|
||||
.word 100700, 100770, cp000c, 000070
|
||||
.word 177777, 100770, cp0z0c, 000000
|
||||
|
||||
2011$:
|
||||
2011$:
|
||||
;
|
||||
9999$: iot ; end of test C3.1
|
||||
;
|
||||
@ -1309,12 +1803,12 @@ tc0301: clr cp.psw
|
||||
; x xxx xxx xxx xxx xxx NZVC Instruction / Remark
|
||||
; 0 101 sss sss ddd ddd NZ0- BIS
|
||||
;
|
||||
; Test C4.1 -- bis instructions ++++++++++++++++++++++++++++++++++++++
|
||||
; Test C4.1 -- bis instruction +++++++++++++++++++++++++++++++++++++++
|
||||
;
|
||||
tc0401: clr cp.psw
|
||||
mov #1000$,r5 ; reg mode tests
|
||||
mov #1000$,r5 ; reg mode tests (with ccc)
|
||||
jsr pc,top2wr
|
||||
mov #2000$,r5 ; mem mode tests
|
||||
mov #2000$,r5 ; mem mode tests (with scc)
|
||||
jsr pc,top2wm
|
||||
jmp 9999$
|
||||
;
|
||||
@ -1335,7 +1829,7 @@ tc0401: clr cp.psw
|
||||
.word 000000, 100770, cpn000, 100770
|
||||
.word 007070, 100770, cpn000, 107770
|
||||
|
||||
1011$:
|
||||
1011$:
|
||||
;
|
||||
2000$: scc
|
||||
bis (r0),(r1)
|
||||
@ -1354,15 +1848,144 @@ tc0401: clr cp.psw
|
||||
.word 000000, 100770, cpn00c, 100770
|
||||
.word 007070, 100770, cpn00c, 107770
|
||||
|
||||
2011$:
|
||||
2011$:
|
||||
;
|
||||
9999$: iot ; end of test C4.1
|
||||
;
|
||||
; Test C5 -- cmp +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
; This sub-section verifies
|
||||
; x xxx xxx xxx xxx xxx NZVC Instruction / Remark
|
||||
; 0 010 sss sss ddd ddd NZVC CMP
|
||||
;
|
||||
; Test C5.1 -- cmp instruction +++++++++++++++++++++++++++++++++++++++
|
||||
;
|
||||
tc0501: clr cp.psw
|
||||
mov #1000$,r5 ; reg mode tests (with ccc)
|
||||
jsr pc,top2wr
|
||||
mov #2000$,r5 ; mem mode tests (with scc)
|
||||
jsr pc,top2wm
|
||||
jmp 9999$
|
||||
;
|
||||
1000$: ccc
|
||||
cmp r0,r1
|
||||
.word 1010$
|
||||
.word 1011$
|
||||
;
|
||||
; src olddst psw newdst ; src-dst
|
||||
1010$: .word 000000, 000000, cp0z00, 000000 ; (000000)
|
||||
.word 000001, 000000, cp0000, 000000 ; (000001)
|
||||
.word 177777, 000000, cpn000, 000000 ; (177777)
|
||||
.word 000000, 000001, cpn00c, 000001 ; (177777+C)
|
||||
.word 000001, 000001, cp0z00, 000001 ; (000000)
|
||||
.word 177777, 000001, cpn000, 000001 ; (177776)
|
||||
.word 077776, 077777, cpn00c, 077777 ; (177777+C)
|
||||
.word 077777, 077777, cp0z00, 077777 ; (000000)
|
||||
.word 100000, 077777, cp00v0, 077777 ; (000001)
|
||||
.word 000001, 077777, cpn00c, 077777 ; (100002+C)
|
||||
.word 177777, 077777, cpn000, 077777 ; (100000)
|
||||
.word 077777, 100000, cpn0vc, 100000 ; (177777+C)
|
||||
.word 100000, 100000, cp0z00, 100000 ; (000000)
|
||||
.word 100001, 100000, cp0000, 100000 ; (000001)
|
||||
.word 000001, 100000, cpn0vc, 100000 ; (100001+C)
|
||||
.word 177777, 100000, cp0000, 100000 ; (077777)
|
||||
.word 000000, 177777, cp000c, 177777 ; (000001+C)
|
||||
.word 000001, 177777, cp000c, 177777 ; (000002+C)
|
||||
.word 177777, 177777, cp0z00, 177777 ; (000000)
|
||||
1011$:
|
||||
;
|
||||
2000$: scc
|
||||
cmp (r0),(r1)
|
||||
.word 1010$
|
||||
.word 1011$
|
||||
;
|
||||
9999$: iot ; end of test C5.1
|
||||
;
|
||||
; Test C6 -- bit +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
; This sub-section verifies
|
||||
; x xxx xxx xxx xxx xxx NZVC Instruction / Remark
|
||||
; 0 011 sss sss ddd ddd NZ0- BIT
|
||||
;
|
||||
; Test C6.1 -- bit instruction +++++++++++++++++++++++++++++++++++++++
|
||||
;
|
||||
tc0601: clr cp.psw
|
||||
mov #1000$,r5 ; reg mode tests (with ccc)
|
||||
jsr pc,top2wr
|
||||
mov #2000$,r5 ; mem mode tests (with scc)
|
||||
jsr pc,top2wm
|
||||
jmp 9999$
|
||||
;
|
||||
1000$: ccc
|
||||
bit r0,r1
|
||||
.word 1010$
|
||||
.word 1011$
|
||||
;
|
||||
; src olddst psw newdst ; src&dst
|
||||
1010$: .word 000000, 000000, cp0z00, 000000 ; (000000)
|
||||
.word 000011, 000000, cp0z00, 000000 ; (000000)
|
||||
.word 000011, 000110, cp0000, 000110 ; (000010)
|
||||
.word 000011, 001100, cp0z00, 001100 ; (000000)
|
||||
.word 110000, 011000, cp0000, 011000 ; (010000)
|
||||
.word 110000, 110000, cpn000, 110000 ; (110000)
|
||||
1011$:
|
||||
;
|
||||
2000$: scc
|
||||
bit (r0),(r1)
|
||||
.word 2010$
|
||||
.word 2011$
|
||||
;
|
||||
; src olddst psw newdst ; src&dst
|
||||
2010$: .word 000000, 000000, cp0z0c, 000000 ; (000000)
|
||||
.word 000011, 000000, cp0z0c, 000000 ; (000000)
|
||||
.word 000011, 000110, cp000c, 000110 ; (000010)
|
||||
.word 000011, 001100, cp0z0c, 001100 ; (000000)
|
||||
.word 110000, 011000, cp000c, 011000 ; (010000)
|
||||
.word 110000, 110000, cpn00c, 110000 ; (110000)
|
||||
2011$:
|
||||
;
|
||||
9999$: iot ; end of test C6.1
|
||||
;
|
||||
; Test C7 -- mov +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
|
||||
; This sub-section verifies
|
||||
; x xxx xxx xxx xxx xxx NZVC Instruction / Remark
|
||||
; 0 001 sss sss ddd ddd NZ0- MOV
|
||||
;
|
||||
; Test C7.1 -- mov instruction +++++++++++++++++++++++++++++++++++++++
|
||||
;
|
||||
tc0701: clr cp.psw
|
||||
mov #1000$,r5 ; reg mode tests (with ccc; c=0)
|
||||
jsr pc,top2wr
|
||||
mov #2000$,r5 ; mem mode tests (with scc; c=1)
|
||||
jsr pc,top2wm
|
||||
jmp 9999$
|
||||
;
|
||||
1000$: ccc ; c=0
|
||||
mov r0,r1
|
||||
.word 1010$
|
||||
.word 1011$
|
||||
;
|
||||
; src olddst psw newdst
|
||||
1010$: .word 000000, 000000, cp0z00, 000000
|
||||
.word 000001, 000000, cp0000, 000001
|
||||
.word 100000, 000000, cpn000, 100000
|
||||
1011$:
|
||||
;
|
||||
2000$: scc ; c=1
|
||||
mov (r0),(r1)
|
||||
.word 2010$
|
||||
.word 2011$
|
||||
;
|
||||
; src olddst psw newdst
|
||||
2010$: .word 000000, 177777, cp0z0c, 000000
|
||||
.word 000001, 177777, cp000c, 000001
|
||||
.word 100000, 177777, cpn00c, 100000
|
||||
2011$:
|
||||
;
|
||||
9999$: iot ; end of test C7.1
|
||||
;
|
||||
; END OF ALL TESTS - loop closure ============================================
|
||||
;
|
||||
mov tstno,r0 ; hack, for easy monitoring ...
|
||||
cmp tstno,#11. ; all tests done ?
|
||||
cmp tstno,#26. ; all tests done ?
|
||||
beq .+4
|
||||
halt
|
||||
;
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user