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comment&code cosmetics; minor changes
This commit is contained in:
@@ -115,7 +115,7 @@ All examples below use the same basic setup
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SWI = 0110 (gives console light emulation...)
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ti_w11 -tuD,12M,break,xon @<oskit-name>_boot.tcl
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**Note**: the arty w11a has currently only 176 kB memory (all from BRAMS!)
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**Note**: the arty w11a has currently only 176 kB memory (all from BRAMS!).
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u5ed works fine. XXDP, RT11 and RSX-11M should work.
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211bsd will not boot, neither most RSX-11M+ systems.
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@@ -125,7 +125,7 @@ All examples below use the same basic setup
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ti_w11 -tuD,12M,break,xon @<oskit-name>_boot.tcl
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**Note**: the basys3 w11a has only 176 kB memory (all from BRAMS!)
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**Note**: the basys3 w11a has only 176 kB memory (all from BRAMS!).
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u5ed works fine. XXDP, RT11 and RSX-11M should work.
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211bsd will not boot, neither most RSX-11M+ systems.
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@@ -133,7 +133,8 @@ All examples below use the same basic setup
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ti_w11 -tuD,12M,break,xon @<oskit-name>_boot.tcl
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**Note**: the c7 w11a has currently only 672 kB memory (512 SRAM + 160 BRAM)
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**Note**: the c7 w11a has currently only 672 kB memory
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(512 SRAM + 160 BRAM).
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u5ed, u7ed, XXDP, RT11, RSX-11M and most most RSX-11M+ systems should work.
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211bsd works only in the 'non-networking' configuration
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[211bsd_rpmin](../tools/oskit/211bsd_rpmin)
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@@ -1,4 +1,4 @@
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-- $Id: ibd_iist.vhd 984 2018-01-02 20:56:27Z mueller $
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-- $Id: ibd_iist.vhd 1073 2018-11-23 18:05:51Z mueller $
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--
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-- Copyright 2009-2016 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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@@ -240,7 +240,7 @@ begin
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end if;
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end process proc_regs;
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proc_next : process (R_REGS, CE_USEC, IB_MREQ, EI_ACK, EI_ACK,
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proc_next : process (R_REGS, CE_USEC, IB_MREQ,
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IIST_BUS(0), IIST_BUS(1), IIST_BUS(2), IIST_BUS(3),
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IIST_SRES)
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variable r : regs_type := regs_init;
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@@ -1,4 +1,4 @@
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-- $Id: ibdr_deuna.vhd 984 2018-01-02 20:56:27Z mueller $
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-- $Id: ibdr_deuna.vhd 1073 2018-11-23 18:05:51Z mueller $
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--
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-- Copyright 2014-2017 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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@@ -151,7 +151,7 @@ begin
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end if;
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end process proc_regs;
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proc_next : process (R_REGS, IB_MREQ, EI_ACK, BRESET)
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proc_next : process (R_REGS, IB_MREQ, BRESET)
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variable r : regs_type := regs_init;
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variable n : regs_type := regs_init;
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variable ibhold : slbit := '0';
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@@ -1,4 +1,4 @@
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-- $Id: ibdr_rl11.vhd 984 2018-01-02 20:56:27Z mueller $
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-- $Id: ibdr_rl11.vhd 1073 2018-11-23 18:05:51Z mueller $
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--
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-- Copyright 2014-2016 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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@@ -282,7 +282,7 @@ begin
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end if;
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end process proc_regs;
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proc_next : process (R_REGS, CE_MSEC, IB_MREQ, MEM_DOUT, EI_ACK)
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proc_next : process (R_REGS, IB_MREQ, MEM_DOUT, EI_ACK)
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variable r : regs_type := regs_init;
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variable n : regs_type := regs_init;
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variable ibhold : slbit := '0';
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@@ -1,4 +1,4 @@
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-- $Id: sys_conf_sim.vhd 984 2018-01-02 20:56:27Z mueller $
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-- $Id: sys_conf_sim.vhd 1071 2018-11-17 20:53:26Z mueller $
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--
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-- Copyright 2017- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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@@ -19,7 +19,7 @@
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-- Tool versions: viv 2017.1; ghdl 0.34
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-- Revision History:
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-- Date Rev Version Comment
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-- 2013-09-21 534 1.0 Initial version
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-- 2017-06-11 912 1.0 Initial version
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------------------------------------------------------------------------------
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library ieee;
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@@ -1,5 +1,5 @@
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.\" -*- nroff -*-
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.\" $Id: tbrun_tbwrri.1 845 2017-01-15 14:58:27Z mueller $
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.\" $Id: tbrun_tbwrri.1 1074 2018-11-25 21:38:59Z mueller $
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.\"
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.\" Copyright 2016- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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.\"
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@@ -128,7 +128,7 @@ Done in UUT, thus useful only for behavioral simulations.
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add additional \fItime\fR ns startup waiting time for behavioral models.
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.
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.\" -- --swait -----------------------------------
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.IP \fB\-\-bwait\fR\ \fItime\fR
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.IP \fB\-\-swait\fR\ \fItime\fR
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add additional \fItime\fR ns startup waiting time for post-synthesis and
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later models.
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@@ -1,5 +1,5 @@
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.\" -*- nroff -*-
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.\" $Id: vbomconv.1 1066 2018-11-10 11:21:53Z mueller $
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.\" $Id: vbomconv.1 1076 2018-12-02 12:45:49Z mueller $
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.\"
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.\" Copyright 2010-2018 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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.\"
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@@ -209,7 +209,7 @@ The first definition seen in the \fIvbom\fP
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traversal is taken, all others are ignored. The filename in the usage clause
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is the default used in case the logical name wasn't defined.
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Last but not least are 4 directives defined in the \fBvbom\fP
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Last but not least are 5 directives defined in the \fBvbom\fP
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file format:
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.
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.IP "\fB@top\fP:\fIname\fP"
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@@ -1,4 +1,4 @@
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// $Id: RlinkPortFifo.cpp 1063 2018-10-29 18:37:42Z mueller $
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// $Id: RlinkPortFifo.cpp 1075 2018-12-01 11:55:07Z mueller $
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//
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// Copyright 2011-2018 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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//
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@@ -92,10 +92,7 @@ bool RlinkPortFifo::Open(const std::string& url, RerrMsg& emsg)
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int RlinkPortFifo::OpenFifo(const std::string& name, bool snd, RerrMsg& emsg)
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{
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struct stat stat_fifo;
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int irc;
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irc = ::stat(name.c_str(), &stat_fifo);
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int irc = ::stat(name.c_str(), &stat_fifo);
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if (irc == 0) {
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if ((stat_fifo.st_mode & S_IFIFO) == 0) {
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emsg.Init("RlinkPortFifo::OpenFiFo()",
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@@ -1,4 +1,4 @@
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// $Id: RlinkServer.cpp 1059 2018-10-27 10:34:16Z mueller $
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// $Id: RlinkServer.cpp 1075 2018-12-01 11:55:07Z mueller $
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//
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// Copyright 2013-2018 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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//
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@@ -13,10 +13,10 @@
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//
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// Revision History:
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// Date Rev Version Comment
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// 2018-10-27 1059 1.2.3 coverity fixup (uncaught exception in dtor)
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// 2017-04-07 868 1.2.2 Dump(): add detail arg
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// 2015-06-05 686 1.2.1 BUGFIX: CallAttnHandler(): fix race in hnext
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// 2015-04-04 662 1.2 BUGFIX: fix race in Stop(), use UnStop()
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// 2018-10-27 1059 2.2.4 coverity fixup (uncaught exception in dtor)
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// 2017-04-07 868 2.2.3 Dump(): add detail arg
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// 2015-06-05 686 2.2.2 BUGFIX: CallAttnHandler(): fix race in hnext
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// 2015-04-04 662 2.2.1 BUGFIX: fix race in Stop(), use UnStop()
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// 2015-01-10 632 2.2 Exec() without emsg now void, will throw
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// 2014-12-30 625 2.1 adopt to Rlink V4 attn logic
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// 2014-12-21 617 2.0.1 use kStat_M_RbTout for rbus timeout
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@@ -1,4 +1,4 @@
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// $Id: RtclContext.cpp 1070 2018-11-17 09:48:04Z mueller $
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// $Id: RtclContext.cpp 1076 2018-12-02 12:45:49Z mueller $
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//
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// Copyright 2011-2018 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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//
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@@ -13,6 +13,7 @@
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//
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// Revision History:
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// Date Rev Version Comment
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// 2018-12-02 1076 1.0.6 use nullptr
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// 2018-11-16 1070 1.0.5 use auto; use emplace,make_pair; use range loop
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// 2017-02-04 866 1.0.4 rename fMapContext -> fContextMap
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// 2013-02-03 481 1.0.3 use Rexception
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@@ -148,7 +149,7 @@ RtclProxyBase* RtclContext::FindProxy(const std::string& type,
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if (name == cmdname) return po;
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}
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}
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return 0;
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return nullptr;
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}
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//------------------------------------------+-----------------------------------
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@@ -1,4 +1,4 @@
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// $Id: RtclBvi.cpp 983 2018-01-02 20:35:59Z mueller $
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// $Id: RtclBvi.cpp 1076 2018-12-02 12:45:49Z mueller $
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//
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// Copyright 2011-2014 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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//
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@@ -13,7 +13,7 @@
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//
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// Revision History:
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// Date Rev Version Comment
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// 2014-08-22 584 1.0.2 use nullptr
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// 2018-12-02 1076 1.0.2 use nullptr
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// 2011-11-28 434 1.0.1 DoCmd(): use intptr_t cast for lp64 compatibility
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// 2011-03-27 374 1.0 Initial version
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// 2011-02-13 361 0.1 First draft
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@@ -121,7 +121,7 @@ Tcl_Obj* RtclBvi::DoConv(Tcl_Interp* interp, ConvMode mode, Tcl_Obj* val,
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if (strchr("bBoOdDxX", pval[0]) == 0) {
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Tcl_AppendResult(interp, "-E: bad prefix in c'dddd' format string",
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nullptr);
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return 0;
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return nullptr;
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}
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form = pval[0];
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pval += 2;
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@@ -154,20 +154,20 @@ Tcl_Obj* RtclBvi::DoConv(Tcl_Interp* interp, ConvMode mode, Tcl_Obj* val,
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if (eptr != pval+lval) {
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Tcl_AppendResult(interp, "-E: conversion error in '",
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Tcl_GetString(val), "'", nullptr);
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return 0;
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return nullptr;
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}
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if (lres > (1ul<<nbit)-1) {
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Tcl_AppendResult(interp, "-E: too many bits defined in '",
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Tcl_GetString(val), "'", nullptr);
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return 0;
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return nullptr;
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}
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return Tcl_NewIntObj((int)lres);
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} else if (mode == kInt2Str) {
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int val_int;
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if (Tcl_GetIntFromObj(interp, val, &val_int) != kOK) return 0;
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if (Tcl_GetIntFromObj(interp, val, &val_int) != kOK) return nullptr;
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int val_uint = (unsigned int) val_int;
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int nwidth = 1;
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@@ -199,7 +199,7 @@ Tcl_Obj* RtclBvi::DoConv(Tcl_Interp* interp, ConvMode mode, Tcl_Obj* val,
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Tcl_AppendResult(interp, "-E: BUG! bad cdata in RtclBvi::DoConv() call",
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nullptr);
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}
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return 0;
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return nullptr;
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}
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//------------------------------------------+-----------------------------------
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@@ -1,4 +1,4 @@
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# $Id: test_w11a_mem70.tcl 916 2017-06-25 13:30:07Z mueller $
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# $Id: test_w11a_mem70.tcl 1069 2018-11-16 17:11:30Z mueller $
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#
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# Copyright 2017- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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# License disclaimer see License.txt in $RETROBASE directory
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@@ -112,7 +112,7 @@ $cpu cp -wal cntrl \
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# --------------------------------------------------------------------
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rlc log " Test 4: test full memory (touch (4-7)*2 sections of 16 words"
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# determine memory size in 2^n steps; chunck size is 1/4
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# determine memory size in 2^n steps; chunk size is 1/4
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set msize2 [expr {2*1024*1024}]
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while {$msize < $msize2} {
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set msize2 [expr {$msize2 >> 1}]
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