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renames, cleanups, SimH V3.12-3 ready

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- rtl/w11a
  - pdp11.vhd: rename cpuerr_type adderr->oddadr etc
  - pdp11_mmu.vhd: rename mmu_mmr0_type dspace->page_dspace
  - pdp11_sequencer.vhd: rename adderr -> oddadr, don't set after err_mmu
- tools/asm-11/lib/defs_reg70.mac: rename cp.aer -> cp.odd
- tools/dasm-11/lib/defs_reg70.das: rename cp.aer -> cp.odd
- tools/tcl/rw11/defs.tcl: rename adderr -> oddadr (in cpuerr)
- tools/tcode
  - cpu_details.mac: minor updates; get SimH V3.12-3 ready
  - cpu_mmu.mac:  minor updates; get SimH V3.12-3 ready
This commit is contained in:
wfjm
2022-12-01 09:04:57 +01:00
parent f6ff0fa701
commit 2421554d4e
8 changed files with 92 additions and 80 deletions
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11
rtl/w11a/pdp11.vhd
View File

@@ -1,4 +1,4 @@
-- $Id: pdp11.vhd 1321 2022-11-24 15:06:47Z mueller $
-- $Id: pdp11.vhd 1323 2022-12-01 08:00:41Z mueller $
-- SPDX-License-Identifier: GPL-3.0-or-later
-- Copyright 2006-2022 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
@@ -11,6 +11,8 @@
--
-- Revision History:
-- Date Rev Version Comment
-- 2022-11-29 1323 1.5.18 rename cpuerr_type adderr->oddadr, mmu_mmr0_type
-- dspace->page_dspace; drop mmu_cntl_type.trap_done
-- 2022-11-24 1321 1.5.17 add cpustat_type intpend
-- 2022-11-21 1320 1.6.16 rename some rsv->ser and cpustat_type trap_->treq_;
-- remove vm_cntl_type.trap_done; add in_vecysv;
@@ -403,7 +405,7 @@ package pdp11 is
type cpuerr_type is record -- CPU error register
illhlt : slbit; -- illegal halt (in non-kernel mode)
adderr : slbit; -- address error (odd, jmp/jsr reg)
oddadr : slbit; -- odd address error
nxm : slbit; -- non-existent memory
iobto : slbit; -- I/O bus timeout (non-exist UB)
ysv : slbit; -- yellow stack violation
@@ -477,12 +479,11 @@ package pdp11 is
cacc : slbit; -- console access (bypass mmu)
dspace : slbit; -- dspace access
mode : slv2; -- processor mode
trap_done : slbit; -- mmu trap taken (set mmr0 bit)
end record mmu_cntl_type;
constant mmu_cntl_init : mmu_cntl_type := (
'0','0','0','0', -- req, wacc, macc, cacc
'0',"00",'0' -- dspace, mode, trap_done
'0',"00" -- dspace, mode
);
type mmu_stat_type is record -- mmu status port
@@ -520,7 +521,7 @@ package pdp11 is
ena_trap : slbit; -- enable traps
inst_compl : slbit; -- instruction complete
page_mode : slv2; -- page mode
dspace : slbit; -- address space (D=1, I=0)
page_dspace : slbit; -- page address space (D=1, I=0)
page_num : slv3; -- page number
ena_mmu : slbit; -- enable memory management
trace_prev : slbit; -- mmr12 trace status in prev. state

15
rtl/w11a/pdp11_mmu.vhd
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@@ -1,4 +1,4 @@
-- $Id: pdp11_mmu.vhd 1294 2022-09-07 14:21:20Z mueller $
-- $Id: pdp11_mmu.vhd 1323 2022-12-01 08:00:41Z mueller $
-- SPDX-License-Identifier: GPL-3.0-or-later
-- Copyright 2006-2022 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
@@ -17,7 +17,8 @@
--
-- Revision History:
-- Date Rev Version Comment
-- 2022-09-05 1294 1,4.4 BUGFIX: correct trap and PDR A logic
-- 2022-11-29 1323 1.4.5 rename mmu_mmr0_type dspace->page_dspace
-- 2022-09-05 1294 1.4.4 BUGFIX: correct trap and PDR A logic
-- 2022-08-13 1279 1.4.3 ssr->mmr rename
-- 2011-11-18 427 1.4.2 now numeric_std clean
-- 2010-10-23 335 1.4.1 use ib_sel
@@ -78,7 +79,7 @@ architecture syn of pdp11_mmu is
constant mmr0_ibf_ena_trap : integer := 9;
constant mmr0_ibf_inst_compl : integer := 7;
subtype mmr0_ibf_page_mode is integer range 6 downto 5;
constant mmr0_ibf_dspace : integer := 4;
constant mmr0_ibf_page_dspace : integer := 4;
subtype mmr0_ibf_page_num is integer range 3 downto 1;
constant mmr0_ibf_ena_mmu : integer := 0;
@@ -171,7 +172,7 @@ begin
mmr0out(mmr0_ibf_ena_trap) := R_MMR0.ena_trap;
mmr0out(mmr0_ibf_inst_compl) := R_MMR0.inst_compl;
mmr0out(mmr0_ibf_page_mode) := R_MMR0.page_mode;
mmr0out(mmr0_ibf_dspace) := R_MMR0.dspace;
mmr0out(mmr0_ibf_page_dspace):= R_MMR0.page_dspace;
mmr0out(mmr0_ibf_page_num) := R_MMR0.page_num;
mmr0out(mmr0_ibf_ena_mmu) := R_MMR0.ena_mmu;
end if;
@@ -386,9 +387,9 @@ begin
end if;
if mmr_freeze = '0' then
nmmr0.dspace := DSPACE;
nmmr0.page_num := apf;
nmmr0.page_mode := CNTL.mode;
nmmr0.page_dspace := DSPACE;
nmmr0.page_num := apf;
nmmr0.page_mode := CNTL.mode;
end if;
end if;
end if;

13
rtl/w11a/pdp11_sequencer.vhd
View File

@@ -1,4 +1,4 @@
-- $Id: pdp11_sequencer.vhd 1322 2022-11-28 19:31:57Z mueller $
-- $Id: pdp11_sequencer.vhd 1323 2022-12-01 08:00:41Z mueller $
-- SPDX-License-Identifier: GPL-3.0-or-later
-- Copyright 2006-2022 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
--
@@ -13,6 +13,7 @@
--
-- Revision History:
-- Date Rev Version Comment
-- 2022-11-29 1323 1.6.22 rename adderr -> oddadr, don't set after err_mmu
-- 2022-11-28 1322 1.6.21 BUGFIX: correct mmu trap vs interrupt priority
-- 2022-11-24 1321 1.6.20 BUGFIX: correct mmu trap handing in s_idecode
-- 2022-11-21 1320 1.6.19 rename some rsv->ser and cpustat_type trap_->treq_;
@@ -125,7 +126,7 @@ architecture syn of pdp11_sequencer is
constant ibaddr_cpuerr : slv16 := slv(to_unsigned(8#177766#,16));
constant cpuerr_ibf_illhlt : integer := 7;
constant cpuerr_ibf_adderr : integer := 6;
constant cpuerr_ibf_oddadr : integer := 6;
constant cpuerr_ibf_nxm : integer := 5;
constant cpuerr_ibf_iobto : integer := 4;
constant cpuerr_ibf_ysv : integer := 3;
@@ -296,7 +297,7 @@ begin
idout := (others=>'0');
if IBSEL_CPUERR = '1' then
idout(cpuerr_ibf_illhlt) := R_CPUERR.illhlt;
idout(cpuerr_ibf_adderr) := R_CPUERR.adderr;
idout(cpuerr_ibf_oddadr) := R_CPUERR.oddadr;
idout(cpuerr_ibf_nxm) := R_CPUERR.nxm;
idout(cpuerr_ibf_iobto) := R_CPUERR.iobto;
idout(cpuerr_ibf_ysv) := R_CPUERR.ysv;
@@ -2383,8 +2384,8 @@ begin
nstatus.in_vecysv := '0'; -- cancel ysv flow
ndpcntl.gr_we := '1';
if R_VMSTAT.err_odd='1' or R_VMSTAT.err_mmu='1' then
ncpuerr.adderr := '1';
if R_VMSTAT.err_odd='1' then
ncpuerr.oddadr := '1';
elsif R_VMSTAT.err_nxm = '1' then
ncpuerr.nxm := '1';
elsif R_VMSTAT.err_iobto = '1' then
@@ -2394,7 +2395,7 @@ begin
nstate := s_abort_4;
elsif R_VMSTAT.err_odd = '1' then
ncpuerr.adderr := '1';
ncpuerr.oddadr := '1';
nstate := s_abort_4;
elsif R_VMSTAT.err_nxm = '1' then
ncpuerr.nxm := '1';