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Code Issues Releases Wiki Activity

- interim release w11a_V0.561 (untagged)

Browse Source 
- Added simple simulation model of Cypress FX2 and test benches for
  functional verifcation of FX2 controller
- Bugfixes in FX2 firmware and controller, works now also on Nexys3 & Atlys
- Added test systems for rlink over USB verification for Nexys3 & Atlys
This commit is contained in:
Walter F.J. Mueller
2013-01-06 16:19:26 +00:00
parent cbd8ce3468
commit 29d2dc5bef
67 changed files with 6004 additions and 3227 deletions
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12
rtl/sys_gen/tst_fx2loop/Makefile
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@@ -1,7 +1,8 @@
# $Id: Makefile 461 2012-04-09 21:17:54Z mueller $
# $Id: Makefile 470 2013-01-05 17:28:46Z mueller $
#
# Revision History:
# Date Rev Version Comment
# 2013-01-05 470 1.2 fix LDLIBS (must come after objs)
# 2012-02-26 458 1.1 add tst_fx2loop_si
# 2011-12-26 445 1.0 Initial version
#
@@ -15,16 +16,19 @@ ISE_PATH = xc3s1200e-fg320-4
all : tst_fx2loop tst_fx2loop_si
#
clean : ise_clean
rm -f tst_fx2loop
rm -f tst_fx2loop_si
#
realclean :
rm -f tst_fx2loop tst_fx2loop_si
#
CFLAGS = -Wall -O2 -g -lusb-1.0
CFLAGS = -Wall -O2 -g
LDLIBS = -lusb-1.0
#
tst_fx2loop : tst_fx2loop.c
${CC} ${CFLAGS} -o tst_fx2loop tst_fx2loop.c
${CC} ${CFLAGS} -o tst_fx2loop tst_fx2loop.c ${LDLIBS}
tst_fx2loop_si : tst_fx2loop_si.c
${CC} ${CFLAGS} -o tst_fx2loop_si tst_fx2loop_si.c
${CC} ${CFLAGS} -o tst_fx2loop_si tst_fx2loop_si.c ${LDLIBS}
#
#----
#