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mirror of https://github.com/wfjm/w11.git synced 2026-04-30 05:36:08 +00:00

- upgraded CRAM controller, now with 'page mode' support

- new test bench driver tbrun, give automatized test bench execution
This commit is contained in:
Walter F.J. Mueller
2016-10-15 07:42:21 +00:00
parent 2b5cfb7d96
commit 5983b0bb2a
402 changed files with 18795 additions and 1204 deletions

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@@ -29,3 +29,4 @@ pkg_mkIndex -verbose ibd_rl11 *.tcl
pkg_mkIndex -verbose ibd_tm11 *.tcl
#
pkg_mkIndex -verbose tst_rlink *.tcl
pkg_mkIndex -verbose tst_sram *.tcl

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@@ -0,0 +1 @@
pkgIndex.tcl

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@@ -0,0 +1,120 @@
# $Id: test_all.tcl 785 2016-07-10 12:22:41Z mueller $
#
# Copyright 2014-2016 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
# This program is free software; you may redistribute and/or modify it under
# the terms of the GNU General Public License as published by the Free
# Software Foundation, either version 2, or at your option any later version.
#
# This program is distributed in the hope that it will be useful, but
# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
# for complete details.
#
# Revision History:
# Date Rev Version Comment
# 2016-07-09 784 2.1 add test_all test driver
# 2014-11-23 606 2.0 use new rlink v4 iface
# 2014-08-14 582 1.0 Initial version
#
package provide tst_sram 1.0
package require rutiltpp
package require rutil
package require rlink
namespace eval tst_sram {
#
# test_all: Driver for all tst_sram tests
#
proc test_all {{tout 10.}} {
#
set errcnt 0
tst_sram::init
incr errcnt [test_regs]
incr errcnt [test_seq $tout]
puts "tst_sram::test_all errcnt = $errcnt --> [rutil::errcnt2txt $errcnt]"
return $errcnt
}
#
# test_sim: test suite for sim tests ---------------------------------------
# port of cmd_tst_sram_stress_sim.dat
#
proc test_sim {} {
rlink::anena 1; # enable attn notify
rlc exec -attn; # harvest spurious attn
init
scmd_write [test_scmdlist]
set lmdi {0x0000 0x0000 \
0xffff 0xffff \
0x0000 0xffff \
0xffff 0x0000 \
0xaaaa 0xaaaa \
0x5555 0x5555 }
set lmaddr {0x0000 0x0000 \
0x0003 0xffff \
0x0000 0xffff \
0x000f 0x0000 \
0x000a 0xaaaa \
0x0005 0x5555 }
set lmaddr_ran {}
for {set i 0} { $i < 3 } {incr i} {
lappend lmaddr_ran [expr {int(65536*rand()) & 0x000f}]
lappend lmaddr_ran [expr {int(65536*rand()) & 0xffff}]
}
srun_lists $lmdi $lmaddr
srun_lists $lmdi $lmaddr_ran
return ""
}
#
# test_fpga: test suite for fpga tests -------------------------------------
# port of cmd_tst_sram_stress_fpga.dat
#
proc test_fpga {{wide -1} {tout 1000.}} {
rlink::anena 1; # enable attn notify
rlc exec -attn; # harvest spurious attn
init
scmd_write [test_scmdlist]
set lmdi {0x0000 0x0000 \
0xffff 0xffff \
0x0000 0xffff \
0xffff 0x0000 \
0xaaaa 0xaaaa \
0x5555 0x5555 \
0x1e25 0x4e58 \
0xa9d8 0xd6d4 \
0xbcbd 0x0815 \
0x7424 0x7466 }
set lmdi_ran {}
for {set i 0} { $i < 3 } {incr i} {
lappend lmdi_ran [expr {int(65536*rand()) & 0xffff}]
lappend lmdi_ran [expr {int(65536*rand()) & 0xffff}]
}
if {$wide < 0} { set wide [iswide] }
set maddrh 0x0000
set maddrl 0x0000
if {[rlink::issim]} {
set maddrh [expr {$wide ? 0x003f : 0x0003}]
set maddrl 0xfffc
}
foreach {mdih mdil} $lmdi {
srun_loop $mdih $mdil $maddrh $maddrl $wide $tout
}
foreach {mdih mdil} $lmdi_ran {
srun_loop $mdih $mdil $maddrh $maddrl $wide $tout
}
return ""
}
}

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@@ -0,0 +1,346 @@
# $Id: test_regs.tcl 785 2016-07-10 12:22:41Z mueller $
#
# Copyright 2016- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
# This program is free software; you may redistribute and/or modify it under
# the terms of the GNU General Public License as published by the Free
# Software Foundation, either version 2, or at your option any later version.
#
# This program is distributed in the hope that it will be useful, but
# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
# for complete details.
#
# Revision History:
# Date Rev Version Comment
# 2016-07-10 785 1.1 add memory test (touch evenly distributed addr)
# 2016-07-09 784 1.0 Initial version (ported from tb_tst_sram_stim.dat)
#
package provide tst_sram 1.0
package require rutiltpp
package require rutil
package require rlink
namespace eval tst_sram {
#
# test_regs: Test registers: mdi*,mdo*,maddr*,mcmd,mblk,sblk*
# and saddr,slim,sblk*
#
proc test_regs {} {
#
set errcnt 0
rlc errcnt -clear
#
rlc log "tst_sram::test_regs ---------------------------------------------"
rlc log " init: reset via init, clear sfail ect"
rlc exec -init sr.mdih 0x0003; # reset MEM,SEQ
#
#-------------------------------------------------------------------------
rlc log " test 1a: test mdi* ,maddr*"
rlc exec \
-wreg sr.mdih 0x5555 \
-wreg sr.mdil 0xaaaa \
-wreg sr.maddrh 0x0001 \
-wreg sr.maddrl 0xcccc \
-rreg sr.mdih -edata 0x5555 \
-rreg sr.mdil -edata 0xaaaa \
-rreg sr.maddrh -edata 0x0001 \
-rreg sr.maddrl -edata 0xcccc
#
#-------------------------------------------------------------------------
rlc log " test 1b: test maddrh range"
set maddrh_max [expr {[iswide] ? 0x3f : 0x03}]
rlc exec \
-wreg sr.maddrh 0xffff \
-rreg sr.maddrh -edata $maddrh_max
#
#-------------------------------------------------------------------------
rlc log " test 2: test direct memory write/read via mcmd"
# write mem(0) = 0xdeadbeaf; mem(1)=a5a55a5a
rlc exec \
-wreg sr.maddrh 0x0000 \
-wreg sr.maddrl 0x0000 \
-wreg sr.mdih 0xdead \
-wreg sr.mdil 0xbeaf \
-wreg sr.mcmd [regbld tst_sram::MCMD we {be 0xf}] \
-wreg sr.maddrl 0x0001 \
-wreg sr.mdih 0xa5a5 \
-wreg sr.mdil 0x5a5a \
-wreg sr.mcmd [regbld tst_sram::MCMD we {be 0xf}]
# read back
rlc exec \
-wreg sr.maddrl 0x0000 \
-wreg sr.mcmd [regbld tst_sram::MCMD {be 0xf}] \
-rreg sr.mdoh -edata 0xdead \
-rreg sr.mdol -edata 0xbeaf \
-wreg sr.maddrl 0x0001 \
-wreg sr.mcmd [regbld tst_sram::MCMD {be 0xf}] \
-rreg sr.mdoh -edata 0xa5a5 \
-rreg sr.mdol -edata 0x5a5a
# check that mdi* unchanged (value from last write)
rlc exec \
-rreg sr.mdih -edata 0xa5a5 \
-rreg sr.mdil -edata 0x5a5a
# verify that mcmd write only
rlc exec -rreg sr.mcmd -estaterr; # expect err on read
#
#-------------------------------------------------------------------------
rlc log " test 3: test block write/read via mblk"
# write 8 longwords, check maddrl incremented
rlc exec \
-wreg sr.maddrh 0x0000 \
-wreg sr.maddrl 0x0010 \
-wblk sr.mblk {0x3020 0x1000 \
0x3121 0x1101 \
0x3222 0x1202 \
0x3323 0x1303 \
0x3424 0x1404 \
0x3525 0x1505 \
0x3626 0x1606 \
0x3727 0x1707} \
-rreg sr.maddrh -edata 0x0000 \
-rreg sr.maddrl -edata 0x0018
# read 8 longwords, check maddrl incremented
rlc exec \
-wreg sr.maddrh 0x0000 \
-wreg sr.maddrl 0x0010 \
-rblk sr.mblk 16 -edata {0x3020 0x1000 \
0x3121 0x1101 \
0x3222 0x1202 \
0x3323 0x1303 \
0x3424 0x1404 \
0x3525 0x1505 \
0x3626 0x1606 \
0x3727 0x1707} \
-rreg sr.maddrh -edata 0x0000 \
-rreg sr.maddrl -edata 0x0018
#
#-------------------------------------------------------------------------
rlc log " test 4: mcmd: ld,inc and be functionality"
# use memory as setup by previous test
# overwrite bytes 12(0001)=42, 13(0010)=53, 14(0100)=64, 15(1000)=75
rlc exec \
-wreg sr.maddrh 0x0003 \
-wreg sr.maddrl 0x0012 \
-wreg sr.mdih 0xffff \
-wreg sr.mdil 0xff42 \
-wreg sr.mcmd [regbld tst_sram::MCMD ld inc we {be 0x1} {addrh 0x0}] \
-wreg sr.mdil 0x53ff \
-wreg sr.mcmd [regbld tst_sram::MCMD inc we {be 0x2} ] \
-wreg sr.mdih 0xff64 \
-wreg sr.mdil 0xffff \
-wreg sr.mcmd [regbld tst_sram::MCMD inc we {be 0x4} ] \
-wreg sr.mdih 0x75ff \
-wreg sr.mcmd [regbld tst_sram::MCMD inc we {be 0x8} ]
# check load maddrh and increment of maddrl; read back and check
rlc exec \
-rreg sr.maddrh -edata 0x0000 \
-rreg sr.maddrl -edata 0x0016 \
-wreg sr.maddrl 0x0010 \
-rblk sr.mblk 16 -edata {0x3020 0x1000 \
0x3121 0x1101 \
0x3222 0x1242 \
0x3323 0x5303 \
0x3464 0x1404 \
0x7525 0x1505 \
0x3626 0x1606 \
0x3727 0x1707}
#
#-------------------------------------------------------------------------
rlc log " test 5: test saddr,slim,sblk,sblkc,sblkd"
# write/read saddr/slim
rlc exec \
-wreg sr.slim 0x0123 \
-wreg sr.saddr 0x0345 \
-rreg sr.slim -edata 0x0123 \
-rreg sr.saddr -edata 0x0345
# sblk write of 8 lines, check saddr incremented
rlc exec \
-wreg sr.saddr 0x0000 \
-wblk sr.sblk {0x0300 0x0200 0x0100 0x0000 \
0x0301 0x0201 0x0101 0x0001 \
0x0302 0x0202 0x0102 0x0002 \
0x0303 0x0203 0x0103 0x0003 \
0x0304 0x0204 0x0104 0x0004 \
0x0305 0x0205 0x0105 0x0005 \
0x0306 0x0206 0x0106 0x0006 \
0x0307 0x0207 0x0107 0x0007 } \
-rreg sr.saddr -edata 0x0008
# sblk read back
rlc exec \
-wreg sr.saddr 0x0000 \
-rblk sr.sblk 32 -edata {0x0300 0x0200 0x0100 0x0000 \
0x0301 0x0201 0x0101 0x0001 \
0x0302 0x0202 0x0102 0x0002 \
0x0303 0x0203 0x0103 0x0003 \
0x0304 0x0204 0x0104 0x0004 \
0x0305 0x0205 0x0105 0x0005 \
0x0306 0x0206 0x0106 0x0006 \
0x0307 0x0207 0x0107 0x0007 } \
-rreg sr.saddr -edata 0x0008
# sblkc (over-)write of 4 lines (1-4)
rlc exec \
-wreg sr.saddr 0x0001 \
-wblk sr.sblkc {0x1301 0x1201 \
0x1302 0x1202 \
0x1303 0x1203 \
0x1304 0x1204 } \
-rreg sr.saddr -edata 0x0005
# sblkd (over-)write of 4 lines (3-6)
rlc exec \
-wreg sr.saddr 0x0003 \
-wblk sr.sblkd {0x2103 0x2003 \
0x2104 0x2004 \
0x2105 0x2005 \
0x2106 0x2006 } \
-rreg sr.saddr -edata 0x0007
# sblk read back of all 8 lines, verify c and d updates
rlc exec \
-wreg sr.saddr 0x0000 \
-rblk sr.sblk 32 -edata {0x0300 0x0200 0x0100 0x0000 \
0x1301 0x1201 0x0101 0x0001 \
0x1302 0x1202 0x0102 0x0002 \
0x1303 0x1203 0x2103 0x2003 \
0x1304 0x1204 0x2104 0x2004 \
0x0305 0x0205 0x2105 0x2005 \
0x0306 0x0206 0x2106 0x2006 \
0x0307 0x0207 0x0107 0x0007} \
-rreg sr.saddr -edata 0x0008
# sblkc read back of all 8 lines
rlc exec \
-wreg sr.saddr 0x0000 \
-rblk sr.sblkc 16 -edata {0x0300 0x0200 \
0x1301 0x1201 \
0x1302 0x1202 \
0x1303 0x1203 \
0x1304 0x1204 \
0x0305 0x0205 \
0x0306 0x0206 \
0x0307 0x0207} \
-rreg sr.saddr -edata 0x0008
# sblkd read back of all 8 lines
rlc exec \
-wreg sr.saddr 0x0000 \
-rblk sr.sblkd 16 -edata {0x0100 0x0000 \
0x0101 0x0001 \
0x0102 0x0002 \
0x2103 0x2003 \
0x2104 0x2004 \
0x2105 0x2005 \
0x2106 0x2006 \
0x0107 0x0007} \
-rreg sr.saddr -edata 0x0008
#
#-------------------------------------------------------------------------
rlc log " test 5: test sstat bits"
set sm [rutil::com16 [regbld tst_sram::SSTAT wide]]
rlc exec \
-wreg sr.sstat 0 \
-rreg sr.sstat -edata 0 $sm \
-wreg sr.sstat [regbld tst_sram::SSTAT veri ] \
-rreg sr.sstat -edata [regbld tst_sram::SSTAT veri ] $sm \
-wreg sr.sstat [regbld tst_sram::SSTAT xora ] \
-rreg sr.sstat -edata [regbld tst_sram::SSTAT xora ] $sm \
-wreg sr.sstat [regbld tst_sram::SSTAT xord ] \
-rreg sr.sstat -edata [regbld tst_sram::SSTAT xord ] $sm \
-wreg sr.sstat [regbld tst_sram::SSTAT loop ] \
-rreg sr.sstat -edata [regbld tst_sram::SSTAT loop ] $sm \
-wreg sr.sstat [regbld tst_sram::SSTAT wloop] \
-rreg sr.sstat -edata [regbld tst_sram::SSTAT wloop] $sm \
-wreg sr.sstat [regbld tst_sram::SSTAT wswap] \
-rreg sr.sstat -edata [regbld tst_sram::SSTAT wswap] $sm
#
#-------------------------------------------------------------------------
rlc log " test 6: test memory (touch 5(+5) evenly spaced addresses)"
# writes
# 18bit: 0x000000 0x010001 0x020002 0x030003 0x03ffff
rlc exec \
-wreg sr.mdih 0x5500 \
-wreg sr.mdil 0xaa00 \
-wreg sr.maddrl 0x0000 \
-wreg sr.mcmd [regbld tst_sram::MCMD ld inc we {be 0xf} {addrh 0x00}] \
-wreg sr.mdih 0x5501 \
-wreg sr.mdil 0xaa01 \
-wreg sr.mcmd [regbld tst_sram::MCMD ld inc we {be 0xf} {addrh 0x01}] \
-wreg sr.mdih 0x5502 \
-wreg sr.mdil 0xaa02 \
-wreg sr.mcmd [regbld tst_sram::MCMD ld inc we {be 0xf} {addrh 0x02}] \
-wreg sr.mdih 0x5503 \
-wreg sr.mdil 0xaa03 \
-wreg sr.mcmd [regbld tst_sram::MCMD ld inc we {be 0xf} {addrh 0x03}] \
-rreg sr.maddrl -edata 0x0004 \
-wreg sr.mdih 0x5504 \
-wreg sr.mdil 0xaa04 \
-wreg sr.maddrl 0xffff \
-wreg sr.mcmd [regbld tst_sram::MCMD ld we {be 0xf} {addrh 0x03}]
# 22bit: 0x040000 0x100001 0x200002 0x300003 0x3fffff
if {[iswide]} {
rlc exec \
-wreg sr.mdih 0xa500 \
-wreg sr.mdil 0x5a00 \
-wreg sr.maddrl 0x0000 \
-wreg sr.mcmd [regbld tst_sram::MCMD ld inc we {be 0xf} {addrh 0x04}] \
-wreg sr.mdih 0x5a01 \
-wreg sr.mdil 0x5a01 \
-wreg sr.mcmd [regbld tst_sram::MCMD ld inc we {be 0xf} {addrh 0x10}] \
-wreg sr.mdih 0x5a02 \
-wreg sr.mdil 0x5a02 \
-wreg sr.mcmd [regbld tst_sram::MCMD ld inc we {be 0xf} {addrh 0x20}] \
-wreg sr.mdih 0x5a03 \
-wreg sr.mdil 0x5a03 \
-wreg sr.mcmd [regbld tst_sram::MCMD ld inc we {be 0xf} {addrh 0x30}] \
-rreg sr.maddrl -edata 0x0004 \
-wreg sr.mdih 0x5a04 \
-wreg sr.mdil 0x5a04 \
-wreg sr.maddrl 0xffff \
-wreg sr.mcmd [regbld tst_sram::MCMD ld we {be 0xf} {addrh 0x3f}]
}
# reads
rlc exec \
-wreg sr.maddrl 0x0000 \
-wreg sr.mcmd [regbld tst_sram::MCMD ld inc {be 0xf} {addrh 0x00}] \
-rreg sr.mdoh -edata 0x5500 \
-rreg sr.mdol -edata 0xaa00 \
-wreg sr.mcmd [regbld tst_sram::MCMD ld inc {be 0xf} {addrh 0x01}] \
-rreg sr.mdoh -edata 0x5501 \
-rreg sr.mdol -edata 0xaa01 \
-wreg sr.mcmd [regbld tst_sram::MCMD ld inc {be 0xf} {addrh 0x02}] \
-rreg sr.mdoh -edata 0x5502 \
-rreg sr.mdol -edata 0xaa02 \
-wreg sr.mcmd [regbld tst_sram::MCMD ld inc {be 0xf} {addrh 0x03}] \
-rreg sr.mdoh -edata 0x5503 \
-rreg sr.mdol -edata 0xaa03 \
-rreg sr.maddrl -edata 0x0004 \
-wreg sr.maddrl 0xffff \
-wreg sr.mcmd [regbld tst_sram::MCMD ld {be 0xf} {addrh 0x03}] \
-rreg sr.mdoh -edata 0x5504 \
-rreg sr.mdol -edata 0xaa04
if {[iswide]} {
rlc exec \
-wreg sr.maddrl 0x0000 \
-wreg sr.mcmd [regbld tst_sram::MCMD ld inc {be 0xf} {addrh 0x04}] \
-rreg sr.mdoh -edata 0xa500 \
-rreg sr.mdol -edata 0x5a00 \
-wreg sr.mcmd [regbld tst_sram::MCMD ld inc {be 0xf} {addrh 0x10}] \
-rreg sr.mdoh -edata 0x5a01 \
-rreg sr.mdol -edata 0x5a01 \
-wreg sr.mcmd [regbld tst_sram::MCMD ld inc {be 0xf} {addrh 0x20}] \
-rreg sr.mdoh -edata 0x5a02 \
-rreg sr.mdol -edata 0x5a02 \
-wreg sr.mcmd [regbld tst_sram::MCMD ld inc {be 0xf} {addrh 0x30}] \
-rreg sr.mdoh -edata 0x5a03 \
-rreg sr.mdol -edata 0x5a03 \
-rreg sr.maddrl -edata 0x0004 \
-wreg sr.maddrl 0xffff \
-wreg sr.mcmd [regbld tst_sram::MCMD ld {be 0xf} {addrh 0x3f}] \
-rreg sr.mdoh -edata 0x5a04 \
-rreg sr.mdol -edata 0x5a04
}
#
#-------------------------------------------------------------------------
incr errcnt [rlc errcnt -clear]
return $errcnt
}
}

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@@ -0,0 +1,690 @@
# $Id: test_scmdlist.tcl 784 2016-07-09 22:17:01Z mueller $
#
# Copyright 2014- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
# This program is free software; you may redistribute and/or modify it under
# the terms of the GNU General Public License as published by the Free
# Software Foundation, either version 2, or at your option any later version.
#
# This program is distributed in the hope that it will be useful, but
# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
# for complete details.
#
# Revision History:
# Date Rev Version Comment
# 2014-08-14 582 1.0 Initial version
#
package provide tst_sram 1.0
namespace eval tst_sram {
#
# test_scmdlist: default scmd list -----------------------------------------
# was converted with conv_sblk from cmd_tst_sram_stress_sblk.dat
#
proc test_scmdlist {} {
set clist {}
## C Setup Memory stress test
## C write 16 unique byte patterns (and verify)
lappend clist { 0 w 1111 0x000000 0x30201000};
lappend clist { 0 w 1111 0x000001 0x31211101};
lappend clist { 0 w 1111 0x000002 0x32221202};
lappend clist { 0 w 1111 0x000003 0x33231303};
lappend clist { 0 w 1111 0x000004 0x34241404};
lappend clist { 0 w 1111 0x000005 0x35251505};
lappend clist { 0 w 1111 0x000006 0x36261606};
lappend clist { 0 w 1111 0x000007 0x37271707};
lappend clist { 0 w 1111 0x000008 0x38281808};
lappend clist { 0 w 1111 0x000009 0x39291909};
lappend clist { 0 w 1111 0x00000a 0x3a2a1a0a};
lappend clist { 0 w 1111 0x00000b 0x3b2b1b0b};
lappend clist { 0 w 1111 0x00000c 0x3c2c1c0c};
lappend clist { 0 w 1111 0x00000d 0x3d2d1d0d};
lappend clist { 0 w 1111 0x00000e 0x3e2e1e0e};
lappend clist { 0 w 1111 0x00000f 0x3f2f1f0f};
lappend clist { 0 r 1111 0x000000 0x30201000};
lappend clist { 0 r 1111 0x000001 0x31211101};
lappend clist { 0 r 1111 0x000002 0x32221202};
lappend clist { 0 r 1111 0x000003 0x33231303};
lappend clist { 0 r 1111 0x000004 0x34241404};
lappend clist { 0 r 1111 0x000005 0x35251505};
lappend clist { 0 r 1111 0x000006 0x36261606};
lappend clist { 0 r 1111 0x000007 0x37271707};
lappend clist { 0 r 1111 0x000008 0x38281808};
lappend clist { 0 r 1111 0x000009 0x39291909};
lappend clist { 0 r 1111 0x00000a 0x3a2a1a0a};
lappend clist { 0 r 1111 0x00000b 0x3b2b1b0b};
lappend clist { 0 r 1111 0x00000c 0x3c2c1c0c};
lappend clist { 0 r 1111 0x00000d 0x3d2d1d0d};
lappend clist { 0 r 1111 0x00000e 0x3e2e1e0e};
lappend clist { 0 r 1111 0x00000f 0x3f2f1f0f};
## C single byte writes, all 16 pattern (and verify)
lappend clist { 0 w 0000 0x000000 0x70605040};
lappend clist { 0 w 0001 0x000001 0x71615141};
lappend clist { 0 w 0010 0x000002 0x72625242};
lappend clist { 0 w 0011 0x000003 0x73635343};
lappend clist { 0 w 0100 0x000004 0x74645444};
lappend clist { 0 w 0101 0x000005 0x75655545};
lappend clist { 0 w 0110 0x000006 0x76665646};
lappend clist { 0 w 0111 0x000007 0x77675747};
lappend clist { 0 w 1000 0x000008 0x78685848};
lappend clist { 0 w 1001 0x000009 0x79695949};
lappend clist { 0 w 1010 0x00000a 0x7a6a5a4a};
lappend clist { 0 w 1011 0x00000b 0x7b6b5b4b};
lappend clist { 0 w 1100 0x00000c 0x7c6c5c4c};
lappend clist { 0 w 1101 0x00000d 0x7d6d5d4d};
lappend clist { 0 w 1110 0x00000e 0x7e6e5e4e};
lappend clist { 0 w 1111 0x00000f 0x7f6f5f4f};
lappend clist { 0 r 1111 0x000000 0x30201000};
lappend clist { 0 r 1111 0x000001 0x31211141};
lappend clist { 0 r 1111 0x000002 0x32225202};
lappend clist { 0 r 1111 0x000003 0x33235343};
lappend clist { 0 r 1111 0x000004 0x34641404};
lappend clist { 0 r 1111 0x000005 0x35651545};
lappend clist { 0 r 1111 0x000006 0x36665606};
lappend clist { 0 r 1111 0x000007 0x37675747};
lappend clist { 0 r 1111 0x000008 0x78281808};
lappend clist { 0 r 1111 0x000009 0x79291949};
lappend clist { 0 r 1111 0x00000a 0x7a2a5a0a};
lappend clist { 0 r 1111 0x00000b 0x7b2b5b4b};
lappend clist { 0 r 1111 0x00000c 0x7c6c1c0c};
lappend clist { 0 r 1111 0x00000d 0x7d6d1d4d};
lappend clist { 0 r 1111 0x00000e 0x7e6e5e0e};
lappend clist { 0 r 1111 0x00000f 0x7f6f5f4f};
## C write various 0-1 transition patterns (and verify)
lappend clist { 0 w 1111 0x000010 0x00000000};
lappend clist { 0 w 1111 0x000011 0xffffffff};
lappend clist { 0 w 1111 0x000012 0x00000000};
lappend clist { 0 w 1111 0x000013 0xa5a5a5a5};
lappend clist { 0 w 1111 0x000014 0x5a5a5a5a};
lappend clist { 0 w 1111 0x000015 0x00000000};
lappend clist { 0 w 1111 0x000016 0x0f0f0f0f};
lappend clist { 0 w 1111 0x000017 0xf0f0f0f0};
lappend clist { 0 w 1111 0x000018 0x00ff00ff};
lappend clist { 0 w 1111 0x000019 0xff00ff00};
lappend clist { 0 w 1111 0x00001a 0x0000ffff};
lappend clist { 0 w 1111 0x00001b 0xffff0000};
lappend clist { 0 w 1111 0x00001c 0x0ff00ff0};
lappend clist { 0 w 1111 0x00001d 0xf00ff00f};
lappend clist { 0 w 1111 0x00001e 0x01234567};
lappend clist { 0 w 1111 0x00001f 0x89abcdef};
lappend clist { 0 r 1111 0x000010 0x00000000};
lappend clist { 0 r 1111 0x000011 0xffffffff};
lappend clist { 0 r 1111 0x000012 0x00000000};
lappend clist { 0 r 1111 0x000013 0xa5a5a5a5};
lappend clist { 0 r 1111 0x000014 0x5a5a5a5a};
lappend clist { 0 r 1111 0x000015 0x00000000};
lappend clist { 0 r 1111 0x000016 0x0f0f0f0f};
lappend clist { 0 r 1111 0x000017 0xf0f0f0f0};
lappend clist { 0 r 1111 0x000018 0x00ff00ff};
lappend clist { 0 r 1111 0x000019 0xff00ff00};
lappend clist { 0 r 1111 0x00001a 0x0000ffff};
lappend clist { 0 r 1111 0x00001b 0xffff0000};
lappend clist { 0 r 1111 0x00001c 0x0ff00ff0};
lappend clist { 0 r 1111 0x00001d 0xf00ff00f};
lappend clist { 0 r 1111 0x00001e 0x01234567};
lappend clist { 0 r 1111 0x00001f 0x89abcdef};
## C alternate read sequence of 0-1 transition patterns
lappend clist { 0 r 1111 0x000010 0x00000000};
lappend clist { 0 r 1111 0x000011 0xffffffff};
lappend clist { 0 r 1111 0x00001a 0x0000ffff};
lappend clist { 0 r 1111 0x00001b 0xffff0000};
lappend clist { 0 r 1111 0x000012 0x00000000};
lappend clist { 0 r 1111 0x000013 0xa5a5a5a5};
lappend clist { 0 r 1111 0x000011 0xffffffff};
lappend clist { 0 r 1111 0x000014 0x5a5a5a5a};
lappend clist { 0 r 1111 0x000015 0x00000000};
lappend clist { 0 r 1111 0x000013 0xa5a5a5a5};
lappend clist { 0 r 1111 0x000015 0x00000000};
lappend clist { 0 r 1111 0x000014 0x5a5a5a5a};
lappend clist { 0 r 1111 0x000017 0xf0f0f0f0};
lappend clist { 0 r 1111 0x000016 0x0f0f0f0f};
lappend clist { 0 r 1111 0x000019 0xff00ff00};
lappend clist { 0 r 1111 0x000018 0x00ff00ff};
lappend clist { 0 r 1111 0x00001d 0xf00ff00f};
lappend clist { 0 r 1111 0x00001c 0x0ff00ff0};
lappend clist { 0 r 1111 0x000010 0x00000000};
lappend clist { 0 r 1111 0x00001e 0x01234567};
lappend clist { 0 r 1111 0x00001a 0x0000ffff};
lappend clist { 0 r 1111 0x00001f 0x89abcdef};
lappend clist { 0 r 1111 0x00001b 0xffff0000};
lappend clist { 0 r 1111 0x000012 0x00000000};
lappend clist { 0 r 1111 0x00001f 0x89abcdef};
lappend clist { 0 r 1111 0x000016 0x0f0f0f0f};
lappend clist { 0 r 1111 0x000018 0x00ff00ff};
lappend clist { 0 r 1111 0x000017 0xf0f0f0f0};
lappend clist { 0 r 1111 0x000019 0xff00ff00};
lappend clist { 0 r 1111 0x00001d 0xf00ff00f};
lappend clist { 0 r 1111 0x00001c 0x0ff00ff0};
lappend clist { 0 r 1111 0x00001e 0x01234567};
## C write alternating all-0 and all-1 at low and top addresses
lappend clist { 0 w 1111 0x000020 0x00000000};
lappend clist { 0 w 1111 0x000021 0xffffffff};
lappend clist { 0 w 1111 0x000022 0x00000000};
lappend clist { 0 w 1111 0x000023 0xffffffff};
lappend clist { 0 w 1111 0x000024 0x00000000};
lappend clist { 0 w 1111 0x000025 0xffffffff};
lappend clist { 0 w 1111 0x000026 0x00000000};
lappend clist { 0 w 1111 0x000027 0xffffffff};
lappend clist { 0 w 1111 0x000028 0x00000000};
lappend clist { 0 w 1111 0x03fff9 0xffffffff};
lappend clist { 0 w 1111 0x00002a 0x00000000};
lappend clist { 0 w 1111 0x03fffb 0xffffffff};
lappend clist { 0 w 1111 0x03fffc 0x00000000};
lappend clist { 0 w 1111 0x00002d 0xffffffff};
lappend clist { 0 w 1111 0x03fffe 0x00000000};
lappend clist { 0 w 1111 0x00002f 0xffffffff};
lappend clist { 0 w 1111 0x03fff0 0x00000000};
lappend clist { 0 w 1111 0x03fff1 0xffffffff};
lappend clist { 0 w 1111 0x03fff2 0x00000000};
lappend clist { 0 w 1111 0x03fff3 0xffffffff};
lappend clist { 0 w 1111 0x03fff4 0x00000000};
lappend clist { 0 w 1111 0x03fff5 0xffffffff};
lappend clist { 0 w 1111 0x03fff6 0x00000000};
lappend clist { 0 w 1111 0x03fff7 0xffffffff};
lappend clist { 0 w 1111 0x03fff8 0x00000000};
lappend clist { 0 w 1111 0x000029 0xffffffff};
lappend clist { 0 w 1111 0x03fffa 0x00000000};
lappend clist { 0 w 1111 0x00002b 0xffffffff};
lappend clist { 0 w 1111 0x00002c 0x00000000};
lappend clist { 0 w 1111 0x03fffd 0xffffffff};
lappend clist { 0 w 1111 0x00002e 0x00000000};
lappend clist { 0 w 1111 0x03ffff 0xffffffff};
## C read alternating all-0 and all-1 sequence, only data bounce
lappend clist { 0 r 1111 0x000020 0x00000000};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x000022 0x00000000};
lappend clist { 0 r 1111 0x000023 0xffffffff};
lappend clist { 0 r 1111 0x000024 0x00000000};
lappend clist { 0 r 1111 0x000025 0xffffffff};
lappend clist { 0 r 1111 0x000026 0x00000000};
lappend clist { 0 r 1111 0x000027 0xffffffff};
lappend clist { 0 r 1111 0x000028 0x00000000};
lappend clist { 0 r 1111 0x000029 0xffffffff};
lappend clist { 0 r 1111 0x00002a 0x00000000};
lappend clist { 0 r 1111 0x00002b 0xffffffff};
lappend clist { 0 r 1111 0x00002c 0x00000000};
lappend clist { 0 r 1111 0x00002d 0xffffffff};
lappend clist { 0 r 1111 0x00002e 0x00000000};
lappend clist { 0 r 1111 0x00002f 0xffffffff};
lappend clist { 0 r 1111 0x03fff0 0x00000000};
lappend clist { 0 r 1111 0x03fff1 0xffffffff};
lappend clist { 0 r 1111 0x03fff2 0x00000000};
lappend clist { 0 r 1111 0x03fff3 0xffffffff};
lappend clist { 0 r 1111 0x03fff4 0x00000000};
lappend clist { 0 r 1111 0x03fff5 0xffffffff};
lappend clist { 0 r 1111 0x03fff6 0x00000000};
lappend clist { 0 r 1111 0x03fff7 0xffffffff};
lappend clist { 0 r 1111 0x03fff8 0x00000000};
lappend clist { 0 r 1111 0x03fff9 0xffffffff};
lappend clist { 0 r 1111 0x03fffa 0x00000000};
lappend clist { 0 r 1111 0x03fffb 0xffffffff};
lappend clist { 0 r 1111 0x03fffc 0x00000000};
lappend clist { 0 r 1111 0x03fffd 0xffffffff};
lappend clist { 0 r 1111 0x03fffe 0x00000000};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
## C read alternating all-0 and all-1 sequence, addr and data bounce
lappend clist { 0 r 1111 0x000020 0x00000000};
lappend clist { 0 r 1111 0x03fff1 0xffffffff};
lappend clist { 0 r 1111 0x000022 0x00000000};
lappend clist { 0 r 1111 0x03fff3 0xffffffff};
lappend clist { 0 r 1111 0x000024 0x00000000};
lappend clist { 0 r 1111 0x03fff5 0xffffffff};
lappend clist { 0 r 1111 0x000026 0x00000000};
lappend clist { 0 r 1111 0x03fff7 0xffffffff};
lappend clist { 0 r 1111 0x000028 0x00000000};
lappend clist { 0 r 1111 0x000029 0xffffffff};
lappend clist { 0 r 1111 0x03fffa 0x00000000};
lappend clist { 0 r 1111 0x00002b 0xffffffff};
lappend clist { 0 r 1111 0x03fffc 0x00000000};
lappend clist { 0 r 1111 0x00002d 0xffffffff};
lappend clist { 0 r 1111 0x03fffe 0x00000000};
lappend clist { 0 r 1111 0x00002f 0xffffffff};
lappend clist { 0 r 1111 0x03fff0 0x00000000};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x03fff2 0x00000000};
lappend clist { 0 r 1111 0x000023 0xffffffff};
lappend clist { 0 r 1111 0x03fff4 0x00000000};
lappend clist { 0 r 1111 0x000025 0xffffffff};
lappend clist { 0 r 1111 0x03fff6 0x00000000};
lappend clist { 0 r 1111 0x000027 0xffffffff};
lappend clist { 0 r 1111 0x03fff8 0x00000000};
lappend clist { 0 r 1111 0x03fff9 0xffffffff};
lappend clist { 0 r 1111 0x00002a 0x00000000};
lappend clist { 0 r 1111 0x03fffb 0xffffffff};
lappend clist { 0 r 1111 0x00002c 0x00000000};
lappend clist { 0 r 1111 0x03fffd 0xffffffff};
lappend clist { 0 r 1111 0x00002e 0x00000000};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
## C write 32 words with single 1 bit (and verify)
lappend clist { 0 w 1111 0x000040 0x00000001};
lappend clist { 0 w 1111 0x000041 0x00000002};
lappend clist { 0 w 1111 0x000042 0x00000004};
lappend clist { 0 w 1111 0x000043 0x00000008};
lappend clist { 0 w 1111 0x000044 0x00000010};
lappend clist { 0 w 1111 0x000045 0x00000020};
lappend clist { 0 w 1111 0x000046 0x00000040};
lappend clist { 0 w 1111 0x000047 0x00000080};
lappend clist { 0 w 1111 0x000048 0x00000100};
lappend clist { 0 w 1111 0x000049 0x00000200};
lappend clist { 0 w 1111 0x00004a 0x00000400};
lappend clist { 0 w 1111 0x00004b 0x00000800};
lappend clist { 0 w 1111 0x00004c 0x00001000};
lappend clist { 0 w 1111 0x00004d 0x00002000};
lappend clist { 0 w 1111 0x00004e 0x00004000};
lappend clist { 0 w 1111 0x00004f 0x00008000};
lappend clist { 0 w 1111 0x000050 0x00010000};
lappend clist { 0 w 1111 0x000051 0x00020000};
lappend clist { 0 w 1111 0x000052 0x00040000};
lappend clist { 0 w 1111 0x000053 0x00080000};
lappend clist { 0 w 1111 0x000054 0x00100000};
lappend clist { 0 w 1111 0x000055 0x00200000};
lappend clist { 0 w 1111 0x000056 0x00400000};
lappend clist { 0 w 1111 0x000057 0x00800000};
lappend clist { 0 w 1111 0x000058 0x01000000};
lappend clist { 0 w 1111 0x000059 0x02000000};
lappend clist { 0 w 1111 0x00005a 0x04000000};
lappend clist { 0 w 1111 0x00005b 0x08000000};
lappend clist { 0 w 1111 0x00005c 0x10000000};
lappend clist { 0 w 1111 0x00005d 0x20000000};
lappend clist { 0 w 1111 0x00005e 0x40000000};
lappend clist { 0 w 1111 0x00005f 0x80000000};
lappend clist { 0 r 1111 0x000040 0x00000001};
lappend clist { 0 r 1111 0x000041 0x00000002};
lappend clist { 0 r 1111 0x000042 0x00000004};
lappend clist { 0 r 1111 0x000043 0x00000008};
lappend clist { 0 r 1111 0x000044 0x00000010};
lappend clist { 0 r 1111 0x000045 0x00000020};
lappend clist { 0 r 1111 0x000046 0x00000040};
lappend clist { 0 r 1111 0x000047 0x00000080};
lappend clist { 0 r 1111 0x000048 0x00000100};
lappend clist { 0 r 1111 0x000049 0x00000200};
lappend clist { 0 r 1111 0x00004a 0x00000400};
lappend clist { 0 r 1111 0x00004b 0x00000800};
lappend clist { 0 r 1111 0x00004c 0x00001000};
lappend clist { 0 r 1111 0x00004d 0x00002000};
lappend clist { 0 r 1111 0x00004e 0x00004000};
lappend clist { 0 r 1111 0x00004f 0x00008000};
lappend clist { 0 r 1111 0x000050 0x00010000};
lappend clist { 0 r 1111 0x000051 0x00020000};
lappend clist { 0 r 1111 0x000052 0x00040000};
lappend clist { 0 r 1111 0x000053 0x00080000};
lappend clist { 0 r 1111 0x000054 0x00100000};
lappend clist { 0 r 1111 0x000055 0x00200000};
lappend clist { 0 r 1111 0x000056 0x00400000};
lappend clist { 0 r 1111 0x000057 0x00800000};
lappend clist { 0 r 1111 0x000058 0x01000000};
lappend clist { 0 r 1111 0x000059 0x02000000};
lappend clist { 0 r 1111 0x00005a 0x04000000};
lappend clist { 0 r 1111 0x00005b 0x08000000};
lappend clist { 0 r 1111 0x00005c 0x10000000};
lappend clist { 0 r 1111 0x00005d 0x20000000};
lappend clist { 0 r 1111 0x00005e 0x40000000};
lappend clist { 0 r 1111 0x00005f 0x80000000};
## C alternating read of 1 bit and all-1 word
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x000040 0x00000001};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x000041 0x00000002};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x000042 0x00000004};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x000043 0x00000008};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x000044 0x00000010};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x000045 0x00000020};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x000046 0x00000040};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x000047 0x00000080};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x000048 0x00000100};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x000049 0x00000200};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x00004a 0x00000400};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x00004b 0x00000800};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x00004c 0x00001000};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x00004d 0x00002000};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x00004e 0x00004000};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x00004f 0x00008000};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x000050 0x00010000};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x000051 0x00020000};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x000052 0x00040000};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x000053 0x00080000};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x000054 0x00100000};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x000055 0x00200000};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x000056 0x00400000};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x000057 0x00800000};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x000058 0x01000000};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x000059 0x02000000};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x00005a 0x04000000};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x00005b 0x08000000};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x00005c 0x10000000};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x00005d 0x20000000};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x00005e 0x40000000};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x00005f 0x80000000};
## C write 32 words with thermometer code (and verify)
lappend clist { 0 w 1111 0x000060 0x00000001};
lappend clist { 0 w 1111 0x000061 0x00000003};
lappend clist { 0 w 1111 0x000062 0x00000007};
lappend clist { 0 w 1111 0x000063 0x0000000f};
lappend clist { 0 w 1111 0x000064 0x0000001f};
lappend clist { 0 w 1111 0x000065 0x0000003f};
lappend clist { 0 w 1111 0x000066 0x0000007f};
lappend clist { 0 w 1111 0x000067 0x000000ff};
lappend clist { 0 w 1111 0x000068 0x000001ff};
lappend clist { 0 w 1111 0x000069 0x000003ff};
lappend clist { 0 w 1111 0x00006a 0x000007ff};
lappend clist { 0 w 1111 0x00006b 0x00000fff};
lappend clist { 0 w 1111 0x00006c 0x00001fff};
lappend clist { 0 w 1111 0x00006d 0x00003fff};
lappend clist { 0 w 1111 0x00006e 0x00007fff};
lappend clist { 0 w 1111 0x00006f 0x0000ffff};
lappend clist { 0 w 1111 0x000070 0x0001ffff};
lappend clist { 0 w 1111 0x000071 0x0003ffff};
lappend clist { 0 w 1111 0x000072 0x0007ffff};
lappend clist { 0 w 1111 0x000073 0x000fffff};
lappend clist { 0 w 1111 0x000074 0x001fffff};
lappend clist { 0 w 1111 0x000075 0x003fffff};
lappend clist { 0 w 1111 0x000076 0x007fffff};
lappend clist { 0 w 1111 0x000077 0x00ffffff};
lappend clist { 0 w 1111 0x000078 0x01ffffff};
lappend clist { 0 w 1111 0x000079 0x03ffffff};
lappend clist { 0 w 1111 0x00007a 0x07ffffff};
lappend clist { 0 w 1111 0x00007b 0x0fffffff};
lappend clist { 0 w 1111 0x00007c 0x1fffffff};
lappend clist { 0 w 1111 0x00007d 0x3fffffff};
lappend clist { 0 w 1111 0x00007e 0x7fffffff};
lappend clist { 0 w 1111 0x00007f 0xffffffff};
lappend clist { 0 r 1111 0x000060 0x00000001};
lappend clist { 0 r 1111 0x000061 0x00000003};
lappend clist { 0 r 1111 0x000062 0x00000007};
lappend clist { 0 r 1111 0x000063 0x0000000f};
lappend clist { 0 r 1111 0x000064 0x0000001f};
lappend clist { 0 r 1111 0x000065 0x0000003f};
lappend clist { 0 r 1111 0x000066 0x0000007f};
lappend clist { 0 r 1111 0x000067 0x000000ff};
lappend clist { 0 r 1111 0x000068 0x000001ff};
lappend clist { 0 r 1111 0x000069 0x000003ff};
lappend clist { 0 r 1111 0x00006a 0x000007ff};
lappend clist { 0 r 1111 0x00006b 0x00000fff};
lappend clist { 0 r 1111 0x00006c 0x00001fff};
lappend clist { 0 r 1111 0x00006d 0x00003fff};
lappend clist { 0 r 1111 0x00006e 0x00007fff};
lappend clist { 0 r 1111 0x00006f 0x0000ffff};
lappend clist { 0 r 1111 0x000070 0x0001ffff};
lappend clist { 0 r 1111 0x000071 0x0003ffff};
lappend clist { 0 r 1111 0x000072 0x0007ffff};
lappend clist { 0 r 1111 0x000073 0x000fffff};
lappend clist { 0 r 1111 0x000074 0x001fffff};
lappend clist { 0 r 1111 0x000075 0x003fffff};
lappend clist { 0 r 1111 0x000076 0x007fffff};
lappend clist { 0 r 1111 0x000077 0x00ffffff};
lappend clist { 0 r 1111 0x000078 0x01ffffff};
lappend clist { 0 r 1111 0x000079 0x03ffffff};
lappend clist { 0 r 1111 0x00007a 0x07ffffff};
lappend clist { 0 r 1111 0x00007b 0x0fffffff};
lappend clist { 0 r 1111 0x00007c 0x1fffffff};
lappend clist { 0 r 1111 0x00007d 0x3fffffff};
lappend clist { 0 r 1111 0x00007e 0x7fffffff};
lappend clist { 0 r 1111 0x00007f 0xffffffff};
## C alternating read of thermometer code and all-1 word
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x000060 0x00000001};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x000061 0x00000003};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x000062 0x00000007};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x000063 0x0000000f};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x000064 0x0000001f};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x000065 0x0000003f};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x000066 0x0000007f};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x000067 0x000000ff};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x000068 0x000001ff};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x000069 0x000003ff};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x00006a 0x000007ff};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x00006b 0x00000fff};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x00006c 0x00001fff};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x00006d 0x00003fff};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x00006e 0x00007fff};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x00006f 0x0000ffff};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x000070 0x0001ffff};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x000071 0x0003ffff};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x000072 0x0007ffff};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x000073 0x000fffff};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x000074 0x001fffff};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x000075 0x003fffff};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x000076 0x007fffff};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x000077 0x00ffffff};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x000078 0x01ffffff};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x000079 0x03ffffff};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x00007a 0x07ffffff};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x00007b 0x0fffffff};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x00007c 0x1fffffff};
lappend clist { 0 r 1111 0x000021 0xffffffff};
lappend clist { 0 r 1111 0x00007d 0x3fffffff};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x00007e 0x7fffffff};
lappend clist { 0 r 1111 0x03ffff 0xffffffff};
lappend clist { 0 r 1111 0x00007f 0xffffffff};
## C alternating read of thermometer code and all-0 word
lappend clist { 0 r 1111 0x000020 0x00000000};
lappend clist { 0 r 1111 0x000060 0x00000001};
lappend clist { 0 r 1111 0x000020 0x00000000};
lappend clist { 0 r 1111 0x000061 0x00000003};
lappend clist { 0 r 1111 0x03fffe 0x00000000};
lappend clist { 0 r 1111 0x000062 0x00000007};
lappend clist { 0 r 1111 0x03fffe 0x00000000};
lappend clist { 0 r 1111 0x000063 0x0000000f};
lappend clist { 0 r 1111 0x000020 0x00000000};
lappend clist { 0 r 1111 0x000064 0x0000001f};
lappend clist { 0 r 1111 0x000020 0x00000000};
lappend clist { 0 r 1111 0x000065 0x0000003f};
lappend clist { 0 r 1111 0x03fffe 0x00000000};
lappend clist { 0 r 1111 0x000066 0x0000007f};
lappend clist { 0 r 1111 0x03fffe 0x00000000};
lappend clist { 0 r 1111 0x000067 0x000000ff};
lappend clist { 0 r 1111 0x000020 0x00000000};
lappend clist { 0 r 1111 0x000068 0x000001ff};
lappend clist { 0 r 1111 0x000020 0x00000000};
lappend clist { 0 r 1111 0x000069 0x000003ff};
lappend clist { 0 r 1111 0x03fffe 0x00000000};
lappend clist { 0 r 1111 0x00006a 0x000007ff};
lappend clist { 0 r 1111 0x03fffe 0x00000000};
lappend clist { 0 r 1111 0x00006b 0x00000fff};
lappend clist { 0 r 1111 0x000020 0x00000000};
lappend clist { 0 r 1111 0x00006c 0x00001fff};
lappend clist { 0 r 1111 0x000020 0x00000000};
lappend clist { 0 r 1111 0x00006d 0x00003fff};
lappend clist { 0 r 1111 0x03fffe 0x00000000};
lappend clist { 0 r 1111 0x00006e 0x00007fff};
lappend clist { 0 r 1111 0x03fffe 0x00000000};
lappend clist { 0 r 1111 0x00006f 0x0000ffff};
lappend clist { 0 r 1111 0x000020 0x00000000};
lappend clist { 0 r 1111 0x000070 0x0001ffff};
lappend clist { 0 r 1111 0x000020 0x00000000};
lappend clist { 0 r 1111 0x000071 0x0003ffff};
lappend clist { 0 r 1111 0x03fffe 0x00000000};
lappend clist { 0 r 1111 0x000072 0x0007ffff};
lappend clist { 0 r 1111 0x03fffe 0x00000000};
lappend clist { 0 r 1111 0x000073 0x000fffff};
lappend clist { 0 r 1111 0x000020 0x00000000};
lappend clist { 0 r 1111 0x000074 0x001fffff};
lappend clist { 0 r 1111 0x000020 0x00000000};
lappend clist { 0 r 1111 0x000075 0x003fffff};
lappend clist { 0 r 1111 0x03fffe 0x00000000};
lappend clist { 0 r 1111 0x000076 0x007fffff};
lappend clist { 0 r 1111 0x03fffe 0x00000000};
lappend clist { 0 r 1111 0x000077 0x00ffffff};
lappend clist { 0 r 1111 0x000020 0x00000000};
lappend clist { 0 r 1111 0x000078 0x01ffffff};
lappend clist { 0 r 1111 0x000020 0x00000000};
lappend clist { 0 r 1111 0x000079 0x03ffffff};
lappend clist { 0 r 1111 0x03fffe 0x00000000};
lappend clist { 0 r 1111 0x00007a 0x07ffffff};
lappend clist { 0 r 1111 0x03fffe 0x00000000};
lappend clist { 0 r 1111 0x00007b 0x0fffffff};
lappend clist { 0 r 1111 0x000020 0x00000000};
lappend clist { 0 r 1111 0x00007c 0x1fffffff};
lappend clist { 0 r 1111 0x000020 0x00000000};
lappend clist { 0 r 1111 0x00007d 0x3fffffff};
lappend clist { 0 r 1111 0x03fffe 0x00000000};
lappend clist { 0 r 1111 0x00007e 0x7fffffff};
lappend clist { 0 r 1111 0x03fffe 0x00000000};
lappend clist { 0 r 1111 0x00007f 0xffffffff};
## # random sequence generated with gen_tst_sram_ranseq 64
## C now do some write/read tests with random addr/data
## C 16 writes
lappend clist { 0 w 1111 0x0039dc 0x96d0e73e};
lappend clist { 0 w 1111 0x006d4a 0xbbbb4372};
lappend clist { 0 w 1111 0x0092b6 0xf58ace40};
lappend clist { 0 w 1111 0x01393e 0xeb748a98};
lappend clist { 0 w 1111 0x019b4c 0x69281826};
lappend clist { 0 w 1111 0x02a8ba 0xdae538d7};
lappend clist { 0 w 1111 0x00341a 0x8f42ffbd};
lappend clist { 0 w 1111 0x01b18a 0x5b523e97};
lappend clist { 0 w 1111 0x039bb7 0x46eea237};
lappend clist { 0 w 1111 0x03f294 0x8824fcef};
lappend clist { 0 w 1111 0x036375 0xd1c10ba8};
lappend clist { 0 w 1111 0x0067f6 0xfc93d1dc};
lappend clist { 0 w 1111 0x01242e 0x1316562d};
lappend clist { 0 w 1111 0x00a090 0x0779b757};
lappend clist { 0 w 1111 0x01aebe 0xe06ae43f};
lappend clist { 0 w 1111 0x019109 0xf558ccb4};
## C 16 writes and 16 reads mixed
lappend clist { 0 w 1111 0x03c4a6 0x96dbbcff};
lappend clist { 0 r 1111 0x0039dc 0x96d0e73e};
lappend clist { 0 w 1111 0x016ea6 0x14010c8f};
lappend clist { 0 r 1111 0x006d4a 0xbbbb4372};
lappend clist { 0 r 1111 0x0092b6 0xf58ace40};
lappend clist { 0 w 1111 0x037728 0xe4b4e052};
lappend clist { 0 w 1111 0x0265d5 0x9d612c95};
lappend clist { 0 r 1111 0x01393e 0xeb748a98};
lappend clist { 0 w 1111 0x017b76 0xfe2576be};
lappend clist { 0 r 1111 0x019b4c 0x69281826};
lappend clist { 0 w 1111 0x0172cc 0x4f67af1f};
lappend clist { 0 w 1111 0x005b4b 0x8f7e559d};
lappend clist { 0 w 1111 0x019341 0xa829717d};
lappend clist { 0 r 1111 0x02a8ba 0xdae538d7};
lappend clist { 0 r 1111 0x00341a 0x8f42ffbd};
lappend clist { 0 r 1111 0x01b18a 0x5b523e97};
lappend clist { 0 w 1111 0x034de2 0xd53f120f};
lappend clist { 0 r 1111 0x039bb7 0x46eea237};
lappend clist { 0 w 1111 0x02119e 0x6253f647};
lappend clist { 0 r 1111 0x03f294 0x8824fcef};
lappend clist { 0 w 1111 0x00f1ac 0x936c2522};
lappend clist { 0 r 1111 0x036375 0xd1c10ba8};
lappend clist { 0 w 1111 0x00716b 0x2db9e1fa};
lappend clist { 0 r 1111 0x0067f6 0xfc93d1dc};
lappend clist { 0 w 1111 0x01781f 0xae31b1e7};
lappend clist { 0 r 1111 0x01242e 0x1316562d};
lappend clist { 0 w 1111 0x0187bf 0xccdbf8e7};
lappend clist { 0 w 1111 0x029b82 0x95274e53};
lappend clist { 0 r 1111 0x00a090 0x0779b757};
lappend clist { 0 r 1111 0x01aebe 0xe06ae43f};
lappend clist { 0 w 1111 0x0244c7 0x5fd2ee97};
lappend clist { 0 r 1111 0x019109 0xf558ccb4};
## C 16 writes and 16 reads mixed, with waits
lappend clist { 0 w 1111 0x0239b6 0x8f147909};
lappend clist { 1 r 1111 0x03c4a6 0x96dbbcff};
lappend clist { 0 w 1111 0x03b485 0x9f2c58f4};
lappend clist { 2 r 1111 0x016ea6 0x14010c8f};
lappend clist { 0 w 1111 0x01e384 0xde6a4ad3};
lappend clist { 0 r 1111 0x037728 0xe4b4e052};
lappend clist { 1 w 1111 0x00abc1 0x4a3aafbe};
lappend clist { 0 r 1111 0x0265d5 0x9d612c95};
lappend clist { 2 w 1111 0x03cbb0 0x0adff6f0};
lappend clist { 0 r 1111 0x017b76 0xfe2576be};
lappend clist { 2 r 1111 0x0172cc 0x4f67af1f};
lappend clist { 0 w 1111 0x0128cc 0x94959a76};
lappend clist { 1 r 1111 0x005b4b 0x8f7e559d};
lappend clist { 0 r 1111 0x019341 0xa829717d};
lappend clist { 2 w 1111 0x029a71 0xad031981};
lappend clist { 0 r 1111 0x034de2 0xd53f120f};
lappend clist { 3 r 1111 0x02119e 0x6253f647};
lappend clist { 0 w 1111 0x004b60 0xcb3cfc9a};
lappend clist { 1 r 1111 0x00f1ac 0x936c2522};
lappend clist { 0 w 1111 0x03dc56 0x1bd4948d};
lappend clist { 2 w 1111 0x01a28a 0x9b8c1f3d};
lappend clist { 0 r 1111 0x00716b 0x2db9e1fa};
lappend clist { 3 w 1111 0x037682 0x4f8e2aca};
lappend clist { 0 w 1111 0x00d920 0xb6f4fdfc};
lappend clist { 1 r 1111 0x01781f 0xae31b1e7};
lappend clist { 0 w 1111 0x024aed 0x289e121a};
lappend clist { 2 w 1111 0x037d2d 0x43b8b430};
lappend clist { 0 r 1111 0x0187bf 0xccdbf8e7};
lappend clist { 3 w 1111 0x008798 0x19a1600a};
lappend clist { 0 w 1111 0x02eb94 0xda68509a};
lappend clist { 1 r 1111 0x029b82 0x95274e53};
lappend clist { 2 r 1111 0x0244c7 0x5fd2ee97};
## C finally 16 reads
lappend clist { 0 r 1111 0x0239b6 0x8f147909};
lappend clist { 0 r 1111 0x03b485 0x9f2c58f4};
lappend clist { 0 r 1111 0x01e384 0xde6a4ad3};
lappend clist { 0 r 1111 0x00abc1 0x4a3aafbe};
lappend clist { 0 r 1111 0x03cbb0 0x0adff6f0};
lappend clist { 0 r 1111 0x0128cc 0x94959a76};
lappend clist { 0 r 1111 0x029a71 0xad031981};
lappend clist { 0 r 1111 0x004b60 0xcb3cfc9a};
lappend clist { 0 r 1111 0x03dc56 0x1bd4948d};
lappend clist { 0 r 1111 0x01a28a 0x9b8c1f3d};
lappend clist { 0 r 1111 0x037682 0x4f8e2aca};
lappend clist { 0 r 1111 0x00d920 0xb6f4fdfc};
lappend clist { 0 r 1111 0x024aed 0x289e121a};
lappend clist { 0 r 1111 0x037d2d 0x43b8b430};
lappend clist { 0 r 1111 0x008798 0x19a1600a};
lappend clist { 0 r 1111 0x02eb94 0xda68509a};
return $clist
}
}

View File

@@ -0,0 +1,634 @@
# $Id: test_seq.tcl 785 2016-07-10 12:22:41Z mueller $
#
# Copyright 2016- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
# This program is free software; you may redistribute and/or modify it under
# the terms of the GNU General Public License as published by the Free
# Software Foundation, either version 2, or at your option any later version.
#
# This program is distributed in the hope that it will be useful, but
# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
# for complete details.
#
# Revision History:
# Date Rev Version Comment
# 2016-07-10 785 1.1 add wswap and wloop tests
# 2016-07-09 784 1.0 Initial version (ported from tb_tst_sram_stim.dat)
#
package provide tst_sram 1.0
package require rutiltpp
package require rutil
package require rlink
namespace eval tst_sram {
#
# test_seq_srum: helper: run sequencer and check status
#
proc test_seq_srun {{sstat 0} {tout 10.} {seaddr 0} {sedath 0} {sedatl 0}} {
variable nscmd
if {$nscmd == 0} {error "no or empty scmd list loaded"}
#
# set slim, sstat and start sequencer
rlc exec \
-wreg sr.slim [expr {$nscmd-1}] \
-wreg sr.sstat $sstat \
-wreg sr.sstart 0
# wait for completion
rlc wtlam $tout
# harvest attn and check sequencer status
# also check rlink command status (RB_STAT(1) <= R_REGS.sfail)
set seqmsk [rutil::com16 [regbld tst_sram::SSTAT wide]]; # ign sstat.wide !
set stamsk [regbld rlink::STAT {stat -1} rbtout rbnak rberr];
if {$seaddr == 0} { # fail=0 --> check saddr
rlc exec \
-attn -edata 0x0001 \
-rreg sr.sstat -edata $sstat $seqmsk -estat 0 $stamsk \
-rreg sr.saddr -edata $nscmd -estat 0 $stamsk
} else { # fail=1 --> check seaddr
set sstat_exp [expr {$sstat | [regbld tst_sram::SSTAT fail]}]
set stabad [regbld rlink::STAT {stat 2}]; # expect status.stat = 0x2
rlc exec \
-attn -edata 0x0001 \
-rreg sr.sstat -edata $sstat_exp $seqmsk -estat $stabad $stamsk \
-rreg sr.seaddr -edata $seaddr -estat $stabad $stamsk \
-rreg sr.sedath -edata $sedath -estat $stabad $stamsk \
-rreg sr.sedatl -edata $sedatl -estat $stabad $stamsk
}
return ""
}
#
# test_seq_setxor: helper: setup maddr* and mdi*
#
proc test_seq_setxor {maddrh maddrl mdih mdil} {
rlc exec \
-wreg sr.maddrh $maddrh \
-wreg sr.maddrl $maddrl \
-wreg sr.mdih $mdih \
-wreg sr.mdil $mdil
}
#
# test_seq: Test sequencer, basic 18 bit mode
#
proc test_seq {{tout 10.}} {
variable nscmd
#
set errcnt 0
rlc errcnt -clear
set sm [rutil::com16 [regbld tst_sram::SSTAT wide]]
rlink::anena 1; # enable attn notify
#
rlc log "tst_sram::test_seq ----------------------------------------------"
#
#-------------------------------------------------------------------------
rlc log " test 1: list of write commands"
# load list of 8 mem write commands
set clist {}
lappend clist { 0 w 1111 0x000110 0x70605040};
lappend clist { 0 w 1111 0x000111 0x71615141};
lappend clist { 0 w 1111 0x000112 0x72625242};
lappend clist { 0 w 1111 0x000113 0x73635343};
lappend clist { 0 w 1111 0x000114 0x74645444};
lappend clist { 0 w 1111 0x000115 0x75655545};
lappend clist { 0 w 1111 0x000116 0x76665646};
lappend clist { 0 w 1111 0x000117 0x77675747};
scmd_write $clist
# run sequencer (plain xord=0 xora=0 veri=0)
test_seq_srun 0 $tout
# read back 8 longwords
rlc exec \
-wreg sr.maddrh 0x0000 \
-wreg sr.maddrl 0x0110 \
-wblk sr.mblk {0x7060 0x5040 \
0x7161 0x5141 \
0x7262 0x5242 \
0x7363 0x5343 \
0x7464 0x5444 \
0x7565 0x5545 \
0x7666 0x5646 \
0x7767 0x5747}
#
#-------------------------------------------------------------------------
rlc log " test 2: list of read commands"
# load list of 8 mem read commands
set clist {}
lappend clist { 0 r 1111 0x000110 0xdead0000};
lappend clist { 0 r 1111 0x000111 0xbeaf1111};
lappend clist { 0 r 1111 0x000112 0xdead2222};
lappend clist { 0 r 1111 0x000113 0xbeaf3333};
lappend clist { 0 r 1111 0x000114 0xdead4444};
lappend clist { 0 r 1111 0x000115 0xbeaf5555};
lappend clist { 0 r 1111 0x000116 0xdead6666};
lappend clist { 0 r 1111 0x000117 0xbeaf7777};
scmd_write $clist
# run sequencer (plain xord=0 xora=0 veri=0)
test_seq_srun 0 $tout
# read back data part of sequencer
rlc exec \
-wreg sr.saddr 0x0000 \
-rblk sr.sblkd 16 -edata {0x7060 0x5040
0x7161 0x5141 \
0x7262 0x5242 \
0x7363 0x5343 \
0x7464 0x5444 \
0x7565 0x5545 \
0x7666 0x5646 \
0x7767 0x5747}
#
#-------------------------------------------------------------------------
rlc log " test 3: mixed list of writes (some byte wise) and reads"
# this list modifies the memory left from previous test !
set clist {}
lappend clist { 0 w 0001 0x000112 0x00000082}; # wr 12 0001
lappend clist { 0 w 0010 0x000113 0x00009300}; # wr 13 0010
lappend clist { 0 r 1111 0x000110 0x00000000}; # rd 10
lappend clist { 0 w 0100 0x000114 0x00a40000}; # wr 14 0100
lappend clist { 0 r 1111 0x000111 0x00000000}; # rd 11
lappend clist { 0 w 1000 0x000115 0xb5000000}; # wr 15 1000
lappend clist { 0 r 1111 0x000112 0x00000000}; # rd 12
lappend clist { 0 r 1111 0x000113 0x00000000}; # rd 13
lappend clist { 0 w 1111 0x000118 0x78685848}; # wr 18
lappend clist { 0 r 1111 0x000114 0x00000000}; # rd 14
lappend clist { 0 w 1111 0x000119 0x79695949}; # wr 19
lappend clist { 0 w 1111 0x00011a 0x7a6a5a4a}; # wr 1a
lappend clist { 0 r 1111 0x000115 0x00000000}; # rd 15
lappend clist { 0 w 1111 0x00011b 0x7b6b5b4b}; # wr 1b
lappend clist { 0 r 1111 0x000116 0x00000000}; # rd 16
lappend clist { 0 w 1111 0x00011c 0x7c6c5c4c}; # wr 1c
lappend clist { 0 w 1111 0x00011d 0x7d6d5d4d}; # wr 1d
lappend clist { 0 r 1111 0x000117 0x00000000}; # rd 17
lappend clist { 0 r 1111 0x000118 0x00000000}; # rd 18
lappend clist { 0 w 1111 0x00011e 0x7e6e5e4e}; # wr 1e
lappend clist { 0 w 1111 0x00011f 0x7f6f5f4f}; # wr 1f
lappend clist { 0 r 1111 0x000119 0x00000000}; # rd 19
lappend clist { 0 r 1111 0x00011a 0x00000000}; # rd 1a
lappend clist { 0 r 1111 0x00011b 0x00000000}; # rd 1b
lappend clist { 0 r 1111 0x00011c 0x00000000}; # rd 1c
lappend clist { 0 r 1111 0x00011d 0x00000000}; # rd 1d
lappend clist { 0 r 1111 0x00011e 0x00000000}; # rd 1e
lappend clist { 0 r 1111 0x00011f 0x00000000}; # rd 1f
scmd_write $clist
# run sequencer (plain xord=0 xora=0 veri=0)
test_seq_srun 0 $tout
# read back data part of sequencer
rlc exec \
-wreg sr.saddr 0x0000 \
-rblk sr.sblkd 56 -edata {0x0000 0x0082 \
0x0000 0x9300 \
0x7060 0x5040 \
0x00a4 0x0000 \
0x7161 0x5141 \
0xb500 0x0000 \
0x7262 0x5282 \
0x7363 0x9343 \
0x7868 0x5848 \
0x74a4 0x5444 \
0x7969 0x5949 \
0x7a6a 0x5a4a \
0xb565 0x5545 \
0x7b6b 0x5b4b \
0x7666 0x5646 \
0x7c6c 0x5c4c \
0x7d6d 0x5d4d \
0x7767 0x5747 \
0x7868 0x5848 \
0x7e6e 0x5e4e \
0x7f6f 0x5f4f \
0x7969 0x5949 \
0x7a6a 0x5a4a \
0x7b6b 0x5b4b \
0x7c6c 0x5c4c \
0x7d6d 0x5d4d \
0x7e6e 0x5e4e \
0x7f6f 0x5f4f}
#
#-------------------------------------------------------------------------
rlc log " test 4: sequencer verify mode"
# list of 4 mem write and 4 read commands
set clist {}
lappend clist { 0 w 1111 0x000220 0xb0a09080};
lappend clist { 0 w 1111 0x000221 0xb1a19181};
lappend clist { 0 r 1111 0x000220 0xb0a09080};
lappend clist { 0 w 1111 0x000222 0xb2a29282};
lappend clist { 0 r 1111 0x000221 0xb1a19181};
lappend clist { 0 w 1111 0x000223 0xb3a39383};
lappend clist { 0 r 1111 0x000222 0xb2a29282};
lappend clist { 0 r 1111 0x000223 0xb3a39383};
scmd_write $clist
# run sequencer (veri=1)
test_seq_srun [regbld tst_sram::SSTAT veri] $tout
# again, but with mismatch on 2nd read
set clist {}
lappend clist { 0 w 1111 0x000230 0xb0a09080}; # 0
lappend clist { 0 w 1111 0x000231 0xb1a19181}; # 1
lappend clist { 0 r 1111 0x000230 0xb0a09080}; # 2
lappend clist { 0 w 1111 0x000232 0xb2a29282}; # 3
lappend clist { 0 r 1111 0x000231 0x00000000}; # 4 <-- read mismatch here
lappend clist { 0 w 1111 0x000233 0xb3a39383}; # 5
lappend clist { 0 r 1111 0x000232 0xb2a29282}; # 6
lappend clist { 0 r 1111 0x000233 0xb3a39383}; # 7
scmd_write $clist
# run sequencer (veri=1, expect fail)
test_seq_srun [regbld tst_sram::SSTAT veri] $tout 4 0xb1a1 0x9181
# sblkd re-read data, check that data part wasn't overwritten
rlc exec \
-wreg sr.saddr 0 \
-rblk sr.sblkd 16 -edata {0xb0a0 0x9080 \
0xb1a1 0x9181 \
0xb0a0 0x9080 \
0xb2a2 0x9282 \
0x0000 0x0000 \
0xb3a3 0x9383 \
0xb2a2 0x9282 \
0xb3a3 0x9383}
#
#-------------------------------------------------------------------------
rlc log " test 5: test reset via init"
# expects state from fail srun of previous test with
# seaddr=0x0004 sedath=0xb1a1 sedatl=0x9181
# re-check fail bit status bit set from previous test
rlc exec \
-rreg sr.sstat -edata [regbld tst_sram::SSTAT veri fail] $sm \
-rreg sr.seaddr -edata 0x0004 \
-rreg sr.sedath -edata 0xb1a1 \
-rreg sr.sedatl -edata 0x9181
# init 0x0 --> noop
rlc exec \
-init sr.mdih 0x0000 \
-rreg sr.sstat -edata [regbld tst_sram::SSTAT veri fail] $sm \
-rreg sr.seaddr -edata 0x0004 \
-rreg sr.sedath -edata 0xb1a1 \
-rreg sr.sedatl -edata 0x9181
# init 0x2 --> reset MEM, no effect on SEQ state
rlc exec \
-init sr.mdih 0x0002 \
-rreg sr.sstat -edata [regbld tst_sram::SSTAT veri fail] $sm \
-rreg sr.seaddr -edata 0x0004 \
-rreg sr.sedath -edata 0xb1a1 \
-rreg sr.sedatl -edata 0x9181
# init 0x1 --> reset SEQ, add registers cleared
rlc exec \
-init sr.mdih 0x0001 \
-rreg sr.sstat -edata 0 $sm \
-rreg sr.seaddr -edata 0 \
-rreg sr.sedath -edata 0 \
-rreg sr.sedatl -edata 0
#
#-------------------------------------------------------------------------
rlc log " test 6: xord and xora options"
# list of 4 mem write and 4 read commands
set clist {}
lappend clist { 0 w 1111 0x000440 0xc0b0a090};
lappend clist { 0 w 1111 0x000441 0xc1b1a191};
lappend clist { 0 r 1111 0x000440 0xc0b0a090};
lappend clist { 0 w 1111 0x000442 0xc2b2a292};
lappend clist { 0 r 1111 0x000441 0xc1b1a191};
lappend clist { 0 w 1111 0x000443 0xc3b3a393};
lappend clist { 0 r 1111 0x000442 0xc2b2a292};
lappend clist { 0 r 1111 0x000443 0xc3b3a393};
scmd_write $clist
# run sequencer (xord=1,xora=1,veri=1) and maddr=0 mdi=0
test_seq_setxor 0x00 0x0000 0x0000 0x0000
test_seq_srun [regbld tst_sram::SSTAT xord xora veri] $tout
# read and check mem data (in 440...443, data as in smem)
rlc exec \
-wreg sr.maddrh 0x0000 \
-wreg sr.maddrl 0x0440 \
-rblk sr.mblk 8 -edata {0xc0b0 0xa090 \
0xc1b1 0xa191 \
0xc2b2 0xa292 \
0xc3b3 0xa393}
# start sequencer with xord=1 and mdi=f0f0f0f0
# now 9=1001 <-> 6=0110
# now a=1010 <-> 5=0101
# now b=1011 <-> 4=0100
# now c=1100 <-> 3=0011
test_seq_setxor 0x00 0x0000 0xf0f0 0xf0f0
test_seq_srun [regbld tst_sram::SSTAT xord veri] $tout
# read and check mem data (in 440...443, now xord'ed)
rlc exec \
-wreg sr.maddrh 0x0000 \
-wreg sr.maddrl 0x0440 \
-rblk sr.mblk 8 -edata {0x3040 0x5060 \
0x3141 0x5161 \
0x3242 0x5262 \
0x3343 0x5363}
# start sequencer with xord=1 and mdi=0f0f0f0f
# now 0=0000 -> f=1111
# now 1=0001 -> e=1110
# now 2=0010 -> d=1101
# now 3=0011 -> c=1100
test_seq_setxor 0x00 0x0000 0x0f0f 0x0f0f
test_seq_srun [regbld tst_sram::SSTAT xord veri] $tout
rlc exec \
-wreg sr.maddrh 0x0000 \
-wreg sr.maddrl 0x0440 \
-rblk sr.mblk 8 -edata {0xcfbf 0xaf9f \
0xcebe 0xae9e \
0xcdbd 0xad9d \
0xccbc 0xac9c}
# start sequencer with xora=1 and maddr=1000
test_seq_setxor 0x00 0x1000 0x0000 0x0000
test_seq_srun [regbld tst_sram::SSTAT xora veri] $tout
# read and check mem data (in 1440...1443, data as in smem)
rlc exec \
-wreg sr.maddrh 0x0000 \
-wreg sr.maddrl 0x1440 \
-rblk sr.mblk 8 -edata {0xc0b0 0xa090 \
0xc1b1 0xa191 \
0xc2b2 0xa292 \
0xc3b3 0xa393}
# start sequencer with xord=1,xora=1 and maddr=2000,mdi=f0f0f0f0
test_seq_setxor 0x00 0x2000 0xf0f0 0xf0f0
test_seq_srun [regbld tst_sram::SSTAT xord xora veri] $tout
# read and check mem data (in 2440...2443, data xord'ed)
rlc exec \
-wreg sr.maddrh 0x0000 \
-wreg sr.maddrl 0x2440 \
-rblk sr.mblk 8 -edata {0x3040 0x5060 \
0x3141 0x5161 \
0x3242 0x5262 \
0x3343 0x5363}
# finally check, that sedat hold pure mem data
# list of 4 mem write and 4 read commands
set clist {}
lappend clist { 0 w 1111 0x000550 0xc0b0a090};
lappend clist { 0 w 1111 0x000551 0xc1b1a191};
lappend clist { 0 w 1111 0x000552 0xc2b2a292};
lappend clist { 0 w 1111 0x000553 0xc3b3a393};
lappend clist { 0 r 1111 0x000550 0x00000000}; # add read deta wrong
lappend clist { 0 r 1111 0x000551 0x00000000};
lappend clist { 0 r 1111 0x000552 0x00000000};
lappend clist { 0 r 1111 0x000553 0x00000000};
scmd_write $clist
# start sequencer with xord=1,xora=1 and maddr=4000,mdi=f0f0f0f0
# check that data in sedat is xor'ed !!
test_seq_setxor 0x00 0x4000 0xf0f0 0xf0f0
test_seq_srun [regbld tst_sram::SSTAT xord xora veri] $tout \
4 0x3040 0x5060
# read and check mem data (in 4550...4553, data xord'ed)
rlc exec \
-wreg sr.maddrh 0x0000 \
-wreg sr.maddrl 0x4550 \
-rblk sr.mblk 8 -edata {0x3040 0x5060 \
0x3141 0x5161 \
0x3242 0x5262 \
0x3343 0x5363}
# finally clear veri error
rlc exec -init sr.mdih 0x1; # reset SEQ
#
#-------------------------------------------------------------------------
rlc log " test 7: loop option (with xora)"
# list of 4 mem write and 4 read commands
set clist {}
lappend clist { 0 w 1111 0x000000 0x00102030};
lappend clist { 0 w 1111 0x000001 0x01112131};
lappend clist { 0 r 1111 0x000000 0x00102030};
lappend clist { 0 w 1111 0x000002 0x02122232};
lappend clist { 0 r 1111 0x000001 0x01112131};
lappend clist { 0 w 1111 0x000003 0x03132333};
lappend clist { 0 r 1111 0x000002 0x02122232};
lappend clist { 0 r 1111 0x000003 0x03132333};
scmd_write $clist
# start sequencer with loop=1,xora=1 and maddr=3fff0 (will loop to 3ffff)
test_seq_setxor 0x03 0xfff0 0x0000 0x0000
test_seq_srun [regbld tst_sram::SSTAT loop xora veri] $tout
# check that maddr incremented
rlc exec \
-rreg sr.maddrh -edata 0x0003 \
-rreg sr.maddrl -edata 0xffff
# last iteration will write into
# 00000 xor 03ffff -> 03ffff (00102030)
# 00001 xor 03ffff -> 03fffe (01112131)
# 00002 xor 03ffff -> 03fffd (02122232)
# 00003 xor 03ffff -> 03fffc (03132333)
# read back 4 longwords 03fffc..03ffff
rlc exec \
-wreg sr.maddrh 0x0003 \
-wreg sr.maddrl 0xfffc \
-rblk sr.mblk 8 -edata {0x0313 0x2333 \
0x0212 0x2232 \
0x0111 0x2131 \
0x0010 0x2030}
#
#-------------------------------------------------------------------------
rlc log " test 8: loop option (with xora), verify fail case"
# list of 4 mem write and 4 read commands, 2nd read will fail
set clist {}
lappend clist { 0 w 1111 0x000100 0x00102030};
lappend clist { 0 w 1111 0x000101 0x01112131};
lappend clist { 0 w 1111 0x000102 0x02122232};
lappend clist { 0 w 1111 0x000103 0x03132333};
lappend clist { 0 r 1111 0x000100 0x00102030};
lappend clist { 0 r 1111 0x000101 0x00000000}; # <-- will fail
lappend clist { 0 r 1111 0x000102 0x00000000};
lappend clist { 0 r 1111 0x000103 0x00000000};
scmd_write $clist
# start with loop=1,xora=1 and maddr=03fff0 (tried to loop to 03ffff)
test_seq_setxor 0x03 0xfff0 0x0000 0x0000
test_seq_srun [regbld tst_sram::SSTAT loop xora veri] $tout \
5 0x0111 0x2131
# check that maddr do not increment (fail on first loop !)
rlc exec \
-rreg sr.maddrh -edata 0x0003 \
-rreg sr.maddrl -edata 0xfff0
# finally clear veri error
rlc exec -init sr.mdih 0x1; # reset SEQ
#
#-------------------------------------------------------------------------
rlc log " test 9: wait field in sequencer"
# list of 16 writes and 16 reads, with increasing waits
set clist {}
lappend clist { 0x0 w 1111 0x000110 0x20001000}; # writes
lappend clist { 0x1 w 1111 0x000111 0x20011001};
lappend clist { 0x2 w 1111 0x000112 0x20021002};
lappend clist { 0x3 w 1111 0x000113 0x20031003};
lappend clist { 0x4 w 1111 0x000114 0x20041004};
lappend clist { 0x5 w 1111 0x000115 0x20051005};
lappend clist { 0x6 w 1111 0x000116 0x20061006};
lappend clist { 0x7 w 1111 0x000117 0x20071007};
lappend clist { 0x8 w 1111 0x000118 0x20081008};
lappend clist { 0x9 w 1111 0x000119 0x20091009};
lappend clist { 0xa w 1111 0x00011a 0x200a100a};
lappend clist { 0xb w 1111 0x00011b 0x200b100b};
lappend clist { 0xc w 1111 0x00011c 0x200c100c};
lappend clist { 0xd w 1111 0x00011d 0x200d100d};
lappend clist { 0xe w 1111 0x00011e 0x200e100e};
lappend clist { 0xf w 1111 0x00011f 0x200f100f};
lappend clist { 0x0 r 1111 0x000110 0x20001000}; # read
lappend clist { 0x1 r 1111 0x000111 0x20011001};
lappend clist { 0x2 r 1111 0x000112 0x20021002};
lappend clist { 0x3 r 1111 0x000113 0x20031003};
lappend clist { 0x4 r 1111 0x000114 0x20041004};
lappend clist { 0x5 r 1111 0x000115 0x20051005};
lappend clist { 0x6 r 1111 0x000116 0x20061006};
lappend clist { 0x7 r 1111 0x000117 0x20071007};
lappend clist { 0x8 r 1111 0x000118 0x20081008};
lappend clist { 0x9 r 1111 0x000119 0x20091009};
lappend clist { 0xa r 1111 0x00011a 0x200a100a};
lappend clist { 0xb r 1111 0x00011b 0x200b100b};
lappend clist { 0xc r 1111 0x00011c 0x200c100c};
lappend clist { 0xd r 1111 0x00011d 0x200d100d};
lappend clist { 0xe r 1111 0x00011e 0x200e100e};
lappend clist { 0xf r 1111 0x00011f 0x200f100f};
scmd_write $clist
# start sequencer with xora=1 and maddr=11000
test_seq_setxor 0x01 0x1000 0x0000 0x0000
test_seq_srun [regbld tst_sram::SSTAT xora veri] $tout
# list of groups of 2 write / 2 read, with increasing wait
set clist {}
lappend clist { 0x0 w 1111 0x000120 0x30002000}; # write
lappend clist { 0x0 w 1111 0x000121 0x30012001};
lappend clist { 0x0 r 1111 0x000120 0x30002000}; # read
lappend clist { 0x0 r 1111 0x000121 0x30012001};
lappend clist { 0x1 w 1111 0x000122 0x30022002}; # write
lappend clist { 0x1 w 1111 0x000123 0x30032003};
lappend clist { 0x1 r 1111 0x000122 0x30022002}; # read
lappend clist { 0x1 r 1111 0x000123 0x30032003};
lappend clist { 0x2 w 1111 0x000124 0x30042004}; # write
lappend clist { 0x2 w 1111 0x000125 0x30052005};
lappend clist { 0x2 r 1111 0x000124 0x30042004}; # read
lappend clist { 0x2 r 1111 0x000125 0x30052005};
lappend clist { 0x3 w 1111 0x000126 0x30062006}; # write
lappend clist { 0x3 w 1111 0x000127 0x30072007};
lappend clist { 0x3 r 1111 0x000126 0x30062006}; # read
lappend clist { 0x3 r 1111 0x000127 0x30072007};
lappend clist { 0x4 w 1111 0x000128 0x30082008}; # write
lappend clist { 0x4 w 1111 0x000129 0x30092009};
lappend clist { 0x4 r 1111 0x000128 0x30082008}; # read
lappend clist { 0x4 r 1111 0x000129 0x30092009};
lappend clist { 0x5 w 1111 0x00012a 0x300a200a}; # write
lappend clist { 0x5 w 1111 0x00012b 0x300b200b};
lappend clist { 0x5 r 1111 0x00012a 0x300a200a}; # read
lappend clist { 0x5 r 1111 0x00012b 0x300b200b};
lappend clist { 0x6 w 1111 0x00012c 0x300c200c}; # write
lappend clist { 0x6 w 1111 0x00012d 0x300d200d};
lappend clist { 0x6 r 1111 0x00012c 0x300c200c}; # read
lappend clist { 0x6 r 1111 0x00012d 0x300d200d};
lappend clist { 0x7 w 1111 0x00012e 0x300e200e}; # write
lappend clist { 0x7 w 1111 0x00012f 0x300f200f};
lappend clist { 0x7 r 1111 0x00012e 0x300e200e}; # read
lappend clist { 0x7 r 1111 0x00012f 0x300f200f};
scmd_write $clist
# start sequencer with xora=1 and maddr=22000
test_seq_setxor 0x02 0x2000 0x0000 0x0000
test_seq_srun [regbld tst_sram::SSTAT xora veri] $tout
#
#-------------------------------------------------------------------------
if {[iswide]} {
rlc log " test 10: wswap option"
# write with sequencer
# list of writes, top 2 bits of seq address change; do read back
set clist {}
lappend clist { 0x0 w 1111 0x000000 0x12340000}; # -> 0x001000
lappend clist { 0x0 w 1111 0x010011 0x12340011}; # -> 0x101011
lappend clist { 0x0 w 1111 0x020022 0x12340022}; # -> 0x201022
lappend clist { 0x0 w 1111 0x030033 0x12340033}; # -> 0x301033
lappend clist { 0x0 r 1111 0x000000 0x12340000}; # <- 0x001000
lappend clist { 0x0 r 1111 0x010011 0x12340011}; # <- 0x101011
lappend clist { 0x0 r 1111 0x020022 0x12340022}; # <- 0x201022
lappend clist { 0x0 r 1111 0x030033 0x12340033}; # <- 0x301033
scmd_write $clist
# start sequencer with xora=1 and maddr=001000
test_seq_setxor 0x00 0x1000 0x0000 0x0000
test_seq_srun [regbld tst_sram::SSTAT wswap xora veri] $tout
# check memory via mcmd reads
rlc exec \
-wreg sr.maddrl 0x1000 \
-wreg sr.mcmd [regbld tst_sram::MCMD ld {be 0xf} {addrh 0x00}] \
-rreg sr.mdoh -edata 0x1234 \
-rreg sr.mdol -edata 0x0000 \
-wreg sr.maddrl 0x1011 \
-wreg sr.mcmd [regbld tst_sram::MCMD ld {be 0xf} {addrh 0x10}] \
-rreg sr.mdoh -edata 0x1234 \
-rreg sr.mdol -edata 0x0011 \
-wreg sr.maddrl 0x1022 \
-wreg sr.mcmd [regbld tst_sram::MCMD ld {be 0xf} {addrh 0x20}] \
-rreg sr.mdoh -edata 0x1234 \
-rreg sr.mdol -edata 0x0022 \
-wreg sr.maddrl 0x1033 \
-wreg sr.mcmd [regbld tst_sram::MCMD ld {be 0xf} {addrh 0x30}] \
-rreg sr.mdoh -edata 0x1234 \
-rreg sr.mdol -edata 0x0033
}
#
#-------------------------------------------------------------------------
if {[iswide]} {
rlc log " test 11: wloop option"
# like test previous test 7, but now using wloop
# list of 4 mem write and 4 read commands
set clist {}
lappend clist { 0 w 1111 0x000000 0x00102030};
lappend clist { 0 w 1111 0x000001 0x01112131};
lappend clist { 0 r 1111 0x000000 0x00102030};
lappend clist { 0 w 1111 0x000002 0x02122232};
lappend clist { 0 r 1111 0x000001 0x01112131};
lappend clist { 0 w 1111 0x000003 0x03132333};
lappend clist { 0 r 1111 0x000002 0x02122232};
lappend clist { 0 r 1111 0x000003 0x03132333};
scmd_write $clist
# start with wloop=1,loop=1,xora=1 and maddr=3ffff0 (will loop to 3fffff)
test_seq_setxor 0x3f 0xfff0 0x0000 0x0000
test_seq_srun [regbld tst_sram::SSTAT wloop loop xora veri] $tout
# check that maddr incremented
rlc exec \
-rreg sr.maddrh -edata 0x003f \
-rreg sr.maddrl -edata 0xffff
# last iteration will write into
# 00000 xor 3fffff -> 3fffff (00102030)
# 00001 xor 3fffff -> 3ffffe (01112131)
# 00002 xor 3fffff -> 3ffffd (02122232)
# 00003 xor 3fffff -> 3ffffc (03132333)
# read back 4 longwords 3ffffc..3fffff
rlc exec \
-wreg sr.maddrh 0x003f \
-wreg sr.maddrl 0xfffc \
-rblk sr.mblk 8 -edata {0x0313 0x2333 \
0x0212 0x2232 \
0x0111 0x2131 \
0x0010 0x2030}
}
#
#-------------------------------------------------------------------------
incr errcnt [rlc errcnt -clear]
return $errcnt
}
}

244
tools/tcl/tst_sram/util.tcl Normal file
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@@ -0,0 +1,244 @@
# $Id: util.tcl 785 2016-07-10 12:22:41Z mueller $
#
# Copyright 2011-2016 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
# This program is free software; you may redistribute and/or modify it under
# the terms of the GNU General Public License as published by the Free
# Software Foundation, either version 2, or at your option any later version.
#
# This program is distributed in the hope that it will be useful, but
# WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
# for complete details.
#
# Revision History:
# Date Rev Version Comment
# 2016-07-09 784 1.2 22bit support: mask sstat(wide); add iswide
# 2015-04-03 661 1.1 drop estatdef (stat err check default now)
# 2014-08-14 582 1.0.1 add srun* procs; add nscmd and tout variables
# 2014-08-10 581 1.0 Initial version
# 2011-07-03 387 0.1 Frist draft
#
package provide tst_sram 1.0
package require rutiltpp
package require rutil
package require rlink
namespace eval tst_sram {
# name space variables
#
variable nscmd 0; # length of current sequencer command list
variable tout 10.; # default time out
variable iswide -1; # sstat.wide cache
#
# setup register descriptions for tst_sram core design ---------------------
#
regdsc MCMD {ld 14} {inc 13} {we 12} {be 11 4} {addrh 5 6}
regdsc SSTAT {wide 15} {wswap 9} {wloop 8} \
{loop 7} {xord 6} {xora 5} {veri 4} {fail 1} {run 0}
regdsc SCMD {wait 31 4} {we 24} {be 23 4} {addr 17 18}
#
# setup: amap definitions for tst_sram core design -------------------------
#
proc setup {{base 0x0000}} {
rlc amap -insert sr.mdih [expr {$base + 0x00}]
rlc amap -insert sr.mdil [expr {$base + 0x01}]
rlc amap -insert sr.mdoh [expr {$base + 0x02}]
rlc amap -insert sr.mdol [expr {$base + 0x03}]
rlc amap -insert sr.maddrh [expr {$base + 0x04}]
rlc amap -insert sr.maddrl [expr {$base + 0x05}]
rlc amap -insert sr.mcmd [expr {$base + 0x06}]
rlc amap -insert sr.mblk [expr {$base + 0x07}]
rlc amap -insert sr.slim [expr {$base + 0x08}]
rlc amap -insert sr.saddr [expr {$base + 0x09}]
rlc amap -insert sr.sblk [expr {$base + 0x0a}]
rlc amap -insert sr.sblkc [expr {$base + 0x0b}]
rlc amap -insert sr.sblkd [expr {$base + 0x0c}]
rlc amap -insert sr.sstat [expr {$base + 0x0d}]
rlc amap -insert sr.sstart [expr {$base + 0x0e}]
rlc amap -insert sr.sstop [expr {$base + 0x0f}]
rlc amap -insert sr.seaddr [expr {$base + 0x10}]
rlc amap -insert sr.sedath [expr {$base + 0x11}]
rlc amap -insert sr.sedatl [expr {$base + 0x12}]
}
#
# init: reset tst_sram -----------------------------------------------------
#
proc init {} {
rlc exec \
-wreg sr.sstop 1 \
-wreg sr.sstat 0
}
#
# iswide: 1 if 22bit system ------------------------------------------------
#
proc iswide {} {
variable iswide
if {$iswide < 0} {
rlc exec -rreg sr.sstat sstat
set iswide [regget tst_sram::SSTAT(wide) $sstat]
}
return $iswide
}
#
# scmd_write: write a scmd list --------------------------------------------
#
proc scmd_write {scmdlist} {
variable nscmd
set buf {}
set nscmd 0
rlc exec -wreg sr.saddr 0
foreach scmditem $scmdlist {
set wait [lindex $scmditem 0]
set wec [lindex $scmditem 1]
set bec [lindex $scmditem 2]
set addr [lindex $scmditem 3]
set mval [lindex $scmditem 4]
set we [expr {($wec eq "w") ? 1 : 0}]
set scmd [regbld tst_sram::SCMD \
[list wait $wait] \
[list we $we] \
[list be [bvi b $bec]] \
[list addr $addr] ]
set scmdh [expr {($scmd>>16) & 0xffff}]
set scmdl [expr { $scmd & 0xffff}]
set mvalh [expr {($mval>>16) & 0xffff}]
set mvall [expr { $mval & 0xffff}]
lappend buf $scmdh $scmdl $mvalh $mvall
if {[llength $buf] == 256} {
rlc exec -wblk sr.sblk $buf
set buf {}
}
incr nscmd
}
if {[llength $buf] > 0} {
rlc exec -wblk sr.sblk $buf
}
return ""
}
#
# scmd_read: read a scmd list ---------------------------------------------
#
proc scmd_read {length} {
set scmdlist {}
if {$length == 0} {return $scmdlist}
rlc exec -rreg sr.saddr saddr_save \
-wreg sr.saddr 0
while {$length > 0} {
set chunk $length
if {$chunk > 64} {set chunk 64}
set length [expr {$length - $chunk}]
rlc exec -rblk sr.sblk [expr {4*$chunk}] buf
foreach {scmdh scmdl mvalh mvall} $buf {
set scmd [expr {($scmdh<<16) | $scmdl}]
set mval [expr {($mvalh<<16) | $mvall}]
set wait [regget tst_sram::SCMD(wait) $scmd]
set we [regget tst_sram::SCMD(we) $scmd]
set be [regget tst_sram::SCMD(be) $scmd]
set addr [regget tst_sram::SCMD(addr) $scmd]
set wec [expr {($we) ? "w" : "r"}]
set bec [pbvi b4 $be]
lappend scmdlist [list $wait $wec $bec $addr $mval]
}
}
rlc exec -wreg sr.saddr $saddr_save
return $scmdlist
}
#
# scmd_print: print a scmd list -------------------------------------------
#
proc scmd_print {scmdlist} {
set rval " ind: dly we be addr mval"
set ind 0
foreach scmditem $scmdlist {
set wait [lindex $scmditem 0]
set wec [lindex $scmditem 1]
set bec [lindex $scmditem 2]
set addr [lindex $scmditem 3]
set mval [lindex $scmditem 4]
append rval "\n"
append rval [format "%4d: %2d %s %s 0x%6.6x 0x%8.8x" \
$ind $wait $wec $bec $addr $mval]
incr ind
}
return $rval
}
#
# srun: single pass run of sequencer ---------------------------------------
#
proc srun {mdih mdil maddrh maddrl {tout 0.}} {
variable nscmd
if {$tout == 0} {set tout $tst_sram::tout}
if {$nscmd == 0} {error "no or empty scmd list loaded"}
set sm [rutil::com16 [regbld tst_sram::SSTAT wide]]
rlc exec -init 0 1
rlc exec -wreg sr.sstat [regbld tst_sram::SSTAT xord xora veri] \
-wreg sr.mdih $mdih \
-wreg sr.mdil $mdil \
-wreg sr.maddrh $maddrh \
-wreg sr.maddrl $maddrl \
-wreg sr.slim [expr {$nscmd-1}] \
-wreg sr.sstart 0x0000
rlc wtlam $tout
rlc exec -attn -edata 0x0001
rlc exec -rreg sr.sstat -edata [regbld tst_sram::SSTAT xord xora veri] $sm \
-rreg sr.seaddr -edata 0x0000 \
-rreg sr.sedath -edata 0x0000 \
-rreg sr.sedatl -edata 0x0000
return ""
}
#
# srun_lists: call srun for mdi and maddr lists ----------------------------
#
proc srun_lists {lmdi lmaddr {tout 0.}} {
foreach {maddrh maddrl} $lmaddr {
foreach {mdih mdil} $lmdi {
srun $mdih $mdil $maddrh $maddrl $tout
}
}
return ""
}
#
# srun_loop: full maddr* loop of sequencer ---------------------------------
#
proc srun_loop {mdih mdil maddrh maddrl {wide 0} {tout 0.}} {
variable nscmd
if {$tout == 0} {set tout $tst_sram::tout}
if {$nscmd == 0} {error "no or empty scmd list loaded"}
set sm [rutil::com16 [regbld tst_sram::SSTAT wide]]
set sstat [regbldkv tst_sram::SSTAT wswap $wide wloop $wide loop 1 \
xord 1 xora 1 veri 1]
rlc exec -init 0 1
rlc exec -wreg sr.sstat $sstat \
-wreg sr.mdih $mdih \
-wreg sr.mdil $mdil \
-wreg sr.maddrh $maddrh \
-wreg sr.maddrl $maddrl \
-wreg sr.slim [expr {$nscmd-1}] \
-wreg sr.sstart 0x0000
set tbeg [clock milliseconds]
rlc wtlam $tout
set tend [clock milliseconds]
rlc exec -attn -edata 0x0001
rlc exec -rreg sr.sstat -edata $sstat $sm \
-rreg sr.seaddr -edata 0x0000 \
-rreg sr.sedath -edata 0x0000 \
-rreg sr.sedatl -edata 0x0000
set trun [expr {($tend-$tbeg)/1000.}]
set line [format "loop done maddr=%2.2x %4.4x mdi=%4.4x %4.4x in %7.2f s" \
$maddrh $maddrl $mdih $mdil $trun]
rlc log $line
return ""
}
}