mirror of
https://github.com/wfjm/w11.git
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tmu and tmuconv update; test_w11a_cdma tune-up
- rtl/w11a
- pdp11.vhd: _tmu,_tmu_sb: add port DM_STAT_SE
- pdp11_sys70.vhd: pass DM_STAT_SE to pdp11_tmu_sb
- pdp11_tmu.vhd: add vm.vmcntl.[cm]acc, se.[iv]start fields
- pdp11_tmu_sb.vhd: add port DM_STAT_SE
- tb/tbd_pdp11core.vhd: pass DM_STAT_SE to pdp11_tmu_sb
- tools/bin/tmuconv: use vm.vmcntl.[cm]acc, se.[iv]start fields; add type
column to em line; remove VFETCH/VPUSH heuristics;
add -t_emm, -t_fle, -t_fli, -i_flei
- tools/tbench/w11a/test_w11a_cdma.tcl: stop A2 code via PIRQ
This commit is contained in:
wfjm
parent
7f2d7f97d0
commit
9c49c9ad58
@ -35,7 +35,10 @@ The full set of tests is only run for tagged releases.
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- tools changes
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- tools/asm-11/lib/push_pop.mac: add push2
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- tools/bin
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- tmuconv: add -t_ru06 and -t_flow
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- tmuconv
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- add -t_ru06, -t_emm, -t_flow, -t_fle, -t_fli, -t_flei
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- em transactions show transaction type
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- vfetch/vpush heuristics replaced to vstart based detection
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- tools/tcode
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- cpu_basics.mac: expanded
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- cpu_details.mac: significantly expanded
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@ -54,6 +57,7 @@ The full set of tests is only run for tagged releases.
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RESET wait, see [ECO-035](ECO-035-stklim-tbit-fixes.md)
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- implement MMR0,MMR2 instruction complete,
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see [ECO-037](ECO-037-mmu-instruction_complete.md)
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- pdp11_tmu.vhd: add vm.vmcntl.[cm]acc, se.[iv]start fields
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- pdp11_vmbox.vhd: rename some rsv->ser; remove obsolete trap_done
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- rtl/sys_gen/w11a/s3board/sys_conf.vhd: disable monitors for timing closure
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- rtl/sys_gen/w11a/\*/\*.vmfset: drop removed signals
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@ -1,6 +1,6 @@
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-- $Id: pdp11.vhd 1339 2022-12-27 12:11:34Z mueller $
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-- $Id: pdp11.vhd 1348 2023-01-08 13:33:01Z mueller $
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-- SPDX-License-Identifier: GPL-3.0-or-later
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-- Copyright 2006-2022 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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-- Copyright 2006-2023 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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------------------------------------------------------------------------------
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-- Package Name: pdp11
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@ -11,6 +11,7 @@
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--
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-- Revision History:
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-- Date Rev Version Comment
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-- 2023-01-08 1348 1.5.23 _tmu,_tmu_sb: add port DM_STAT_SE
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-- 2022-12-27 1339 1.5.22 _sequencer: rm PC port; _dpath: rm PCOUT port
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-- 2022-12-12 1330 1.5.21 dm_stat_se_type: rename vfetch -> vstart;
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-- mmu_moni_type: drop pc,idone, add vstart,vflow
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@ -1169,6 +1170,7 @@ component pdp11_tmu is -- trace and monitor unit
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CLK : in slbit; -- clock
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ENA : in slbit := '0'; -- enable trace output
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DM_STAT_DP : in dm_stat_dp_type; -- debug and monitor status - dpath
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DM_STAT_SE : in dm_stat_se_type; -- debug and monitor status - sequencer
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DM_STAT_VM : in dm_stat_vm_type; -- debug and monitor status - vmbox
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DM_STAT_CO : in dm_stat_co_type; -- debug and monitor status - core
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DM_STAT_CA : in dm_stat_ca_type -- debug and monitor status - cache
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@ -1185,6 +1187,7 @@ component pdp11_tmu_sb is -- trace and mon. unit; simbus wrapper
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port (
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CLK : in slbit; -- clock
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DM_STAT_DP : in dm_stat_dp_type; -- debug and monitor status - dpath
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DM_STAT_SE : in dm_stat_se_type; -- debug and monitor status - sequencer
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DM_STAT_VM : in dm_stat_vm_type; -- debug and monitor status - vmbox
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DM_STAT_CO : in dm_stat_co_type; -- debug and monitor status - core
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DM_STAT_CA : in dm_stat_ca_type -- debug and monitor status - cache
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@ -1,6 +1,6 @@
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-- $Id: pdp11_sys70.vhd 1330 2022-12-16 17:52:40Z mueller $
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-- $Id: pdp11_sys70.vhd 1348 2023-01-08 13:33:01Z mueller $
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-- SPDX-License-Identifier: GPL-3.0-or-later
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-- Copyright 2015-2022 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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-- Copyright 2015-2023 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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------------------------------------------------------------------------------
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-- Module Name: pdp11_sys70 - syn
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@ -27,6 +27,7 @@
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--
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-- Revision History:
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-- Date Rev Version Comment
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-- 2023-01-08 1348 1.3.5 pass DM_STAT_SE to pdp11_tmu_sb
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-- 2022-12-12 1330 1.3.4 dm_stat_se_type: rename vfetch -> vstart
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-- 2019-06-02 1159 1.3.3 use rbaddr_ constants
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-- 2019-03-02 1116 1.3.2 add RESET_SYS; fix pdp11_mem70 reset
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@ -443,6 +444,7 @@ begin
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port map (
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CLK => CLK,
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DM_STAT_DP => DM_STAT_DP,
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DM_STAT_SE => DM_STAT_SE,
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DM_STAT_VM => DM_STAT_VM,
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DM_STAT_CO => DM_STAT_CO,
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DM_STAT_CA => DM_STAT_CA
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@ -1,6 +1,6 @@
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-- $Id: pdp11_tmu.vhd 1310 2022-10-27 16:15:50Z mueller $
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-- $Id: pdp11_tmu.vhd 1348 2023-01-08 13:33:01Z mueller $
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-- SPDX-License-Identifier: GPL-3.0-or-later
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-- Copyright 2008-2022 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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-- Copyright 2008-2023 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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------------------------------------------------------------------------------
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-- Module Name: pdp11_tmu - sim
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@ -14,6 +14,7 @@
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--
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-- Revision History:
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-- Date Rev Version Comment
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-- 2023-01-08 1348 1.3.3 add vm.vmcntl.[cm]acc, se.[iv]start fields
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-- 2022-10-25 1309 1.3.2 rename _gpr -> _gr
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-- 2018-10-05 1053 1.3.1 use DM_STAT_CA instead of DM_STAT_SY
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-- 2016-12-28 833 1.3 open tmu_ofile only when used
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@ -48,6 +49,7 @@ entity pdp11_tmu is -- trace and monitor unit
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CLK : in slbit; -- clock
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ENA : in slbit := '0'; -- enable trace output
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DM_STAT_DP : in dm_stat_dp_type; -- debug and monitor status - dpath
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DM_STAT_SE : in dm_stat_se_type; -- debug and monitor status - sequencer
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DM_STAT_VM : in dm_stat_vm_type; -- debug and monitor status - vmbox
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DM_STAT_CO : in dm_stat_co_type; -- debug and monitor status - core
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DM_STAT_CA : in dm_stat_ca_type -- debug and monitor status - cache
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@ -87,6 +89,7 @@ begin
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write(oline, string'("#"));
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write(oline, string'(" clkcycle:d"));
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write(oline, string'(" cpu:o"));
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write(oline, string'(" dp.pc:o"));
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write(oline, string'(" dp.psw:o"));
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write(oline, string'(" dp.ireg:o"));
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@ -101,6 +104,11 @@ begin
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write(oline, string'(" dp.gr_bytop:b"));
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write(oline, string'(" dp.gr_we:b"));
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write(oline, string'(" se.istart:b"));
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write(oline, string'(" se.vstart:b"));
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write(oline, string'(" vm.vmcntl.cacc:b"));
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write(oline, string'(" vm.vmcntl.macc:b"));
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write(oline, string'(" vm.ibmreq.aval:b"));
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write(oline, string'(" vm.ibmreq.re:b"));
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write(oline, string'(" vm.ibmreq.we:b"));
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@ -183,6 +191,7 @@ begin
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-- sequence of writes must equal the sequence of field desciptors above
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write(oline, clkcycle, right, 9);
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write(oline, string'(" 0"));
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writeoct(oline, DM_STAT_DP.pc, right, 7);
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writeoct(oline, ipsw, right, 7);
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writeoct(oline, DM_STAT_DP.ireg, right, 7);
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@ -194,9 +203,14 @@ begin
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writeoct(oline, DM_STAT_DP.dres, right, 7);
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writeoct(oline, DM_STAT_DP.gr_adst, right, 2);
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writeoct(oline, DM_STAT_DP.gr_mode, right, 2);
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write(oline, DM_STAT_DP.gr_bytop, right, 2);
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write(oline, DM_STAT_DP.gr_we, right, 2);
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write(oline, DM_STAT_DP.gr_bytop, right, 2);
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write(oline, DM_STAT_DP.gr_we, right, 2);
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write(oline, DM_STAT_SE.istart, right, 2);
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write(oline, DM_STAT_SE.vstart, right, 2);
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write(oline, DM_STAT_VM.vmcntl.cacc, right, 2);
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write(oline, DM_STAT_VM.vmcntl.macc, right, 2);
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write(oline, DM_STAT_VM.ibmreq.aval, right, 2);
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write(oline, DM_STAT_VM.ibmreq.re, right, 2);
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write(oline, DM_STAT_VM.ibmreq.we, right, 2);
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@ -1,6 +1,6 @@
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-- $Id: pdp11_tmu_sb.vhd 1181 2019-07-08 17:00:50Z mueller $
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-- $Id: pdp11_tmu_sb.vhd 1348 2023-01-08 13:33:01Z mueller $
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-- SPDX-License-Identifier: GPL-3.0-or-later
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-- Copyright 2009-2018 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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-- Copyright 2009-2023 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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------------------------------------------------------------------------------
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-- Module Name: pdp11_tmu - sim
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@ -8,9 +8,10 @@
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--
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-- Dependencies: simbus
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-- Test bench: -
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-- Tool versions: xst 8.1-14.7; viv 2016.2-2018.2; ghdl 0.18-0.34
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-- Tool versions: xst 8.1-14.7; viv 2016.2-2022.1; ghdl 0.18-2.0.0
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-- Revision History:
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-- Date Rev Version Comment
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-- 2023-01-08 1348 1.0.3 add port DM_STAT_SE
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-- 2018-10-05 1053 1.0.2 use DM_STAT_CA instead of DM_STAT_SY
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-- 2015-11-01 712 1.0.1 use sbcntl_sbf_tmu
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-- 2009-05-10 214 1.0 Initial version
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@ -30,6 +31,7 @@ entity pdp11_tmu_sb is -- trace and mon. unit; simbus wrapper
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port (
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CLK : in slbit; -- clock
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DM_STAT_DP : in dm_stat_dp_type; -- debug and monitor status - dpath
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DM_STAT_SE : in dm_stat_se_type; -- debug and monitor status - sequencer
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DM_STAT_VM : in dm_stat_vm_type; -- debug and monitor status - vmbox
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DM_STAT_CO : in dm_stat_co_type; -- debug and monitor status - core
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DM_STAT_CA : in dm_stat_ca_type -- debug and monitor status - cache
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@ -53,6 +55,7 @@ begin
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CLK => CLK,
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ENA => ENA,
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DM_STAT_DP => DM_STAT_DP,
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DM_STAT_SE => DM_STAT_SE,
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DM_STAT_VM => DM_STAT_VM,
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DM_STAT_CO => DM_STAT_CO,
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DM_STAT_CA => DM_STAT_CA
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@ -1,6 +1,6 @@
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-- $Id: tbd_pdp11core.vhd 1181 2019-07-08 17:00:50Z mueller $
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-- $Id: tbd_pdp11core.vhd 1348 2023-01-08 13:33:01Z mueller $
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-- SPDX-License-Identifier: GPL-3.0-or-later
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-- Copyright 2007-2018 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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-- Copyright 2007-2023 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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------------------------------------------------------------------------------
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-- Module Name: tbd_pdp11core - syn
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@ -17,7 +17,7 @@
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-- To test: pdp11_core
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--
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-- Target Devices: generic
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-- Tool versions: xst 8.2-14.7; viv 2016.2-2018.2; ghdl 0.18-0.34
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-- Tool versions: xst 8.2-14.7; viv 2016.2-2022.1; ghdl 0.18-2.0.0
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--
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-- Synthesized (xst):
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-- Date Rev ise Target flop lutl lutm slic t peri
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@ -32,6 +32,7 @@
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--
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-- Revision History:
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-- Date Rev Version Comment
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-- 2023-01-08 1348 1.6.5 pass DM_STAT_SE to pdp11_tmu_sb
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-- 2018-10-07 1054 1.6.4 drop ITIMER from core
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-- 2018-10-05 1053 1.6.3 use DM_STAT_CA instead of DM_STAT_SY
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-- 2015-11-01 712 1.6.2 use sbcntl_sbf_tmu
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@ -118,6 +119,7 @@ architecture syn of tbd_pdp11core is
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signal IB_SRES_M : ib_sres_type := ib_sres_init;
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signal DM_STAT_DP : dm_stat_dp_type := dm_stat_dp_init;
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signal DM_STAT_SE : dm_stat_se_type := dm_stat_se_init;
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signal DM_STAT_VM : dm_stat_vm_type := dm_stat_vm_init;
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signal DM_STAT_CO : dm_stat_co_type := dm_stat_co_init;
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signal DM_STAT_CA : dm_stat_ca_type := dm_stat_ca_init;
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@ -177,7 +179,7 @@ begin
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BRESET => BRESET,
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IB_MREQ_M => IB_MREQ_M,
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IB_SRES_M => IB_SRES_M,
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DM_STAT_SE => open,
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DM_STAT_SE => DM_STAT_SE,
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DM_STAT_DP => DM_STAT_DP,
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DM_STAT_VM => DM_STAT_VM,
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DM_STAT_CO => DM_STAT_CO
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@ -218,6 +220,7 @@ begin
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port map (
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CLK => CLK,
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DM_STAT_DP => DM_STAT_DP,
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DM_STAT_SE => DM_STAT_SE,
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DM_STAT_VM => DM_STAT_VM,
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DM_STAT_CO => DM_STAT_CO,
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DM_STAT_CA => DM_STAT_CA
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@ -1,10 +1,13 @@
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#!/usr/bin/perl -w
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# $Id: tmuconv 1346 2023-01-06 12:56:08Z mueller $
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# $Id: tmuconv 1348 2023-01-08 13:33:01Z mueller $
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# SPDX-License-Identifier: GPL-3.0-or-later
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# Copyright 2008-2023 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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#
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# Revision History:
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# Date Rev Version Comment
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# 2023-01-08 1348 1.1.14 use vm.vmcntl.[cm]acc, se.[iv]start fields; add type
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# column to em line; remove VFETCH/VPUSH heuristics;
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# add -t_emm, -t_fle, -t_fli, -i_flei
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# 2023-01-05 1346 1.1.13 add memory system register names
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# 2022-12-29 1340 1.1.12 fix ru header
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# 2022-12-01 1324 1.1.11 change VFETCH text for MMU(250) and FPP(244)
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@ -49,6 +52,10 @@
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# dp.gr_mode:o
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# dp.gr_bytop:b
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# dp.gr_we:b
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# se.istart:b
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# se.vstart:b
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# vm.vmcntl.cacc:b
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# vm.vmcntl.macc:b
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# vm.ibmreq.aval:b
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# vm.ibmreq.re:b
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# vm.ibmreq.we:b
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@ -94,7 +101,9 @@ use Getopt::Long;
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my %opts = ();
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GetOptions(\%opts, "help", "dump", "cdump", "emcancel",
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"t_id", "t_ru", "t_ru06", "t_em","t_vf", "t_ib", "t_flow", "t_all")
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"t_id", "t_ru", "t_ru06", "t_em", "t_emm", "t_vf", "t_ib",
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"t_flow", "t_fle", "t_fli", "t_flei",
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"t_all")
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or bailout("bad command options");
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my @var_name;
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@ -122,6 +131,11 @@ my $ind_dp_gr_mode;
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my $ind_dp_gr_bytop;
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my $ind_dp_gr_we;
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my $ind_se_istart;
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my $ind_se_vstart;
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my $ind_vm_vmcntl_cacc;
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my $ind_vm_vmcntl_macc;
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my $ind_vm_ibmreq_aval;
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my $ind_vm_ibmreq_re;
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my $ind_vm_ibmreq_we;
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@ -468,12 +482,29 @@ if ($opts{help}) {
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my $nopts = 0; # count options
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$nopts += 1 if $opts{dump};
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$nopts += 1 if $opts{cdump};
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if ($opts{t_flow}) { # t_flow implies t_id,t_ru06,t_vf
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if ($opts{t_flow}) { # t_flow -> t_id,t_ru06,t_vf
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$opts{t_id} = 1;
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$opts{t_ru06} = 1;
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$opts{t_vf} = 1;
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}
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if ($opts{t_all}) { # t_all implies all t_*
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if ($opts{t_fle}) { # t_fle -> t_id,t_ru06,t_emm
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$opts{t_id} = 1;
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$opts{t_ru06} = 1;
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$opts{t_emm} = 1;
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}
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if ($opts{t_fli}) { # t_fli -> t_id,t_ru06,t_vf,t_ib
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$opts{t_id} = 1;
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$opts{t_ru06} = 1;
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$opts{t_vf} = 1;
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$opts{t_ib} = 1;
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}
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if ($opts{t_flei}) { # t_flei -> t_id,t_ru06,t_emm,t_ib
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$opts{t_id} = 1;
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$opts{t_ru06} = 1;
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$opts{t_emm} = 1;
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$opts{t_ib} = 1;
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}
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if ($opts{t_all}) { # t_all -> all t_*
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$opts{t_id} = 1;
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$opts{t_ru} = 1;
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$opts{t_em} = 1;
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@ -483,6 +514,7 @@ $nopts += 1 if $opts{t_id};
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$nopts += 1 if $opts{t_ru};
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$nopts += 1 if $opts{t_ru06};
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$nopts += 1 if $opts{t_em};
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$nopts += 1 if $opts{t_emm};
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$nopts += 1 if $opts{t_vf};
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$nopts += 1 if $opts{t_ib};
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@ -496,8 +528,8 @@ print "# cycle id pc psw ireg code nc\n"
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if $opts{t_id};
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print "# cycle ru b sr data grstat\n"
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if $opts{t_ru} or $opts{t_ru06};
|
||||
print "# cycle em d be addr wdat rdat crwh nc\n"
|
||||
if $opts{t_em} or $opts{t_vf};
|
||||
print "# cycle em td be addr wdat rdat crwh nc\n"
|
||||
if $opts{t_em} or $opts{t_emm} or $opts{t_vf};
|
||||
print "# cycle ib cr rmbe addr wdat rdat a nc name\n"
|
||||
if $opts{t_ib};
|
||||
|
||||
@ -505,7 +537,6 @@ foreach my $file (@ARGV) {
|
||||
do_file($file);
|
||||
}
|
||||
|
||||
|
||||
#-------------------------------------------------------------------------------
|
||||
|
||||
sub do_file {
|
||||
@ -517,15 +548,15 @@ sub do_file {
|
||||
my $change_cyc = 0;
|
||||
my $emreq_cyc = 0;
|
||||
my $emreq_str = "";
|
||||
my $emreq_typ = ' ';
|
||||
my $ibreq_cyc = 0;
|
||||
my $ibreq_typ = "";
|
||||
my $ibreq_str = "";
|
||||
my $ibreq_nam = "";
|
||||
my $in_vflow = 0; # vector flow flag
|
||||
|
||||
my $emcurr_we = 0; # curr em write enable (or undef)
|
||||
my $emcurr_addr = undef; # curr em address
|
||||
my $emlast_we = 0; # prev em write enable (or undef)
|
||||
my $emlast_addr = undef; # prev em address
|
||||
|
||||
while (<IFILE>) {
|
||||
chomp;
|
||||
@ -559,6 +590,11 @@ sub do_file {
|
||||
$ind_dp_gr_bytop = $name{'dp.gr_bytop'}->{ind};
|
||||
$ind_dp_gr_we = $name{'dp.gr_we'}->{ind};
|
||||
|
||||
$ind_se_istart = $name{'se.istart'}->{ind};
|
||||
$ind_se_vstart = $name{'se.vstart'}->{ind};
|
||||
|
||||
$ind_vm_vmcntl_cacc = $name{'vm.vmcntl.cacc'}->{ind};
|
||||
$ind_vm_vmcntl_macc = $name{'vm.vmcntl.macc'}->{ind};
|
||||
$ind_vm_ibmreq_aval = $name{'vm.ibmreq.aval'}->{ind};
|
||||
$ind_vm_ibmreq_re = $name{'vm.ibmreq.re'}->{ind};
|
||||
$ind_vm_ibmreq_we = $name{'vm.ibmreq.we'}->{ind};
|
||||
@ -628,6 +664,9 @@ sub do_file {
|
||||
my $ibreq_we = 0;
|
||||
my $ibreq_act = 0;
|
||||
|
||||
$in_vflow = 1 if ($val_curr[$ind_se_vstart]); # vflow start
|
||||
$in_vflow = 0 if ($val_curr[$ind_se_istart]); # vflow end
|
||||
|
||||
if ($opts{dump} || $opts{cdump}) {
|
||||
my @val_change;
|
||||
my $any_change;
|
||||
@ -725,10 +764,15 @@ sub do_file {
|
||||
# vm_emsres_ack_w = '1'
|
||||
# vm_emsreq_cancel = '1'
|
||||
#
|
||||
if ($opts{t_em} or $opts{t_vf}) {
|
||||
if ($opts{t_em} or $opts{t_emm} or $opts{t_vf}) {
|
||||
if ($val_curr[$ind_vm_emmreq_req]) {
|
||||
$emreq_cyc = $cyc_curr;
|
||||
$emreq_str = sprintf "%s %s %8.8o",
|
||||
$emreq_typ = $in_vflow ? 'v' : ' ';
|
||||
$emreq_typ = 'i' if $val_curr[$ind_se_istart];
|
||||
$emreq_typ = 'c' if $val_curr[$ind_vm_vmcntl_cacc];
|
||||
$emreq_typ = 'm' if $val_curr[$ind_vm_vmcntl_macc];
|
||||
$emreq_str = sprintf "%s%s %s %8.8o",
|
||||
$emreq_typ,
|
||||
($val_curr[$ind_vm_emmreq_we] ? "w" : "r"),
|
||||
$val_curr[$ind_vm_emmreq_be],
|
||||
$val_curr[$ind_vm_emmreq_addr];
|
||||
@ -758,44 +802,51 @@ sub do_file {
|
||||
} else {
|
||||
$emreq_str .= " " x 7;
|
||||
}
|
||||
if (defined $emlast_we && $emcurr_we == $emlast_we) {
|
||||
if ($emcurr_we && $emcurr_addr == $emlast_addr-2) {
|
||||
$emtyp_str = "SPUSH";
|
||||
} elsif ((not $emcurr_we) && $emcurr_addr == $emlast_addr+2 &&
|
||||
$emcurr_addr < 0400 && ($emcurr_addr % 04) == 02) {
|
||||
if ($in_vflow) {
|
||||
if (not $emcurr_we) { # vflow reads
|
||||
$emtyp_str = "VFETCH";
|
||||
$emtyp_str .= " 004 ill.inst" if ($emlast_addr == 0004);
|
||||
$emtyp_str .= " 010 res.inst" if ($emlast_addr == 0010);
|
||||
$emtyp_str .= " 014 BPT" if ($emlast_addr == 0014);
|
||||
$emtyp_str .= " 020 IOT" if ($emlast_addr == 0020);
|
||||
$emtyp_str .= " 030 EMT" if ($emlast_addr == 0030);
|
||||
$emtyp_str .= " 034 TRAP" if ($emlast_addr == 0034);
|
||||
$emtyp_str .= " 060 DL11-TTI" if ($emlast_addr == 0060);
|
||||
$emtyp_str .= " 064 DL11-TTO" if ($emlast_addr == 0064);
|
||||
$emtyp_str .= " 070 PC11-PTR" if ($emlast_addr == 0070);
|
||||
$emtyp_str .= " 074 PC11-PTP" if ($emlast_addr == 0074);
|
||||
$emtyp_str .= " 100 KW11-L" if ($emlast_addr == 0100);
|
||||
$emtyp_str .= " 104 KW11-P" if ($emlast_addr == 0104);
|
||||
$emtyp_str .= " 120 DEUNA" if ($emlast_addr == 0120);
|
||||
$emtyp_str .= " 160 RL11" if ($emlast_addr == 0160);
|
||||
$emtyp_str .= " 200 LP11" if ($emlast_addr == 0200);
|
||||
$emtyp_str .= " 220 RK11" if ($emlast_addr == 0220);
|
||||
$emtyp_str .= " 224 TM11" if ($emlast_addr == 0224);
|
||||
$emtyp_str .= " 240 PIRQ" if ($emlast_addr == 0240);
|
||||
$emtyp_str .= " 244 FPE" if ($emlast_addr == 0244);
|
||||
$emtyp_str .= " 250 MMU" if ($emlast_addr == 0250);
|
||||
$emtyp_str .= " 254 RHRP" if ($emlast_addr == 0254);
|
||||
$emtyp_str .= " 260 IIST" if ($emlast_addr == 0260);
|
||||
$emtyp_str .= " 300 DL11-2-TTI" if ($emlast_addr == 0300);
|
||||
$emtyp_str .= " 304 DL11-2-TTO" if ($emlast_addr == 0304);
|
||||
}
|
||||
}
|
||||
}
|
||||
if ($opts{t_vf} and not $opts{t_em}) { # only -t_vf
|
||||
$emtyp_str .= $in_vflow==1 ? ' PC' : ' PS';
|
||||
if ($in_vflow == 1) {
|
||||
$emtyp_str .= " 004 ill.inst" if ($emcurr_addr == 0004);
|
||||
$emtyp_str .= " 010 res.inst" if ($emcurr_addr == 0010);
|
||||
$emtyp_str .= " 014 BPT" if ($emcurr_addr == 0014);
|
||||
$emtyp_str .= " 020 IOT" if ($emcurr_addr == 0020);
|
||||
$emtyp_str .= " 030 EMT" if ($emcurr_addr == 0030);
|
||||
$emtyp_str .= " 034 TRAP" if ($emcurr_addr == 0034);
|
||||
$emtyp_str .= " 060 DL11-TTI" if ($emcurr_addr == 0060);
|
||||
$emtyp_str .= " 064 DL11-TTO" if ($emcurr_addr == 0064);
|
||||
$emtyp_str .= " 070 PC11-PTR" if ($emcurr_addr == 0070);
|
||||
$emtyp_str .= " 074 PC11-PTP" if ($emcurr_addr == 0074);
|
||||
$emtyp_str .= " 100 KW11-L" if ($emcurr_addr == 0100);
|
||||
$emtyp_str .= " 104 KW11-P" if ($emcurr_addr == 0104);
|
||||
$emtyp_str .= " 120 DEUNA" if ($emcurr_addr == 0120);
|
||||
$emtyp_str .= " 160 RL11" if ($emcurr_addr == 0160);
|
||||
$emtyp_str .= " 200 LP11" if ($emcurr_addr == 0200);
|
||||
$emtyp_str .= " 220 RK11" if ($emcurr_addr == 0220);
|
||||
$emtyp_str .= " 224 TM11" if ($emcurr_addr == 0224);
|
||||
$emtyp_str .= " 240 PIRQ" if ($emcurr_addr == 0240);
|
||||
$emtyp_str .= " 244 FPE" if ($emcurr_addr == 0244);
|
||||
$emtyp_str .= " 250 MMU" if ($emcurr_addr == 0250);
|
||||
$emtyp_str .= " 254 RHRP" if ($emcurr_addr == 0254);
|
||||
$emtyp_str .= " 260 IIST" if ($emcurr_addr == 0260);
|
||||
$emtyp_str .= " 300 DL11-2-TTI" if ($emcurr_addr == 0300);
|
||||
$emtyp_str .= " 304 DL11-2-TTO" if ($emcurr_addr == 0304);
|
||||
}
|
||||
} else { # vflow writes
|
||||
$emtyp_str = "VPUSH";
|
||||
$emtyp_str .= $in_vflow==3 ? ' PS' : ' PC';
|
||||
}
|
||||
$in_vflow += 1;
|
||||
} # if $in_vflow
|
||||
} # if not vm_emmreq_cancel
|
||||
if ($opts{t_vf} and not ($opts{t_em} or $opts{t_emm})) { # only -t_vf
|
||||
$emres_str = "" unless $emtyp_str =~ m/^VFETCH/;
|
||||
}
|
||||
$emlast_we = $emcurr_we;
|
||||
$emlast_addr = $emcurr_addr;
|
||||
if ($opts{t_emm} and not $opts{t_em}) {
|
||||
$emres_str = "" if $val_curr[$ind_vm_emmreq_cancel];
|
||||
$emres_str = "" if $emreq_typ eq 'i'; # suppress instruction fetch
|
||||
$emres_str = "" if $emreq_typ eq 'c'; # suppress control port access
|
||||
}
|
||||
}
|
||||
} # if t_em or t_vf
|
||||
#
|
||||
@ -846,7 +897,7 @@ sub do_file {
|
||||
|
||||
print "$cyc_str id $id_str\n" if $id_str;
|
||||
if ($emres_str) {
|
||||
printf "$cyc_str em $emreq_str $emres_str (%d) $emtyp_str\n",
|
||||
printf "$cyc_str em $emreq_str $emres_str (%d) $emtyp_str\n",
|
||||
$cyc_curr-$emreq_cyc;
|
||||
}
|
||||
if ($ibres_str) {
|
||||
@ -1022,8 +1073,12 @@ sub print_help {
|
||||
print " --t_ru trace register updates\n";
|
||||
print " --t_ru06 trace register updates for r0-r5 and sp\n";
|
||||
print " --t_em trace em transactions\n";
|
||||
print " --t_emm trace em transactions except type i and c\n";
|
||||
print " --t_vf trace only vector fetch em transactions\n";
|
||||
print " --t_ib trace ib transactions\n";
|
||||
print " --t_flow trace id,ru06, and vf transactions\n";
|
||||
print " --t_all trace id,ru,em, and ib transactions\n";
|
||||
print " --t_flow trace id, ru06 and vf transactions\n";
|
||||
print " --t_fle trace id, ru06 and emm transactions\n";
|
||||
print " --t_fli trace id, ru06, vf and ib transactions\n";
|
||||
print " --t_flei trace id, ru06, emm and ib transactions\n";
|
||||
print " --t_all trace id, ru, em and ib transactions\n";
|
||||
}
|
||||
|
||||
@ -1,11 +1,11 @@
|
||||
.\" -*- nroff -*-
|
||||
.\" $Id: tmuconv.1 1316 2022-11-18 15:26:40Z mueller $
|
||||
.\" $Id: tmuconv.1 1348 2023-01-08 13:33:01Z mueller $
|
||||
.\" SPDX-License-Identifier: GPL-3.0-or-later
|
||||
.\" Copyright 2013-2022 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
|
||||
.\" Copyright 2013-2023 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
|
||||
.\"
|
||||
.\" ------------------------------------------------------------------
|
||||
.
|
||||
.TH TMUCONV 1 2022-11-18 "Retro Project" "Retro Project Manual"
|
||||
.TH TMUCONV 1 2023-01-08 "Retro Project" "Retro Project Manual"
|
||||
.\" ------------------------------------------------------------------
|
||||
.SH NAME
|
||||
tmuconv \- convert w11a tmu output into human readable format
|
||||
@ -30,7 +30,7 @@ output is \fB\-t_id\fR \fB\-t_vf\fR.
|
||||
.SH OPTIONS
|
||||
.
|
||||
.\" ----------------------------------------------
|
||||
.IP "\fB\-dump\fR"
|
||||
.IP "\fB\-dump\fR" 8
|
||||
dump all information.
|
||||
.
|
||||
.\" ----------------------------------------------
|
||||
@ -51,7 +51,7 @@ trace register updates.
|
||||
.
|
||||
.\" ----------------------------------------------
|
||||
.IP "\fB\-t_ru06\fR"
|
||||
trace register updates for r0-r5 and sp (subset of \fB\-t_ru\fR)
|
||||
trace register updates for r0-r5 and sp (subset of \fB\-t_ru\fR).
|
||||
.
|
||||
.\" ----------------------------------------------
|
||||
.IP "\fB\-t_em\fR"
|
||||
@ -60,13 +60,36 @@ em transactions that converted to an ib transaction are labeled 'cancel'.
|
||||
They are not shown when \fB\-t_ib\fR is active and no \fB\-emcancel\fR option
|
||||
is given. This gives the most readable output for \fB\-t_all\fR.
|
||||
|
||||
Reads from well known vector addresses are labeled 'VFETCH'.
|
||||
This is very helpful for the detection of interrupts.
|
||||
See also \fB\-t_vf\fR.
|
||||
Note: every read from location 200 will therefore be labeled 'VFETCH 200 LP11',
|
||||
also when it is an instruction fetch for a 'JMP' instruction in old maindecs
|
||||
with start address 200.
|
||||
Each transaction is associated with type
|
||||
.RS
|
||||
.RS 3
|
||||
.PD 0
|
||||
.IP " i" 5
|
||||
instruction fetch
|
||||
.IP " v"
|
||||
vector fetch or push
|
||||
.IP " m"
|
||||
read modify write
|
||||
.IP " c"
|
||||
control port access (often cdma)
|
||||
.PD
|
||||
.RE
|
||||
|
||||
A blank type field means 'none of the above' and is used for all em
|
||||
transactions issued by instructions including index word and immediate
|
||||
value reads.
|
||||
|
||||
The vector fetch transactions are further annotated for well known vector
|
||||
addresses. This is very helpful for the detection of interrupts.
|
||||
.RE
|
||||
.
|
||||
.\" ----------------------------------------------
|
||||
.IP "\fB\-t_emm\fR"
|
||||
trace only em transaction that are not type i or c and are not canceled
|
||||
(subset of \fB\-t_em\fR).
|
||||
Useful in conjunction with \fB\-t_id\fR because the information of the
|
||||
instruction fetch read is included in the \fB\-t_id\fR output.
|
||||
|
||||
.\" ----------------------------------------------
|
||||
.IP "\fB\-t_vf\fR"
|
||||
trace only vector fetch em transactions (subset of \fB\-t_em\fR)
|
||||
@ -78,7 +101,23 @@ unless the \fB\-emcancel\fR option is given.
|
||||
.
|
||||
.\" ----------------------------------------------
|
||||
.IP "\fB\-t_flow\fR"
|
||||
trace flow, equivalent to \fB\-t_id\fR \fB\-t_ru06\fR \fB\-t_vf\fR
|
||||
trace instruction flow,
|
||||
is equivalent to \fB\-t_id\fR \fB\-t_ru06\fR \fB\-t_vf\fR
|
||||
.
|
||||
.\" ----------------------------------------------
|
||||
.IP "\fB\-t_fle\fR"
|
||||
trace instruction flow and show instruction related em transactions,
|
||||
is equivalent to \fB\-t_id\fR \fB\-t_ru06\fR \fB\-t_emm\fR
|
||||
.
|
||||
.\" ----------------------------------------------
|
||||
.IP "\fB\-t_fli\fR"
|
||||
trace instruction flow and show ibus transactions,
|
||||
equivalent to \fB\-t_id\fR \fB\-t_ru06\fR \fB\-t_vf\fR \fB\-t_ib\fR
|
||||
.
|
||||
.\" ----------------------------------------------
|
||||
.IP "\fB\-t_flei\fR"
|
||||
combination of "\fB\-t_fle\fR" and "\fB\-t_fli\fR",
|
||||
is equivalent to \fB\-t_id\fR \fB\-t_ru06\fR \fB\-t_emm\fR \fB\-t_ib\fR
|
||||
.
|
||||
.\" ----------------------------------------------
|
||||
.IP "\fB\-t_all\fR"
|
||||
@ -149,6 +188,8 @@ the symbolic name of the register
|
||||
.RS 2
|
||||
.PD 0
|
||||
.IP "-" 2
|
||||
the access type flag (values see \fB\-t_em\fP descriprion)
|
||||
.IP "-"
|
||||
the r/w flag
|
||||
.IP "-"
|
||||
the byte enables
|
||||
@ -171,12 +212,15 @@ in case of vector fetches and associated stack pushes some descriptive text
|
||||
.EX
|
||||
cycle be addr wdat rdat crwh nc
|
||||
11374 em w 11 00000004 000006 0010 (1)
|
||||
52574 em r 11 00002164 177624 0101 (1)
|
||||
52574 em r 11 00002164 177624 0101 (1)
|
||||
|
||||
52530 em r 11 00000020 002142 0101 (1)
|
||||
52532 em r 11 00000022 000340 0101 (1) VFETCH 020 IOT
|
||||
52536 em w 11 00001776 000017 0010 (1)
|
||||
52538 em w 11 00001774 004316 0010 (1) SPUSH
|
||||
86703 em mr 11 00003320 000000 0101 (1)
|
||||
86705 em mw 11 00003320 000001 0010 (1)
|
||||
|
||||
87102 em vr 11 00000020 002222 0101 (1) VFETCH PC 020 IOT
|
||||
87104 em vr 11 00000022 000340 0101 (1) VFETCH PS
|
||||
87108 em vw 11 00001776 000004 0010 (1) VPUSH PS
|
||||
87114 em vw 11 00001774 003324 0010 (5) VPUSH PC
|
||||
.EE
|
||||
|
||||
\fB\-t_ib\fP: the ibus transaction trace gives
|
||||
|
||||
@ -1,10 +1,10 @@
|
||||
# $Id: test_w11a_cdma.tcl 1347 2023-01-07 12:48:58Z mueller $
|
||||
# $Id: test_w11a_cdma.tcl 1348 2023-01-08 13:33:01Z mueller $
|
||||
# SPDX-License-Identifier: GPL-3.0-or-later
|
||||
# Copyright 2023- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
|
||||
#
|
||||
# Revision History:
|
||||
# Date Rev Version Comment
|
||||
# 2023-01-07 1347 1.0 Initial version
|
||||
# 2023-01-07 1348 1.0 Initial version
|
||||
#
|
||||
# Test bwm/brm while CPU active
|
||||
#
|
||||
@ -61,18 +61,29 @@ $cpu cp -wal $sym(data) \
|
||||
rlc log " A2: bwm/brm while CPU in WAIT -----------------------------"
|
||||
|
||||
$cpu ldasm -lst lst -sym sym {
|
||||
.include |lib/defs_cpu.mac|
|
||||
;
|
||||
; setup pirq vector
|
||||
. = 000240
|
||||
.word vh.pir
|
||||
.word cp.pr7
|
||||
;
|
||||
. = 1000
|
||||
;
|
||||
stack:
|
||||
start: wait ; wait for interrupt
|
||||
100$: halt
|
||||
stop:
|
||||
;
|
||||
; PIRQ handler
|
||||
vh.pir: clr cp.pir ; cancel PIRQ requests
|
||||
rti
|
||||
;
|
||||
buf: .blkw 128. ; buffer for dma
|
||||
}
|
||||
|
||||
# start code
|
||||
$cpu cp -creset \
|
||||
-stapc $sym(start)
|
||||
rw11::asmrun $cpu sym
|
||||
# check that wait does wait
|
||||
rw11::asmtreg $cpu pc $sym(start:100$)
|
||||
# write to buffer
|
||||
@ -83,7 +94,6 @@ rw11::asmtreg $cpu pc $sym(start:100$)
|
||||
$cpu cp -wal $sym(buf) \
|
||||
-brm [llength $buf] -edata $buf
|
||||
rw11::asmtreg $cpu pc $sym(start:100$)
|
||||
# stop code and harvest attention
|
||||
$cpu cp -stop \
|
||||
-attn
|
||||
|
||||
# end code via PIRQ interrupt with console write to cp.pir
|
||||
$cpu cp -wibr [$cpu imap pirq] [regbld rw11::PIRQ {pir 2}]
|
||||
rw11::asmwait $cpu sym; # checks pc
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user