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cpu_eis.mac: add MUL,DIV odd, XOR

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wfjm
2022-07-21 08:10:47 +02:00
parent c14eddd0b1
commit e1a577f26e
4 changed files with 269 additions and 8 deletions
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12
rtl/w11a/tb/tb_pdp11core_stim.dat
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@@ -1,4 +1,4 @@
# $Id: tb_pdp11core_stim.dat 1257 2022-07-16 21:49:08Z mueller $
# $Id: tb_pdp11core_stim.dat 1259 2022-07-18 17:39:40Z mueller $
# SPDX-License-Identifier: GPL-3.0-or-later
# Copyright 2007-2016 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
#
@@ -794,6 +794,7 @@ brm 7
d=000170 -- ! mem(3174)=170
#-----------------------------------------------------------------------------
C Setup code 12 [base 3300; use 33-34] (PSW access via sex,clx,spl,mov, and clr)
# ==> now tested with cpu_basics.mac:A1.1, cpu_basics.mac:F1.*
#
wal 003300 -- code:
bwm 23
@@ -2258,6 +2259,7 @@ brm 14
#
#-----------------------------------------------------------------------------
C Setup code 24 [base 6400] (test MARK instruction)
# ==> now tested with cpu_basics.mac:A5.*
#
wal 006400 -- code (main):
bwm 13
@@ -2850,6 +2852,7 @@ brm 6
d=100100 -- ! mem(7752)
#-----------------------------------------------------------------------------
C Setup code 30 [base 10200; use 102-103] (test MUL instruction)
# ==> now tested with cpu_eis.mac:B1.1
#
wal 010200 -- code test 1 (mul even)
bwm 8
@@ -2972,6 +2975,7 @@ brm 8
C Setup code 31 [base 10400; use 104-110] (test DIV instruction, also ADC,SXT)
# Note: test 2 uses sbc too, but if div/div work correctly we have always
# C=0 for sbc, so sbc isn't tested. adc has C=0 or C=1 though.
# ==> now tested with cpu_eis.mac:B1.2
#
wal 010400 -- code test 1
bwm 8
@@ -3214,6 +3218,7 @@ rr5 d=000000 -- ! r5
rpc d=010500 -- ! pc
#-----------------------------------------------------------------------------
C Setup code 32 [base 11100; use 111-112] (PIRQ test)
# ==> now tested with cpu_details.mac:B1.*
# The code will exercise all 7 pirq interrupt levels:
# set 1+3 -> handle 3, set 7 -> handle 7, set 6+4 -> handle 6
# -> handle 4, set 5+2 -> handle 5 -> handle 2 > handle 1
@@ -3325,6 +3330,7 @@ bwm 2
000000 -- PS:0
#-----------------------------------------------------------------------------
C Setup code 33 [base 11200; use 112-113] (adc(b) and sbc(b) test)
# ==> obsolete, fully tested in cpu_basics.mac:B5,B6,D5,D6
#
wal 011200 -- code test 1: (adc)
bwm 5
@@ -5147,6 +5153,8 @@ brm 110
#-----------------------------------------------------------------------------
C Setup code 43 [base 12700] (Begemot MARK instruction test)
# test data and code adapted from Mark.s11 code of Begemot p11-2.10c
# ==> now tested with cpu_basics.mac:A5.*
# ==> partialy redundant with code 24, not need to go deeper for this bastard
#
wal 012700 -- code test 1: (basics)
bwm 14
@@ -6975,6 +6983,7 @@ brm 12
d=110000 -- !
#--------
C Exec test 46.16wrc0: XOR - reg, C=0
# ==> now tested with cpu_eis.mac:E1.1
#
wal 013246 -- setup test instructions:
bwm 2
@@ -7008,6 +7017,7 @@ brm 12
d=000000 -- !
#--------
C Exec test 46.16wrc1: XOR - reg, C=1
# ==> now tested with cpu_eis.mac:E1.1
#
wal 013246 -- setup test instructions:
bwm 2