mirror of
https://github.com/wfjm/w11.git
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add dz11 tbench
This commit is contained in:
wfjm
@@ -35,10 +35,10 @@ The full set of tests is only run for tagged releases.
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- Rw11UnitDZ11: unit
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- new verification codes
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- test_m9312_all.tcl: tbench for m9312
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- test_dz11_*.tcl: tbench for dz11
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- new test and demonstration codes under tools/mcode
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- m9312/bootw11.mac: w11 boot for m9312
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- sys/noboot.mac: boot blocker code for block 0 of disks
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-
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### Changes
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- tools changes
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@@ -456,7 +456,7 @@ The full set of tests is only run for tagged releases.
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proper operation of vivado under Ubuntu 16.04
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- use -std=c++11 (gcc 4.7 or later)
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- for all FTDI USB-UART it is essential to set them to `low latency` mode.
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That was default for linux kernels 2.6.32 to 4.4.52. Since about March
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That was default for Linux kernels 2.6.32 to 4.4.52. Since about March
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2017 one gets kernels with 16 ms default latency again, thanks to
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[kernel patch 9589541](https://patchwork.kernel.org/patch/9589541/).
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**For newer systems it is essential to install a udev rule** which
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49
tools/asm-11/lib/defs_dz.mac
Normal file
49
tools/asm-11/lib/defs_dz.mac
Normal file
@@ -0,0 +1,49 @@
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; $Id: defs_dz.mac 1148 2019-05-12 10:10:44Z mueller $
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; Copyright 2019- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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; License disclaimer see License.txt in $RETROBASE directory
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;
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; definitions for primary DZ11 controler (as in defs_dz.das)
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;
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; vector address/priority definition
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;
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va.dzr=000310
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vp.dzr=4
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va.dzt=000314
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vp.dzt=4
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;
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; register addresses
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;
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dz.csr=160100
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dz.rbu=160102 ; read
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dz.lpr=160102 ; write
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dz.tcr=160104 ; word
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dz.len=160104 ; byte
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dz.dtr=160105 ; byte
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dz.tbu=160106 ; write-byte
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dz.brk=160107 ; write-byte
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dz.msr=160106 ; read-word
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dz.rin=160106 ; read-byte
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dz.co =160107 ; read-byte
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;
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; symbol definitions for dz.csr
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;
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dz.trd=100000
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dz.tie=040000
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dz.sa=020000
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dz.sae=010000
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dz.rdo=000200
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dz.rie=000100
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dz.mse=000040
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dz.clr=000020
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dz.mai=000010
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;
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; symbol definitions for dz.rbu (read used as rbuf)
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;
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dz.val=100000
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dz.fer=020000
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;
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; symbol definitions for dz.lpr (write used as lpr)
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;
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dz.rxo=010000
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dz.f96=007000 ; freq=1110 -> 9600 Baud
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dz.cl8=000030 ; clgth=11 -> 8 bits
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@@ -4,10 +4,11 @@ This directory tree contains the **w11 test bench** and is organized in
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| --------- | ------- |
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| [cp](cp) | test of CPU control port |
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| [deuna](deuna) | test of `deuna` ibus device |
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| [pc11](dl11) | test of `dl11` ibus device |
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| [dl11](dl11) | test of `dl11` ibus device |
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| [dz11](dz11) | test of `dz11` ibus device |
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| [kw11p](kw11p) | test of `kw11p` ibus device |
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| [pc11](lp11) | test of `lp11` ibus device |
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| [pc11](m9312) | test of `m9312` ibus device |
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| [lp11](lp11) | test of `lp11` ibus device |
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| [m9312](m9312) | test of `m9312` ibus device |
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| [pc11](pc11) | test of `pc11` ibus device |
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| [rhrp](rhrp) | test of `rhrp` ibus device |
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| [tm11](tm11) | test of `tm11` ibus device |
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@@ -1,4 +1,4 @@
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# $Id: dev_all.dat 1143 2019-05-01 13:25:51Z mueller $
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# $Id: dev_all.dat 1148 2019-05-12 10:10:44Z mueller $
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#
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## steering file for all devices tests
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#
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@@ -6,6 +6,7 @@
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@m9312/m9312_all.dat
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#
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@dl11/dl11_all.dat
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@dz11/dz11_all.dat
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@lp11/lp11_all.dat
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@pc11/pc11_all.dat
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@rhrp/rhrp_all.dat
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8
tools/tbench/dz11/dz11_all.dat
Normal file
8
tools/tbench/dz11/dz11_all.dat
Normal file
@@ -0,0 +1,8 @@
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# $Id: dz11_all.dat 1148 2019-05-12 10:10:44Z mueller $
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#
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## steering file for all dz11 tests
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#
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test_dz11_regs.tcl
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test_dz11_tx.tcl
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test_dz11_rx.tcl
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test_dz11_loop.tcl
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308
tools/tbench/dz11/test_dz11_loop.tcl
Normal file
308
tools/tbench/dz11/test_dz11_loop.tcl
Normal file
@@ -0,0 +1,308 @@
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# $Id: test_dz11_loop.tcl 1150 2019-05-19 17:52:54Z mueller $
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#
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# Copyright 2019- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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# License disclaimer see License.txt in $RETROBASE directory
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#
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# Revision History:
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# Date Rev Version Comment
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# 2019-05-18 1150 1.0 Initial version
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# 2019-05-11 1148 0.1 First draft
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#
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# Test DZ11 combined receiver + transmitter response
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# ----------------------------------------------------------------------------
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rlc log "test_dz11_loop: test dz11 receiver+transmit response ----------------"
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package require ibd_dz11
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if {![ibd_dz11::setup]} {
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rlc log " test_dz11_tx-W: device not found, test aborted"
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return
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}
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rlc set statmask $rw11::STAT_DEFMASK
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rlc set statvalue 0
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set attndl [expr {1<<$ibd_dz11::ANUM}]
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set attncpu [expr {1<<$rw11::ANUM}]
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# -- Section A ---------------------------------------------------------------
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rlc log " A1: init dz11 ---------------------------------------------"
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# - issue csr.clr
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# - remember 'awdth' retrieved from rcsr for later tests
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# - set rlim's to 0, clear fifos
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# - harvest any dangling attn
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$cpu cp \
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-wma dza.csr [regbld ibd_dz11::CSR clr] \
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-ribr dza.csr dzcntl \
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-wibr dza.csr [regbld ibd_dz11::RRLIMW {rrlim 0} {trlim 0} \
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rcl tcl {func "SRLIM"}]
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set awdth [regget ibd_dz11::RCNTLR(awdth) $dzcntl]
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rlc exec -attn
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rlc wtlam 0.
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rlc log " A2: backend -> cpu -> backend loop ------------------------"
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# load test code
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# rx enable lines 1,3,5
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# store chars in line buffers
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# transmit all received buffers
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$cpu ldasm -lst lst -sym sym {
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.include |lib/defs_cpu.mac|
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.include |lib/defs_dz.mac|
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.include |lib/vec_cpucatch.mac|
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.include |lib/vec_devcatch.mac|
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;
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. = va.dzr ; setup DZ11 receiver interrupt vector
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.word vh.dzr
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.word cp.pr7
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;
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. = va.dzt ; setup DZ11 transmitter interrupt vector
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.word vh.dzt
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.word cp.pr7
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;
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. = 1000 ; code area
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stack:
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;
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start: spl 7
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mov #<dz.tie!dz.rie!dz.mse>,@#dz.csr ; start dz11
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mov #<dz.rxo!dz.f96!dz.cl8!5>,@#dz.lpr ; rxon line 5
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mov #<dz.rxo!dz.f96!dz.cl8!3>,@#dz.lpr ; rxon line 3
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mov #<dz.rxo!dz.f96!dz.cl8!1>,@#dz.lpr ; rxon line 1
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spl 0
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1$: wait
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br 1$
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;
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vh.dzr: mov @#dz.rbu,r0 ; read rbuf
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bmi 1$ ; valid ?
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rti
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1$: inc rxcnt ; count chars
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mov r0,r1
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swab r1
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bic #177770,r1 ; line number
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asl r1 ; word offset
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mov wrptr(r1),r2 ; wr ptr to line buffer
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movb r0,(r2)+ ; store
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mov r2,wrptr(r1)
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asr r1 ; byte offset again
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bisb lpat(r1),@#dz.len ; tx enable line
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br vh.dzr ; go for next
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;
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vh.dzt: movb @#dz.csr+1,r1 ; get tline
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bic #177770,r1
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asl r1 ; word offset
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mov rdptr(r1),r2 ; rd ptr to line buffer
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cmp r2,wrptr(r1) ; chars to go ?
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bne 1$
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asr r1 ; if not back to byte offset
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bicb lpat(r1),@#dz.len ; tx disable line
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rti
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1$: inc txcnt ; count chars
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movb (r2)+,@#dz.tbu ; send char
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mov r2,rdptr(r1)
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cmp txcnt,#18.
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beq 2$
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rti
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2$: halt
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stop:
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;
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rxcnt: .word 0
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txcnt: .word 0
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lpat: .byte ^b00000001,^b00000010,^b00000100,^b00001000
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.byte ^b00010000,^b00100000,^b01000000,^b10000000
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rdptr: .word line0,line1,line2,line3,line4,line5,line6,line7
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wrptr: .word line0,line1,line2,line3,line4,line5,line6,line7
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line0: .blkb 32.
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line1: .blkb 32.
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line2: .blkb 32.
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line3: .blkb 32.
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line4: .blkb 32.
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line5: .blkb 32.
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line6: .blkb 32.
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line7: .blkb 32.
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}
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#puts $lst
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rw11::asmrun $cpu sym
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$cpu cp \
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-wbibr dza.tdr [list \
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[regbld ibd_dz11::RFDAT {line 1} {data 0x11} ] \
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[regbld ibd_dz11::RFDAT {line 3} {data 0x31} ] \
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[regbld ibd_dz11::RFDAT {line 5} {data 0x51} ] \
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[regbld ibd_dz11::RFDAT {line 1} {data 0x12} ] \
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[regbld ibd_dz11::RFDAT {line 3} {data 0x32} ]]
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$cpu cp \
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-wbibr dza.tdr [list \
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[regbld ibd_dz11::RFDAT {line 5} {data 0x52} ] \
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[regbld ibd_dz11::RFDAT {line 1} {data 0x13} ] \
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[regbld ibd_dz11::RFDAT {line 3} {data 0x33} ] \
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[regbld ibd_dz11::RFDAT {line 5} {data 0x53} ] \
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[regbld ibd_dz11::RFDAT {line 1} {data 0x14} ]]
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$cpu cp \
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-wbibr dza.tdr [list \
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[regbld ibd_dz11::RFDAT {line 3} {data 0x34} ] \
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[regbld ibd_dz11::RFDAT {line 5} {data 0x54} ] \
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[regbld ibd_dz11::RFDAT {line 1} {data 0x15} ] \
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[regbld ibd_dz11::RFDAT {line 3} {data 0x35} ] \
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[regbld ibd_dz11::RFDAT {line 5} {data 0x55} ] \
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[regbld ibd_dz11::RFDAT {line 1} {data 0x16} ] \
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[regbld ibd_dz11::RFDAT {line 3} {data 0x36} ] \
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[regbld ibd_dz11::RFDAT {line 5} {data 0x56} ]]
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rw11::asmwait $cpu sym
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#puts [rw11::cml $cpu]
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# expect as data
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# 4 cal message (csr changed, mse set; 3 times rxon update)
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# 18 char message (in random order)
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$cpu cp \
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-ribr dza.tcr -edata [regbldkv ibd_dz11::RFUSE rfuse 0 tfuse 22] \
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-rbibr dza.tdr 4 -edata [list \
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[regbldkv ibd_dz11::RFDAT val 1 last 0 cal 1 \
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line $ibd_dz11::CAL_CSR data [regbld ibd_dz11::CSR mse]] \
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[regbldkv ibd_dz11::RFDAT val 1 last 0 cal 1 \
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line $ibd_dz11::CAL_RXON data 040] \
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[regbldkv ibd_dz11::RFDAT val 1 last 0 cal 1 \
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line $ibd_dz11::CAL_RXON data 050] \
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[regbldkv ibd_dz11::RFDAT val 1 last 0 cal 1 \
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line $ibd_dz11::CAL_RXON data 052] \
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] \
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-rbibr dza.tdr 18 tdata
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# setup line - char list
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set texpect {
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{}
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{0x11 0x12 0x13 0x14 0x15 0x16}
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{}
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{0x31 0x32 0x33 0x34 0x35 0x36}
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{}
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{0x51 0x52 0x53 0x54 0x55 0x56}
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{}
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{}
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}
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set tcount {0 0 0 0 0 0 0 0}
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foreach tword $tdata {
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#puts [regtxt ibd_dz11::RFDAT $tword]
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set line [regget ibd_dz11::RFDAT(line) $tword]
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set data [regget ibd_dz11::RFDAT(data) $tword]
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set cind [lindex $tcount $line]
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set cexp [lindex $texpect $line $cind]
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if {$data != $cexp } {
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rlc log "FAIL: mismatch for line=$line cind=$cind: got $data expect $cexp"
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rlc errcnt -inc
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}
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lset tcount $line [expr {$cind + 1}]
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}
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# -- Section B ---------------------------------------------------------------
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rlc log " B1: cpu -> cpu loop using maintenance mode ----------------"
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# re-init dz11
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$cpu cp \
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-wma dza.csr [regbld ibd_dz11::CSR clr] \
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-wibr dza.csr [regbld ibd_dz11::RCNTLW rcl tcl]
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# harvest any dangling attn
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rlc exec -attn
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rlc wtlam 0.
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# load test code
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# enable maintenance mode
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# rx enable lines 6,5,3,1
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# tx enable lines 6,5,3,1
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# send a,b --> to line 6
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# send A,B,C,D,E,F --> to line 5
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# send 1,2,3 --> to line 3
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# send 7,8 --> to line 1
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# check received agains send chars
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$cpu ldasm -lst lst -sym sym {
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.include |lib/defs_cpu.mac|
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.include |lib/defs_dz.mac|
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.include |lib/vec_cpucatch.mac|
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.include |lib/vec_devcatch.mac|
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;
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. = va.dzr ; setup DZ11 receiver interrupt vector
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.word vh.dzr
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.word cp.pr7
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;
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. = va.dzt ; setup DZ11 transmitter interrupt vector
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.word vh.dzt
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.word cp.pr7
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;
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. = 1000 ; code area
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stack:
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;
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start: spl 7
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mov #<dz.tie!dz.rie!dz.mse!dz.mai>,@#dz.csr ; start dz11
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movb #^b01101010,@#dz.len ; tx ena lines 6,5,3,1
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mov #<dz.rxo!dz.f96!dz.cl8!6>,@#dz.lpr ; rxon line 6
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mov #<dz.rxo!dz.f96!dz.cl8!5>,@#dz.lpr ; rxon line 5
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mov #<dz.rxo!dz.f96!dz.cl8!3>,@#dz.lpr ; rxon line 3
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mov #<dz.rxo!dz.f96!dz.cl8!1>,@#dz.lpr ; rxon line 1
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spl 0
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1$: wait
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br 1$
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;
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vh.dzt: movb @#dz.csr+1,r1 ; get tline
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bic #177770,r1
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asl r1 ; word offset
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mov tlptr(r1),r2 ; tx ptr to char for line
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tstb (r2) ; end of transmission ?
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bne 1$
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asr r1 ; byte offset again
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bicb lpat(r1),@#dz.len ; and disable line
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rti
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1$: movb (r2)+,@#dz.tbu ; send next char
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mov r2,tlptr(r1)
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rti
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vh.dzr: mov @#dz.rbu,r0 ; read rbuf
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bmi 1$ ; valid ?
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cmp #nchar,rcnt ; all received ?
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beq 3$ ; then quit
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rti
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1$: inc rcnt ; count chars
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mov r0,r1
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swab r1
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bic #177770,r1 ; line number
|
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asl r1 ; word offset
|
||||
mov rlptr(r1),r2 ; rx ptr to char for line
|
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cmpb r0,(r2)+ ; match ?
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beq 2$
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||||
halt ; if not error halt
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||||
2$: mov r2,rlptr(r1)
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||||
br vh.dzr ; go for next
|
||||
;
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||||
3$: halt
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stop:
|
||||
;
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||||
lpat: .byte ^b00000001,^b00000010,^b00000100,^b00001000
|
||||
.byte ^b00010000,^b00100000,^b01000000,^b10000000
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||||
tlptr: .word line0,line1,line2,line3,line4,line5,line6,line7
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||||
line0: .asciz //
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||||
line1: .asciz /78/
|
||||
line2: .asciz //
|
||||
line3: .asciz /123/
|
||||
line4: .asciz //
|
||||
line5: .asciz /ABCDEF/
|
||||
line6: .asciz /ab/
|
||||
line7: .asciz //
|
||||
linee:
|
||||
nchar = linee - line0 - 8.
|
||||
;
|
||||
.even
|
||||
rcnt: .word 0
|
||||
rlptr: .word line0,line1,line2,line3,line4,line5,line6,line7
|
||||
|
||||
}
|
||||
#puts $lst
|
||||
|
||||
rw11::asmrun $cpu sym
|
||||
rw11::asmwait $cpu sym
|
||||
#puts [ibd_dz11::rdump]
|
||||
#puts [rw11::cml $cpu]
|
||||
|
||||
# harvest any dangling attn
|
||||
rlc exec -attn
|
||||
rlc wtlam 0.
|
||||
214
tools/tbench/dz11/test_dz11_regs.tcl
Normal file
214
tools/tbench/dz11/test_dz11_regs.tcl
Normal file
@@ -0,0 +1,214 @@
|
||||
# $Id: test_dz11_regs.tcl 1148 2019-05-12 10:10:44Z mueller $
|
||||
#
|
||||
# Copyright 2019- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
|
||||
# License disclaimer see License.txt in $RETROBASE directory
|
||||
#
|
||||
# Revision History:
|
||||
# Date Rev Version Comment
|
||||
# 2019-05-11 1148 1.0 Initial version
|
||||
# 2019-05-04 1146 0.1 First draft
|
||||
#
|
||||
# Test DZ11 register response
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
rlc log "test_dz11_regs: test dz11 register response -------------------------"
|
||||
package require ibd_dz11
|
||||
if {![ibd_dz11::setup]} {
|
||||
rlc log " test_dz11_regs-W: device not found, test aborted"
|
||||
return
|
||||
}
|
||||
|
||||
rlc set statmask $rw11::STAT_DEFMASK
|
||||
rlc set statvalue 0
|
||||
|
||||
set attndl [expr {1<<$ibd_dz11::ANUM}]
|
||||
set attncpu [expr {1<<$rw11::ANUM}]
|
||||
|
||||
# remember 'awdth' retrieved from cntl for later tests
|
||||
$cpu cp -ribr dza.csr dzcntl
|
||||
set awdth [regget ibd_dz11::RCNTLR(awdth) $dzcntl]
|
||||
|
||||
# -- Section A ---------------------------------------------------------------
|
||||
rlc log " A1: test rem cntl,stat response ---------------------------"
|
||||
rlc log " A1.1: rem cntl ssel --------------------------------"
|
||||
|
||||
set cntlmask [regbld ibd_dz11::RCNTLR {ssel -1}]
|
||||
|
||||
# rem write and readback cntl.ssel
|
||||
$cpu cp \
|
||||
-wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel 1}] \
|
||||
-ribr dza.csr -edata [regbld ibd_dz11::RCNTLR {ssel 1}] $cntlmask \
|
||||
-wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel 3}] \
|
||||
-ribr dza.csr -edata [regbld ibd_dz11::RCNTLR {ssel 3}] $cntlmask \
|
||||
-wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel 0}] \
|
||||
-ribr dza.csr -edata [regbld ibd_dz11::RCNTLR {ssel 0}] $cntlmask
|
||||
|
||||
rlc log " A1.2: rem cntl stat --------------------------------"
|
||||
|
||||
# check that stat is rem readable but not writable
|
||||
$cpu cp \
|
||||
-ribr dza.rbuf \
|
||||
-wibr dza.rbuf 0x0 -estaterr
|
||||
|
||||
rlc log " A1.3: rem cntl(func=rlim) -> stat ------------------"
|
||||
|
||||
set rlcnmask [regbld ibd_dz11::RSRLCN {rrlim -1} {trlim -1}]
|
||||
|
||||
$cpu cp \
|
||||
-wibr dza.csr [regbld ibd_dz11::RRLIMW {rrlim 1} {trlim 2} \
|
||||
{ssel "RLCN"} {func "SRLIM"}] \
|
||||
-ribr dza.rbuf -edata [regbld ibd_dz11::RSRLCN {rrlim 1} {trlim 2}] \
|
||||
-wibr dza.csr [regbld ibd_dz11::RRLIMW {rrlim 6} {trlim 5} \
|
||||
{ssel "RLCN"} {func "SRLIM"}] \
|
||||
-ribr dza.rbuf -edata [regbld ibd_dz11::RSRLCN {rrlim 6} {trlim 5}] \
|
||||
-wibr dza.csr [regbld ibd_dz11::RRLIMW {rrlim 0} {trlim 0} \
|
||||
{ssel "RLCN"} {func "SRLIM"}] \
|
||||
-ribr dza.rbuf -edata [regbld ibd_dz11::RSRLCN {rrlim 0} {trlim 0}]
|
||||
|
||||
rlc log " A2: test csr response -------------------------------------"
|
||||
rlc log " A2.1: csr tie,sae,rie,mse,maint --------------------"
|
||||
|
||||
$cpu cp \
|
||||
-breset \
|
||||
-rma dza.csr -edata [regbld ibd_dz11::CSR ] \
|
||||
-wma dza.csr [regbld ibd_dz11::CSR tie] \
|
||||
-rma dza.csr -edata [regbld ibd_dz11::CSR tie] \
|
||||
-wma dza.csr [regbld ibd_dz11::CSR sae] \
|
||||
-rma dza.csr -edata [regbld ibd_dz11::CSR sae] \
|
||||
-wma dza.csr [regbld ibd_dz11::CSR rie] \
|
||||
-rma dza.csr -edata [regbld ibd_dz11::CSR rie] \
|
||||
-wma dza.csr [regbld ibd_dz11::CSR mse] \
|
||||
-rma dza.csr -edata [regbld ibd_dz11::CSR mse] \
|
||||
-wma dza.csr [regbld ibd_dz11::CSR maint] \
|
||||
-rma dza.csr -edata [regbld ibd_dz11::CSR maint]
|
||||
|
||||
rlc log " A2.2: csr mse,maint -> cntl ------------------------"
|
||||
|
||||
set cntlmask [regbld ibd_dz11::RCNTLR mse maint]
|
||||
|
||||
$cpu cp \
|
||||
-wma dza.csr [regbld ibd_dz11::CSR mse] \
|
||||
-ribr dza.csr -edata [regbld ibd_dz11::RCNTLR mse] $cntlmask \
|
||||
-wma dza.csr [regbld ibd_dz11::CSR mse maint] \
|
||||
-ribr dza.csr -edata [regbld ibd_dz11::RCNTLR mse maint] $cntlmask \
|
||||
-wma dza.csr [regbld ibd_dz11::CSR] \
|
||||
-ribr dza.csr -edata [regbld ibd_dz11::RCNTLR] $cntlmask
|
||||
|
||||
rlc log " A3: test tcr -> stat response ------------------------"
|
||||
|
||||
$cpu cp \
|
||||
-wma dza.tcr [regbld ibd_dz11::TCR {dtr 0xaa} {lena 0x55}] \
|
||||
-wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "DTLE"}] \
|
||||
-ribr dza.rbuf -edata [regbld ibd_dz11::RSDTLE {dtr 0xaa} {lena 0x55}] \
|
||||
-wma dza.tcr [regbld ibd_dz11::TCR {dtr 0x12} {lena 0x34}] \
|
||||
-wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "DTLE"}] \
|
||||
-ribr dza.rbuf -edata [regbld ibd_dz11::RSDTLE {dtr 0x12} {lena 0x34}] \
|
||||
-wma dza.tcr [regbld ibd_dz11::TCR {dtr 0x0} {lena 0x0}] \
|
||||
-wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "DTLE"}] \
|
||||
-ribr dza.rbuf -edata [regbld ibd_dz11::RSDTLE {dtr 0x0} {lena 0x0}]
|
||||
|
||||
rlc log " A4: test cntl -> msr and stat response ---------------"
|
||||
|
||||
# rem wr SCO 0x45
|
||||
# rem wr SRING 0x67
|
||||
# rd (0x45 0x67)
|
||||
# rem wr SCO 0xde
|
||||
# rd (0xde 0x67)
|
||||
# rem wr SRING 0xad
|
||||
# rd (0xde 0xad)
|
||||
# rem wr SCO 0x00
|
||||
# rem wr SRING 0x00
|
||||
# rd (0x00 0x00)
|
||||
$cpu cp \
|
||||
-wibr dza.csr [regbld ibd_dz11::RCNTLW {data 0x45} \
|
||||
{ssel "CORI"} {func "SCO"}] \
|
||||
-wibr dza.csr [regbld ibd_dz11::RCNTLW {data 0x67} \
|
||||
{ssel "CORI"} {func "SRING"}] \
|
||||
-ribr dza.rbuf -edata [regbld ibd_dz11::RSCORI {co 0x45} {ring 0x67}] \
|
||||
-rma dza.tdr -edata [regbld ibd_dz11::MSR {co 0x45} {ring 0x67}] \
|
||||
-wibr dza.csr [regbld ibd_dz11::RCNTLW {data 0xde} \
|
||||
{ssel "CORI"} {func "SCO"}] \
|
||||
-ribr dza.rbuf -edata [regbld ibd_dz11::RSCORI {co 0xde} {ring 0x67}] \
|
||||
-rma dza.tdr -edata [regbld ibd_dz11::MSR {co 0xde} {ring 0x67}] \
|
||||
-wibr dza.csr [regbld ibd_dz11::RCNTLW {data 0xad} \
|
||||
{ssel "CORI"} {func "SRING"}] \
|
||||
-ribr dza.rbuf -edata [regbld ibd_dz11::RSCORI {co 0xde} {ring 0xad}] \
|
||||
-rma dza.tdr -edata [regbld ibd_dz11::MSR {co 0xde} {ring 0xad}] \
|
||||
-wibr dza.csr [regbld ibd_dz11::RCNTLW {data 0x00} \
|
||||
{ssel "CORI"} {func "SCO"}] \
|
||||
-wibr dza.csr [regbld ibd_dz11::RCNTLW {data 0x00} \
|
||||
{ssel "CORI"} {func "SRING"}] \
|
||||
-ribr dza.rbuf -edata [regbld ibd_dz11::RSCORI {co 0x00} {ring 0x00}] \
|
||||
-rma dza.tdr -edata [regbld ibd_dz11::MSR {co 0x00} {ring 0x00}]
|
||||
|
||||
rlc log " A5: test lpr(rxon) -> stat response ------------------"
|
||||
|
||||
# loc wr LPR line 1 txon=1
|
||||
# rem rd rxon= 0000 0010 = 0x02
|
||||
# loc wr LPR line 2 txon=1
|
||||
# rem rd rxon= 0000 0110 = 0x06
|
||||
# loc wr LPR line 6 txon=1
|
||||
# rem rd rxon= 0100 0110 = 0x46
|
||||
# loc wr LPR line 1 txon=0
|
||||
# rem rd rxon= 1000 0000 = 0x44
|
||||
# loc wr LPR line 2 txon=0
|
||||
# loc wr LPR line 6 txon=0
|
||||
# rem rd rxon= 0000 0000 = 0x00
|
||||
$cpu cp \
|
||||
-wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "BRRX"}] \
|
||||
-ribr dza.rbuf -edata [regbld ibd_dz11::RSBRRX {brk 0x0} {rxon 0x00}] \
|
||||
-wma dza.rbuf [regbld ibd_dz11::LPR {rxon 1} {line 1}] \
|
||||
-wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "BRRX"}] \
|
||||
-ribr dza.rbuf -edata [regbld ibd_dz11::RSBRRX {brk 0x0} {rxon 0x02}] \
|
||||
-wma dza.rbuf [regbld ibd_dz11::LPR {rxon 1} {line 2}] \
|
||||
-wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "BRRX"}] \
|
||||
-ribr dza.rbuf -edata [regbld ibd_dz11::RSBRRX {brk 0x0} {rxon 0x06}] \
|
||||
-wma dza.rbuf [regbld ibd_dz11::LPR {rxon 1} {line 6}] \
|
||||
-wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "BRRX"}] \
|
||||
-ribr dza.rbuf -edata [regbld ibd_dz11::RSBRRX {brk 0x0} {rxon 0x46}] \
|
||||
-wma dza.rbuf [regbld ibd_dz11::LPR {rxon 0} {line 1}] \
|
||||
-wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "BRRX"}] \
|
||||
-ribr dza.rbuf -edata [regbld ibd_dz11::RSBRRX {brk 0x0} {rxon 0x44}] \
|
||||
-wma dza.rbuf [regbld ibd_dz11::LPR {rxon 0} {line 2}] \
|
||||
-wma dza.rbuf [regbld ibd_dz11::LPR {rxon 0} {line 6}] \
|
||||
-wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "BRRX"}] \
|
||||
-ribr dza.rbuf -edata [regbld ibd_dz11::RSBRRX {brk 0x0} {rxon 0x00}]
|
||||
|
||||
rlc log " A5: test stat auto-inc read --------------------------"
|
||||
|
||||
# loc wr TCR (dtr=0xbe lena=0xaf)
|
||||
# loc wr LPR line 3 txon=1
|
||||
# rem wr SCO 0x18
|
||||
# rem wr SRING 0x26
|
||||
# rem wr SRLIM (rrlim=3 trlim=4) SSEL=DTLE
|
||||
# rem rd STAT DTLE
|
||||
# rem rd STAT BRRX
|
||||
# rem rd STAT CORI
|
||||
# rem rd STAT RLCN
|
||||
$cpu cp \
|
||||
-wma dza.tcr [regbld ibd_dz11::TCR {dtr 0xbe} {lena 0xaf}] \
|
||||
-wma dza.rbuf [regbld ibd_dz11::LPR {rxon 1} {line 3}] \
|
||||
-wibr dza.csr [regbld ibd_dz11::RCNTLW {data 0x18} {func "SCO"}] \
|
||||
-wibr dza.csr [regbld ibd_dz11::RCNTLW {data 0x26} {func "SRING"}] \
|
||||
-wibr dza.csr [regbld ibd_dz11::RRLIMW {rrlim 1} {trlim 2} \
|
||||
{ssel "DTLE"} {func "SRLIM"}] \
|
||||
-ribr dza.rbuf -edata [regbld ibd_dz11::RSDTLE {dtr 0xbe} {lena 0xaf}] \
|
||||
-ribr dza.rbuf -edata [regbld ibd_dz11::RSBRRX {brk 0x00} {rxon 0x08}] \
|
||||
-ribr dza.rbuf -edata [regbld ibd_dz11::RSCORI {co 0x18} {ring 0x26}] \
|
||||
-ribr dza.rbuf -edata [regbld ibd_dz11::RSRLCN {rrlim 1} {trlim 2}]
|
||||
# and clear everything
|
||||
$cpu cp \
|
||||
-wma dza.tcr [regbld ibd_dz11::TCR {dtr 0x00} {lena 0x00}] \
|
||||
-wma dza.rbuf [regbld ibd_dz11::LPR {rxon 0} {line 3}] \
|
||||
-wibr dza.csr [regbld ibd_dz11::RCNTLW {data 0x00} {func "SCO"}] \
|
||||
-wibr dza.csr [regbld ibd_dz11::RCNTLW {data 0x00} {func "SRING"}] \
|
||||
-wibr dza.csr [regbld ibd_dz11::RRLIMW {rrlim 0} {trlim 0} \
|
||||
{ssel "DTLE"} {func "SRLIM"}] \
|
||||
-ribr dza.rbuf -edata [regbld ibd_dz11::RSDTLE {dtr 0x00} {lena 0x00}] \
|
||||
-ribr dza.rbuf -edata [regbld ibd_dz11::RSBRRX {brk 0x00} {rxon 0x00}] \
|
||||
-ribr dza.rbuf -edata [regbld ibd_dz11::RSCORI {co 0x00} {ring 0x00}] \
|
||||
-ribr dza.rbuf -edata [regbld ibd_dz11::RSRLCN {rrlim 0} {trlim 0}]
|
||||
|
||||
# harvest any dangling attn
|
||||
rlc exec -attn
|
||||
rlc wtlam 0.
|
||||
126
tools/tbench/dz11/test_dz11_rx.tcl
Normal file
126
tools/tbench/dz11/test_dz11_rx.tcl
Normal file
@@ -0,0 +1,126 @@
|
||||
# $Id: test_dz11_rx.tcl 1150 2019-05-19 17:52:54Z mueller $
|
||||
#
|
||||
# Copyright 2019- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
|
||||
# License disclaimer see License.txt in $RETROBASE directory
|
||||
#
|
||||
# Revision History:
|
||||
# Date Rev Version Comment
|
||||
# 2019-05-18 1150 1.0 Initial version
|
||||
# 2019-05-04 1146 0.1 First draft
|
||||
#
|
||||
# Test DZ11 receiver response
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
rlc log "test_dz11_rx: test dz11 receiver data path --------------------------"
|
||||
package require ibd_dz11
|
||||
if {![ibd_dz11::setup]} {
|
||||
rlc log " test_dz11_rx-W: device not found, test aborted"
|
||||
return
|
||||
}
|
||||
|
||||
rlc set statmask $rw11::STAT_DEFMASK
|
||||
rlc set statvalue 0
|
||||
|
||||
set attndl [expr {1<<$ibd_dz11::ANUM}]
|
||||
set attncpu [expr {1<<$rw11::ANUM}]
|
||||
|
||||
# -- Section A ---------------------------------------------------------------
|
||||
rlc log " A1: init dz11 ---------------------------------------------"
|
||||
# - issue csr.clr
|
||||
# - remember 'awdth' retrieved from rcsr for later tests
|
||||
# - set rlim's to 0, clear fifos
|
||||
# - harvest any dangling attn
|
||||
$cpu cp \
|
||||
-wma dza.csr [regbld ibd_dz11::CSR clr] \
|
||||
-ribr dza.csr dzcntl \
|
||||
-wibr dza.csr [regbld ibd_dz11::RRLIMW {rrlim 0} {trlim 0} \
|
||||
rcl tcl {func "SRLIM"}]
|
||||
set awdth [regget ibd_dz11::RCNTLR(awdth) $dzcntl]
|
||||
rlc exec -attn
|
||||
rlc wtlam 0.
|
||||
|
||||
rlc log " A2: basic data path ---------------------------------------"
|
||||
rlc log " A2.1: reset and setup with line 4 ------------------"
|
||||
|
||||
set csrmask [regbld ibd_dz11::CSR trdy tie sa sae rdone rie mse maint]
|
||||
|
||||
# - loc csr.mse=1
|
||||
# - loc rx enable line 4
|
||||
# - rem check rxon value
|
||||
# - rem check csr cal message
|
||||
# - rem check rxon cal message
|
||||
$cpu cp \
|
||||
-breset \
|
||||
-wma dza.csr [regbld ibd_dz11::CSR mse] \
|
||||
-wma dza.rbuf [regbld ibd_dz11::LPR {rxon 1} {line 4}] \
|
||||
-wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "BRRX"}] \
|
||||
-ribr dza.rbuf -edata [regbld ibd_dz11::RSBRRX {brk 0x0} {rxon 0x10}] \
|
||||
-ribr dza.tcr -edata [regbld ibd_dz11::RFUSE {rfuse 0} {tfuse 2}] \
|
||||
-ribr dza.tdr -edata [regbldkv ibd_dz11::RFDAT val 1 last 0 cal 1 \
|
||||
line $ibd_dz11::CAL_CSR \
|
||||
data [regbld ibd_dz11::CSR mse]] \
|
||||
-ribr dza.tdr -edata [regbldkv ibd_dz11::RFDAT val 1 last 1 cal 1 \
|
||||
line $ibd_dz11::CAL_RXON data 0x10] \
|
||||
-rma dza.csr -edata [regbld ibd_dz11::CSR mse] $csrmask
|
||||
|
||||
# - rem wr fifo
|
||||
# - loc rd rbuf
|
||||
rlc log " A2.2: rem fifo -> loc rbuf - 1 char ----------------"
|
||||
$cpu cp \
|
||||
-wibr dza.tdr [regbld ibd_dz11::RFDAT {line 4} {data 0x41} ] \
|
||||
-ribr dza.tcr -edata [regbld ibd_dz11::RFUSE {rfuse 1} {tfuse 0}] \
|
||||
-rma dza.csr -edata [regbld ibd_dz11::CSR mse rdone] $csrmask \
|
||||
-rma dza.rbuf -edata [regbld ibd_dz11::RBUF val {line 4} {data 0x41}] \
|
||||
-ribr dza.tcr -edata [regbld ibd_dz11::RFUSE {rfuse 0} {tfuse 0}] \
|
||||
-rma dza.csr -edata [regbld ibd_dz11::CSR mse ] $csrmask \
|
||||
-rma dza.rbuf -edata 0x0 [regbld ibd_dz11::RBUF val]
|
||||
|
||||
# - loc rx enable line 5,6
|
||||
# - rem check rxon value
|
||||
# - rem check rxon cal messages (one per update)
|
||||
# - rem wr fifo with data for line 4,5,6 but also 1,2,3
|
||||
# - loc rd rbuf (only line 4,5,6 line data appears)
|
||||
rlc log " A3.3: rem fifo -> loc rbuf - 5 char for line 4,5,6 -"
|
||||
$cpu cp \
|
||||
-wma dza.rbuf [regbld ibd_dz11::LPR {rxon 1} {line 5}] \
|
||||
-wibr dza.csr [regbld ibd_dz11::RCNTLW {ssel "BRRX"}] \
|
||||
-wma dza.rbuf [regbld ibd_dz11::LPR {rxon 1} {line 6}] \
|
||||
-ribr dza.rbuf -edata [regbld ibd_dz11::RSBRRX {brk 0x0} {rxon 0x70}] \
|
||||
-ribr dza.tcr -edata [regbld ibd_dz11::RFUSE {rfuse 0} {tfuse 2}] \
|
||||
-ribr dza.tdr -edata [regbldkv ibd_dz11::RFDAT \
|
||||
val 1 last 0 cal 1 \
|
||||
line $ibd_dz11::CAL_RXON data 0x30] \
|
||||
-ribr dza.tdr -edata [regbldkv ibd_dz11::RFDAT \
|
||||
val 1 last 1 cal 1 \
|
||||
line $ibd_dz11::CAL_RXON data 0x70] \
|
||||
-wbibr dza.tdr [list \
|
||||
[regbld ibd_dz11::RFDAT {line 1} {data 0x11} ] \
|
||||
[regbld ibd_dz11::RFDAT {line 4} {data 0x42} ] \
|
||||
[regbld ibd_dz11::RFDAT {line 2} {data 0x21} ] \
|
||||
[regbld ibd_dz11::RFDAT {line 5} {data 0x51} ] \
|
||||
[regbld ibd_dz11::RFDAT {line 6} {data 0x61} ] \
|
||||
[regbld ibd_dz11::RFDAT {line 3} {data 0x31} ] \
|
||||
[regbld ibd_dz11::RFDAT {line 5} {data 0x52} ] \
|
||||
[regbld ibd_dz11::RFDAT {line 4} {data 0x43} ]] \
|
||||
-ribr dza.tcr -edata [regbld ibd_dz11::RFUSE {rfuse 5} {tfuse 0}] \
|
||||
-rma dza.csr -edata [regbld ibd_dz11::CSR mse rdone] $csrmask \
|
||||
-rma dza.rbuf -edata [regbld ibd_dz11::RBUF val {line 4} {data 0x42}] \
|
||||
-ribr dza.tcr -edata [regbld ibd_dz11::RFUSE {rfuse 4} {tfuse 0}] \
|
||||
-rma dza.csr -edata [regbld ibd_dz11::CSR mse rdone] $csrmask \
|
||||
-rma dza.rbuf -edata [regbld ibd_dz11::RBUF val {line 5} {data 0x51}] \
|
||||
-ribr dza.tcr -edata [regbld ibd_dz11::RFUSE {rfuse 3} {tfuse 0}] \
|
||||
-rma dza.csr -edata [regbld ibd_dz11::CSR mse rdone] $csrmask \
|
||||
-rma dza.rbuf -edata [regbld ibd_dz11::RBUF val {line 6} {data 0x61}] \
|
||||
-ribr dza.tcr -edata [regbld ibd_dz11::RFUSE {rfuse 2} {tfuse 0}] \
|
||||
-rma dza.csr -edata [regbld ibd_dz11::CSR mse rdone] $csrmask \
|
||||
-rma dza.rbuf -edata [regbld ibd_dz11::RBUF val {line 5} {data 0x52}] \
|
||||
-ribr dza.tcr -edata [regbld ibd_dz11::RFUSE {rfuse 1} {tfuse 0}] \
|
||||
-rma dza.csr -edata [regbld ibd_dz11::CSR mse rdone] $csrmask \
|
||||
-rma dza.rbuf -edata [regbld ibd_dz11::RBUF val {line 4} {data 0x43}] \
|
||||
-ribr dza.tcr -edata [regbld ibd_dz11::RFUSE {rfuse 0} {tfuse 0}] \
|
||||
-rma dza.csr -edata [regbld ibd_dz11::CSR mse] $csrmask \
|
||||
-rma dza.rbuf -edata 0x0 [regbld ibd_dz11::RBUF val]
|
||||
|
||||
# harvest any dangling attn
|
||||
rlc exec -attn
|
||||
rlc wtlam 0.
|
||||
283
tools/tbench/dz11/test_dz11_tx.tcl
Normal file
283
tools/tbench/dz11/test_dz11_tx.tcl
Normal file
@@ -0,0 +1,283 @@
|
||||
# $Id: test_dz11_tx.tcl 1150 2019-05-19 17:52:54Z mueller $
|
||||
#
|
||||
# Copyright 2019- by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
|
||||
# License disclaimer see License.txt in $RETROBASE directory
|
||||
#
|
||||
# Revision History:
|
||||
# Date Rev Version Comment
|
||||
# 2019-05-18 1150 1.0 Initial version
|
||||
# 2019-05-04 1146 0.1 First draft
|
||||
#
|
||||
# Test DZ11 transmitter response
|
||||
|
||||
# ----------------------------------------------------------------------------
|
||||
rlc log "test_dz11_tx: test dz11 transmitter data path -----------------------"
|
||||
package require ibd_dz11
|
||||
if {![ibd_dz11::setup]} {
|
||||
rlc log " test_dz11_tx-W: device not found, test aborted"
|
||||
return
|
||||
}
|
||||
|
||||
rlc set statmask $rw11::STAT_DEFMASK
|
||||
rlc set statvalue 0
|
||||
|
||||
set attndl [expr {1<<$ibd_dz11::ANUM}]
|
||||
set attncpu [expr {1<<$rw11::ANUM}]
|
||||
|
||||
# -- Section A ---------------------------------------------------------------
|
||||
rlc log " A1: init dz11 ---------------------------------------------"
|
||||
# - issue csr.clr
|
||||
# - remember 'awdth' retrieved from rcsr for later tests
|
||||
# - set rlim's to 0, clear fifos
|
||||
# - harvest any dangling attn
|
||||
$cpu cp \
|
||||
-wma dza.csr [regbld ibd_dz11::CSR clr] \
|
||||
-ribr dza.csr dzcntl \
|
||||
-wibr dza.csr [regbld ibd_dz11::RRLIMW {rrlim 0} {trlim 0} \
|
||||
rcl tcl {func "SRLIM"}]
|
||||
set awdth [regget ibd_dz11::RCNTLR(awdth) $dzcntl]
|
||||
rlc exec -attn
|
||||
rlc wtlam 0.
|
||||
|
||||
# -- Section B ---------------------------------------------------------------
|
||||
rlc log " B1: test csr.tie and basic interrupt response -------------"
|
||||
# load test code
|
||||
$cpu ldasm -lst lst -sym sym {
|
||||
.include |lib/defs_cpu.mac|
|
||||
.include |lib/defs_dz.mac|
|
||||
. = va.dzt ; setup DZ11 transmitter interrupt vector
|
||||
.word vh.dzt
|
||||
.word cp.pr7
|
||||
;
|
||||
. = 1000 ; code area
|
||||
stack:
|
||||
;
|
||||
; use in following mov to psw instead of spl to allow immediate interrupt
|
||||
;
|
||||
start: spl 7 ;;; lock-out interrupts
|
||||
movb #^b00000001,@#dz.len ;;; enable line 0
|
||||
mov #<dz.tie!dz.mse>,@#dz.csr ;;; start dz11
|
||||
mov #cp.pr6,@#cp.psw ;;; allow pri=7
|
||||
mov #cp.pr5,@#cp.psw ;;; allow pri=6
|
||||
mov #cp.pr4,@#cp.psw ;;; allow pri=5
|
||||
mov #cp.pr3,@#cp.psw ;;; allow pri=4
|
||||
mov #cp.pr2,@#cp.psw ;;; allow pri=3
|
||||
mov #cp.pr1,@#cp.psw ;;; allow pri=2
|
||||
mov #cp.pr0,@#cp.psw ;;; allow pri=1
|
||||
halt ;;;
|
||||
;
|
||||
vh.dzt: halt ;;; dzt handler
|
||||
stop:
|
||||
}
|
||||
|
||||
# check that interrupt done, and pushed psw has pri=4 (device is pri=5)
|
||||
rw11::asmrun $cpu sym
|
||||
rw11::asmwait $cpu sym
|
||||
rw11::asmtreg $cpu sp [expr {$sym(stack)-4}]
|
||||
rw11::asmtmem $cpu [expr {$sym(stack)-2}] [list [regbld rw11::PSW {pri 4}]]
|
||||
|
||||
# check that cal message for csr.mse 0->1 change seen
|
||||
$cpu cp \
|
||||
-ribr dza.tcr -edata [regbldkv ibd_dz11::RFUSE rfuse 0 tfuse 1] \
|
||||
-ribr dza.tdr -edata [regbldkv ibd_dz11::RFDAT val 1 last 1 cal 1 \
|
||||
line $ibd_dz11::CAL_CSR data [regbld ibd_dz11::CSR mse]]
|
||||
|
||||
rlc log " B2: one line at a time ------------------------------------"
|
||||
|
||||
# re-init dz11
|
||||
$cpu cp \
|
||||
-wma dza.csr [regbld ibd_dz11::CSR clr] \
|
||||
-wibr dza.csr [regbld ibd_dz11::RCNTLW rcl tcl]
|
||||
# harvest any dangling attn
|
||||
rlc exec -attn
|
||||
rlc wtlam 0.
|
||||
|
||||
# load test code
|
||||
# send a,b,c --> to line 0
|
||||
# send A,B,C --> to line 1
|
||||
# send 0,1,2 --> to line 2
|
||||
$cpu ldasm -lst lst -sym sym {
|
||||
.include |lib/defs_cpu.mac|
|
||||
.include |lib/defs_dz.mac|
|
||||
.include |lib/vec_cpucatch.mac|
|
||||
.include |lib/vec_devcatch.mac|
|
||||
;
|
||||
. = va.dzt ; setup DZ11 transmitter interrupt vector
|
||||
.word vh.dzt
|
||||
.word cp.pr7
|
||||
;
|
||||
. = 1000 ; code area
|
||||
stack:
|
||||
;
|
||||
start: spl 7
|
||||
movb #^b00000001,@#dz.len ; enable line 0
|
||||
mov #tbl,r5 ; setup table pointer
|
||||
mov #<dz.tie!dz.mse>,@#dz.csr ; start dz11
|
||||
spl 0
|
||||
1$: wait
|
||||
br 1$
|
||||
;
|
||||
vh.dzt: tstb (r5)+ ;;; action type ?
|
||||
bne 1$
|
||||
movb (r5)+,@#dz.tbu ;;; write char
|
||||
rti
|
||||
1$: movb (r5)+,@#dz.len ;;; select new line
|
||||
beq 2$ ;;; end token ?
|
||||
rti
|
||||
2$: halt
|
||||
stop:
|
||||
;
|
||||
tbl: .byte 0,'a ; send a -> line 0
|
||||
.byte 0,'b ; send b -> line 0
|
||||
.byte 1,^b00000010 ; switch to line 1
|
||||
.byte 0,'A ; send A -> line 1
|
||||
.byte 0,'B ; send B -> line 1
|
||||
.byte 1,^b00000100 ; switch to line 2
|
||||
.byte 0,'0 ; send 0 -> line 2
|
||||
.byte 0,'1 ; send 1 -> line 2
|
||||
.byte 0,'2 ; send 2 -> line 2
|
||||
.byte 1,^b00000001 ; switch to line 0
|
||||
.byte 0,'c ; send c -> line 0
|
||||
.byte 1,^b00000010 ; switch to line 1
|
||||
.byte 0,'C ; send C -> line 1
|
||||
.byte 1,0 ; end
|
||||
}
|
||||
#puts $lst
|
||||
|
||||
rw11::asmrun $cpu sym
|
||||
rw11::asmwait $cpu sym
|
||||
#puts [rw11::cml $cpu]
|
||||
|
||||
# expect as data
|
||||
# 1 cal message (csr changed, mse set)
|
||||
# 9 char message (in order, since one line at a time)
|
||||
set tdata [list \
|
||||
[regbldkv ibd_dz11::RFDAT val 1 last 0 cal 1 \
|
||||
line $ibd_dz11::CAL_CSR data [regbld ibd_dz11::CSR mse]] \
|
||||
[regbldkv ibd_dz11::RFDAT val 1 last 0 cal 0 line 0 data 0x61] \
|
||||
[regbldkv ibd_dz11::RFDAT val 1 last 0 cal 0 line 0 data 0x62] \
|
||||
[regbldkv ibd_dz11::RFDAT val 1 last 0 cal 0 line 1 data 0x41] \
|
||||
[regbldkv ibd_dz11::RFDAT val 1 last 0 cal 0 line 1 data 0x42] \
|
||||
[regbldkv ibd_dz11::RFDAT val 1 last 0 cal 0 line 2 data 0x30] \
|
||||
[regbldkv ibd_dz11::RFDAT val 1 last 0 cal 0 line 2 data 0x31] \
|
||||
[regbldkv ibd_dz11::RFDAT val 1 last 0 cal 0 line 2 data 0x32] \
|
||||
[regbldkv ibd_dz11::RFDAT val 1 last 0 cal 0 line 0 data 0x63] \
|
||||
[regbldkv ibd_dz11::RFDAT val 1 last 1 cal 0 line 1 data 0x43] \
|
||||
]
|
||||
|
||||
$cpu cp \
|
||||
-ribr dza.tcr -edata [regbldkv ibd_dz11::RFUSE rfuse 0 \
|
||||
tfuse [llength $tdata]] \
|
||||
-rbibr dza.tdr [llength $tdata] -edata $tdata
|
||||
|
||||
rlc log " B3: up to 4 lines enabled ---------------------------------"
|
||||
# re-init dz11
|
||||
$cpu cp \
|
||||
-wma dza.csr [regbld ibd_dz11::CSR clr] \
|
||||
-wibr dza.csr [regbld ibd_dz11::RCNTLW rcl tcl]
|
||||
# harvest any dangling attn
|
||||
rlc exec -attn
|
||||
rlc wtlam 0.
|
||||
|
||||
# load test code
|
||||
# tx enable lines 6,5,3,1
|
||||
# send a,b --> to line 6
|
||||
# send A,B,C,D,E,F --> to line 5
|
||||
# send 1,2,3 --> to line 3
|
||||
# send 7,8 --> to line 1
|
||||
|
||||
$cpu ldasm -lst lst -sym sym {
|
||||
.include |lib/defs_cpu.mac|
|
||||
.include |lib/defs_dz.mac|
|
||||
.include |lib/vec_cpucatch.mac|
|
||||
.include |lib/vec_devcatch.mac|
|
||||
;
|
||||
. = va.dzt ; setup DZ11 transmitter interrupt vector
|
||||
.word vh.dzt
|
||||
.word cp.pr7
|
||||
;
|
||||
. = 1000 ; code area
|
||||
stack:
|
||||
;
|
||||
start: spl 7
|
||||
movb #^b01101010,@#dz.len ; enable lines 6,5,3,1
|
||||
mov #<dz.tie!dz.mse>,@#dz.csr ; start dz11
|
||||
spl 0
|
||||
1$: wait
|
||||
br 1$
|
||||
;
|
||||
vh.dzt: movb @#dz.csr+1,r0 ; get tline
|
||||
bic #177770,r0
|
||||
asl r0 ; word offset
|
||||
mov lptr(r0),r1 ; ptr to char for line
|
||||
tstb (r1) ; end of transmission ?
|
||||
bne 1$
|
||||
asr r0 ; byte offset again
|
||||
bicb lpat(r0),@#dz.len ; and tx disable line
|
||||
tstb @#dz.len ; all disabled ?
|
||||
beq 2$
|
||||
rti
|
||||
|
||||
1$: movb (r1)+,@#dz.tbu ; send next char
|
||||
mov r1,lptr(r0)
|
||||
rti
|
||||
|
||||
2$: halt
|
||||
stop:
|
||||
;
|
||||
lptr: .word line0,line1,line2,line3,line4,line5,line6,line7
|
||||
lpat: .byte ^b00000001,^b00000010,^b00000100,^b00001000
|
||||
.byte ^b00010000,^b00100000,^b01000000,^b10000000
|
||||
line0: .asciz //
|
||||
line1: .asciz /78/
|
||||
line2: .asciz //
|
||||
line3: .asciz /123/
|
||||
line4: .asciz //
|
||||
line5: .asciz /ABCDEF/
|
||||
line6: .asciz /ab/
|
||||
line7: .asciz //
|
||||
}
|
||||
#puts $lst
|
||||
|
||||
rw11::asmrun $cpu sym
|
||||
rw11::asmwait $cpu sym
|
||||
#puts [rw11::cml $cpu]
|
||||
|
||||
# expect as data
|
||||
# 1 cal message (csr changed, mse set)
|
||||
# 13 char message (in random order)
|
||||
$cpu cp \
|
||||
-ribr dza.tcr -edata [regbldkv ibd_dz11::RFUSE rfuse 0 tfuse 14] \
|
||||
-ribr dza.tdr -edata [regbldkv ibd_dz11::RFDAT val 1 last 0 cal 1 \
|
||||
line $ibd_dz11::CAL_CSR data [regbld ibd_dz11::CSR mse]] \
|
||||
-rbibr dza.tdr 13 tdata
|
||||
|
||||
# check char message, look only at line and data
|
||||
set texpect {
|
||||
{}
|
||||
{0x37 0x38}
|
||||
{}
|
||||
{0x31 0x32 0x33}
|
||||
{}
|
||||
{0x41 0x42 0x43 0x44 0x45 0x46}
|
||||
{0x61 0x62}
|
||||
{}
|
||||
}
|
||||
set tcount {0 0 0 0 0 0 0 0}
|
||||
|
||||
foreach tword $tdata {
|
||||
#puts [regtxt ibd_dz11::RFDAT $tword]
|
||||
set line [regget ibd_dz11::RFDAT(line) $tword]
|
||||
set data [regget ibd_dz11::RFDAT(data) $tword]
|
||||
set cind [lindex $tcount $line]
|
||||
set cexp [lindex $texpect $line $cind]
|
||||
if {$data != $cexp } {
|
||||
rlc log "FAIL: mismatch for line=$line cind=$cind: got $data expect $cexp"
|
||||
rlc errcnt -inc
|
||||
}
|
||||
lset tcount $line [expr {$cind + 1}]
|
||||
}
|
||||
|
||||
# harvest any dangling attn
|
||||
rlc exec -attn
|
||||
rlc wtlam 0.
|
||||
Reference in New Issue
Block a user