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8d323848b3
- top-level Makefile: drop w11a/arty_bram - sys_w11a_s3: set BTOWIDTH 7 (was 6, must be > vmbox atowidth (6)) - RtclGet.ipp: use const& for oper() of string& and Rtime& - *.Doxyfile: bump version to 0.77 - comment and docu updates
This directory sub-tree contains HDL sources for top level designs and is organized in
| Directory | Content |
|---|---|
| tst_mig | MIG core tester |
| tst_rlink | rlink tester (over serial links) |
| tst_rlink_cuff | rlink tester (over Cypress FX2 USB) |
| tst_serloop | serial port loop back tester |
| tst_snhumanio | Digilent board human IO tester |
| tst_sram | memory tester (SRAM or CRAM) |
| w11a | w11a systems |