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Walter F.J. Mueller 16ce5b2091 - interim release w11a_V0.51 (untagged) 
- migrate to ibus protocol verion 2
  - nexys2 systems now with DCM derived system clock supported
  - sys_w11a_n2 now runs with 58 MHz clksys
2010-11-27 23:17:50 +00:00
doc
- interim release w11a_V0.51 (untagged)
2010-11-27 23:17:50 +00:00
rtl
- interim release w11a_V0.51 (untagged)
2010-11-27 23:17:50 +00:00
tools/bin
- interim release w11a_V0.51 (untagged)
2010-11-27 23:17:50 +00:00
.cvsignore
initial source upload (no docs yet)
2010-07-09 18:14:38 +00:00
COPYING.txt
initial source upload (no docs yet)
2010-07-09 18:14:38 +00:00
INSTALL.txt
additional documentation
2010-07-22 19:46:37 +00:00
LICENSE_gpl_v2.txt
initial source upload (no docs yet)
2010-07-09 18:14:38 +00:00
LICENSE_gpl_v3.txt
initial source upload (no docs yet)
2010-07-09 18:14:38 +00:00
Description
PDP-11/70 CPU core and SoC
https://wfjm.github.io/home/w11/
18 MiB
Languages
VHDL 48.7%
C++ 22.1%
Tcl 13.9%
Perl 7.2%
Roff 3%
Other 5.1%