github.com/wfjm.w11
1
0
Fork 0
mirror of https://github.com/wfjm/w11.git synced 2026-01-12 00:43:01 +00:00
Code Issues Releases Wiki Activity
wfjm.w11/rtl
History
wfjm 40608e35fe pdp11_sequencer: BUGFIX: correct ysv flow implementation 
- rtl/w11a
  - pdp11.vhd: rename, eg srv->ser; drop trap_done; add in_vecysv
  - pdp11_sequencer: renames; BUGFIX: correct ysv flow implementation
  - pdp11_vmbox.vhd: rename some rsv->ser; remove obsolete trap_done
- tools/tbench/w11a/test_w11a_cpuerr.tcl: removed, all in cpu_details.mac
- tools/tcl/rw11/defs.tcl: renames
- tools/tcode/cpu_details.mac: expand A3.3, add A3.4
2022-11-23 08:46:12 +01:00
..
bplib
remove Atlys support (only test designs, w11 design never done)
2022-07-14 08:01:05 +02:00
ibus
SPDX: rtl/*/*.vhd
2019-07-12 19:01:49 +02:00
make_ise
remove Atlys support (only test designs, w11 design never done)
2022-07-14 08:01:05 +02:00
make_viv
SPDX: *.mk
2019-07-05 17:20:44 +02:00
sys_gen
retire tb_pdp11core_stim.dat based tbrun tests
2022-10-24 10:53:25 +02:00
vlib
Some minor updates
2022-07-07 09:30:31 +02:00
w11a
pdp11_sequencer: BUGFIX: correct ysv flow implementation
2022-11-23 08:46:12 +01:00
.gitignore
catch-up after a two years hiatus
2021-08-22 16:59:38 +02:00
README.md
…

README.md

This directory tree contains all HDL sources and is organized in

Directory Content
bplib support modules for boards or parts
ibus w11 ibus devices
make_ise make includes for ISE build flows
make_viv make includes for Vivado build flows
sys_gen HDL sources for top level designs
vlib wide range of support modules
w11a HDL sources for w11a core