9b7b3bd5c8
- ibus/ib_rlim_gen: add CPUSUSP port; RLIM_CEV now slv8
- ibus/ib_rlim_slv: RLIM_CEV now slv8
- ibus/ibdr_{dl11,lp11_buf}: RLIM_CEV now slv8
- bin/asm-11: fix -help text
- bin/ldadump: added, lda file dumper
- src
- Rw11Cntl: add UnitSetup(), UnitSetupAll()
- Rw11Cntl{DEUNA,DL11,RHRP,RK11,RL11,TM11}: call UnitSetupAll() in Start()
- Rw11CntlLP11: remove SetOnline(), use UnitSetup()
- Rw11CntlPC11:
- BootCode(): boot loader rewritten
- remove SetOnline(), use UnitSetup()
- Rw11Cpu
- add defs for w11 cpu component addresses;
- add MemSize(),MemWriteByte()
- LoadAbs(): return start, better odd byte handling;
- Rw11VirtStream: add Error(),Eof()
- RtclRw11Cpu:
- BUGFIX: M_wtcpu(): check cpu attn in no-server case
- add MemSize() getter
- M_loadabs(): add -trace and start
- ibd_pc11/util.tcl: use rdy instead of done in PCSR
- rw11/util.tcl: setup_lp: add rlim option
w11: PDP 11/70 CPU and SoC
Overview
The project contains the VHDL code for a complete DEC PDP-11 system: a PDP-11/70 CPU with memory management unit, but without floating point unit, a complete set of mass storage peripherals (RK11/RK05, RL11/RL02, RK70/RP06, TM11/TU10) and a rather complete set of UNIBUS peripherals (DL11, LP11, PC11, and DEUNA), and last but not least a cache and memory controllers for SRAM, PSRAM and SDRAM (via Xilinx MIG core). The design is FPGA proven, runs currently on Digilent Arty, Basys3, CmodA7, Nexys4, Nexys3, Nexys2 and S3board boards and boots 5th Edition UNIX and 2.11BSD UNIX.
For more information look into:
- w11 project home page and blog
- change log and installation notes
- guides to build bit files and test benches with Xilinx Vivado and Xilinx ISE
- guides to run test benches and to boot operating systems
- known issues general and w11a CPU
- the impatient readers can try their luck with the quick start guide
A short description of the directory layout is provided separately, the top level directories are
| Directory | Content |
|---|---|
| doc | documentation |
| rtl | HDL sources (mostly vhdl) |
| tools | many tools |
Note on freecores/w11
The freecores team created in 2014 a copy of almost all OpenCores cores in Github under freecores. This created freecores/w11 which is outdated and not maintained. Only wfjm/w11 is maintained.
License
This project is released under the GPL V3 license, all files contain the disclaimer:
This program is free software; you may redistribute and/or modify
it under the terms of the GNU General Public License version 3.
See License.txt in distribition directory for further details.
The full text of the GPL license is in this directory as License.txt.