ef5c6b1ee3
- rtl/w11a
- pdp11.vhd: dm_stat_se_type: rename vfetch -> vstart;
mmu_moni_type: drop pc,idone, add vstart,vflow
pdp11_mmu_mmr12: add VADDR port
- pdp11_dmcmon.vhd: dm_stat_se_type: rename vfetch -> vstart
- pdp11_mmu.vhd: implement MMR0 instruction complete
- pdp11_mmu_mmr12.vhd: implement MMR2 instruction complete
- pdp11_sequencer.vhd: implement MMR0,MMR2 instruction complete
- pdp11_sys70.vhd: dm_stat_se_type: rename vfetch -> vstart
- tools
- tbench/w11a_pcnt/test_pcnt_basics.tcl: rename vfetch -> vstart
- tbench/w11a_pcnt/test_pcnt_codes.tcl: rename vfetch -> vstart
- tcl/rw11/dmcmon.tcl: rename vfetch -> vstart
- tcl/rw11/dmpcnt.tcl: rename vfetch -> vstart
- tcode/cpu_mmu.mac: rename C2.7 -> C2.10, add C2.7-9
- xxdp/ekbee1_patch_w11a.tcl: now patch for MMR1, not longer skip
3.7 KiB
Summary of known differences and limitations for w11a CPU and systems
This file lists the differences and limitations of the w11 CPU and systems. The issues of the w11 CPU and systems are listed in a separate document README_known_issues.md.
Known differences between w11a and KB11-C (11/70)
- Instruction fetch after
SPL CLRandSXTdo a writejsr sppushes originalspvalue- Stack limit checks done independent of register set
- 18-bit UNIBUS address space not mapped
MMR0instruction complete implementation differences- MMU traps not suppressed when MMU register accessed
- MMU aborts have priority over NXM aborts
MMR0abort flags are set when stack limit abort done
All points relate to very 11/70 specific behavior, no operating system depends on them, therefore they are considered acceptable implementation differences.
For a comprehensive list of differences between all PDP-11 models consult the PDP-11 Family Differences Table in
- PDP-11 Architecture Handbook (1983) Appendix B p303
- PDP-11 MICRO/PDP-11 Handbook 1983-84 Appendix G p387
- and also PDP-11 family differences appendix
Also helpful are the differences sections in the manuals of for processors
- T-11 User's Guide 1982 Appendix B p221
- J-11 Programmer's Reference Rev 2.04 1982 Section 11.0 p37 (focus on registers and instructions)
- KD11-E (11/34) Central Processor Manual Table 2-8 p41
Differences in unspecified behavior between w11a and KB11-C (11/70)
No software should depend on the unspecified behavior of the CPU, therefore this is considered as an acceptable implementation difference.
Other differences between w11a and KB11-C (11/70)
Known limitations
- some programs use timing loops based on the execution speed of the
original processors. This can lead to spurious timeouts, especially
in old test programs.
--> a 'CPU throttle mechanism' will be added in a future version to circumvent this for some old test codes. - the emulated I/O can lead to apparently slow device reaction times,
especially when the server runs as a normal user process. This can lead
to a timeout, again mostly in test programs.
--> a 'watch dog' mechanism will be added in a future version which suspends the CPU when the server doesn't respond fast enough.
Known differences between Simh, e11, a real 11/70, and w11a
The Simh and e11 simulators do not model some 11/70 details that have no effect on normal operation for performance reasons. Test codes, like xxdp diagostic programs from DEC or the tcodes of the w11 verification suite are sometimes sensitive to those details, so the most relevant ones are listed under