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31b86ebc2ea3b177b3aefdb256f5b308ea096de6
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2017 Commits

Author SHA1 Message Date
Emil J. Tywoniak
31b86ebc2e newcelltypes: comment 2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
8e17fb0266 consteval: use newcelltypes 2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
a0f87dc2d1 modtools: use newcelltypes 2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
a9463d1aee newcelltypes: fix non-cells 2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
e3f9911e33 newcelltypes: refactor 2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
07ec8708e4 share: use newcelltypes 2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
3212dfaf1f newcelltypes: fix unit test 2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
7e9e88c2ec newcelltypes: bounds check 2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
9e59f05c25 newcelltypes: wrap design celltypes support 2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
35ccaa60d7 newcelltypes: TurboCellTypes -> StaticCellTypes 2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
6adc08b0e5 opt_expr: use newcelltypes 2026-03-04 12:22:14 +01:00
Emil J. Tywoniak
a61455645d newcelltypes: init 2026-03-04 12:22:14 +01:00
Emil J
5f8489d36d Merge pull request #5666 from YosysHQ/emil/equiv_induct-missing-model-errors 
equiv_induct: error on missing model
 2026-02-25 15:39:31 +01:00
Emil J
74f7b0cf92 Merge pull request #5685 from chathhorn-galois/chathhorn/issue5684 
Fix segfault from shift with 0-width signed arg.
 2026-02-20 11:53:05 +01:00
Emil J
53509a9b2a Merge pull request #5692 from YosysHQ/emil/modtools-fix-db-port-deletion 
modtools: fix database sanity
 2026-02-20 10:49:28 +01:00
Emil J. Tywoniak
abc7563a35 modtools: add ModIndex unit test 2026-02-18 22:15:44 +01:00
Emil J. Tywoniak
c75d80905a modtools: fix database sanity on wire name swap 2026-02-18 21:23:21 +01:00
Gus Smith
29a270c4b6 Merge pull request #5675 from rowanG077/add-missing-celledges 
kernel/celledges: cover more cell types
 2026-02-18 07:50:41 -08:00
Emil J. Tywoniak
62f19cb3a9 modtools: fix port_del db erase 2026-02-18 12:20:36 +01:00
Emil J. Tywoniak
77f64de997 satgen: move report_missing_model here from equiv.h 2026-02-16 17:01:09 +01:00
Chris Hathhorn
1e852cef16 Fix segfault from shift with 0-width signed arg. 
Fixes #5684.
 2026-02-12 22:03:42 -06:00
Gus Smith
8ab105ac28 Merge pull request #4303 from Coloquinte/sat_choice 
Infrastructure to run a Sat solver as a command
 2026-02-11 06:54:53 -08:00
Rowan Goemans
b8ee50d77f kernel/celledges: cover more cell types 2026-02-09 14:13:40 +01:00
Gus Smith
1502e23371 Set solver from scratchpad or command line 2026-02-06 19:26:32 -08:00
Emil J
2aa0e1d009 Merge pull request #5629 from rocallahan/remove-zero-wires 
Avoid scanning entire module in `Module::remove()` if there are no wires to remove
 2026-02-04 17:44:24 +01:00
Emil J. Tywoniak
d199195785 satgen: cover $input_port 2026-02-03 18:10:29 +01:00
Emil J
59653da599 Merge pull request #5609 from nataliakokoromyti/upstream-design-run-pass 
Add Design::run_pass()
 2026-02-02 19:30:18 +01:00
nella
8f6c4d40e4 Merge pull request #5623 from YosysHQ/nella/opt-dff-rewrite 
opt_dff restructure.
 2026-01-28 14:41:40 +01:00
Krystine Sherwin
aaebce7adc log_help: Don't reformat codeblocks 2026-01-28 08:07:44 +13:00
nella
9367090763 OptDff more accurate ctrl/pattern desc. 2026-01-26 22:19:36 +01:00
nella
5803461c24 opt_dff pattern extraction. 2026-01-26 22:10:10 +01:00
Robert O'Callahan
dcd7742d52 Avoid scanning entire module if there are no wires to remove 
It's pretty common for `opt_clean` to find no wires to remove. In that case,
there is no point scanning the entire design, which can be significantly
expensive for huge designs.
 2026-01-23 01:38:20 +00:00
Robert O'Callahan
2c0448a81b Avoid spurious copy in IdStringCollector::trace_named() 2026-01-21 03:31:56 +00:00
Emil J. Tywoniak
befadf6d4d consteval: describe 2026-01-19 12:00:18 +01:00
Natalia
cf511628b0 modify generator for pyosys/wrappers.cc instead of headers 2026-01-18 02:11:09 -08:00
Natalia
fb864e91ee Add Design::run_pass() API for programmatic pass execution 
This commit adds a new run_pass() method to the RTLIL::Design class,
providing a convenient API for executing Yosys passes programmatically.

This is particularly useful for PyYosys users who want to run passes
on a design object without needing to manually construct Pass::call()
invocations. The method wraps Pass::call() with appropriate logging
to maintain consistency with command-line pass execution.

Example usage (from Python):
    design = ys.Design()
    # ... build or load design ...
    design.run_pass("hierarchy")
    design.run_pass("proc")
    design.run_pass("opt")

Changes:
- kernel/rtlil.h: Add run_pass() method declaration
- kernel/rtlil.cc: Implement run_pass() method
- tests/unit/kernel/test_design_run_pass.cc: Add unit tests
 2026-01-14 17:35:45 -08:00
nella
763001885f Merge pull request #5608 from YosysHQ/nella/rtlil-to-string 
Add rtlil string getters
 2026-01-14 19:00:47 +01:00
nella
210b733555 Add rtlil string getters 2026-01-14 15:37:18 +01:00
Emil J. Tywoniak
8e2038c419 Use digit separators for large decimal integers 2026-01-13 16:38:12 +01:00
Miodrag Milanovic
0e6973037d Update year in banner and license 2026-01-13 14:23:51 +01:00
Robert O'Callahan
8da919587d Parallelize opt_merge. 
I'm not sure why but this is actually faster than existing `opt_merge` even with
YOSYS_MAX_THREADS=1, for the jpeg synthesis test. 16.0s before, 15.5s after for
end-to-end synthesis.
 2026-01-08 04:21:39 +00:00
Emil J
0ab967b036 Merge pull request #5564 from rocallahan/pass-fuzz 
Add support for fuzz-test comparison of two passes intended to give identical RTLIL results
 2026-01-06 20:07:31 +01:00
Robert O'Callahan
a6d696ba2b Give IdString a default move constructor and make it a POD type. 
Now that we're not refcounting `IdString`, it can use the default move constructor.
This lets us make `IdString` a POD type so it can be passed in registers
in the standard C++ ABI.
 2025-12-30 22:35:14 +00:00
Robert O'Callahan
48cdb499f2 Remove IdString::id_string(). 
This was needed for the short time when `ID()` could return a value of `StaticIdString`.
That is no longer a problem.
 2025-12-22 01:57:30 +00:00
Robert O'Callahan
46cb05c471 Pass IdString by value instead of by const reference. 
When IdString refcounting was expensive, it made sense to pass it by const reference
instead of by value, to avoid refcount churn. Now that IdString is not refcounted,
it's slightly more efficient to pass it by value.
 2025-12-22 01:52:59 +00:00
Robert O'Callahan
ddd6a16ee0 Add -legalize option to read_rtlil 2025-12-21 21:47:48 +00:00
Emil J
f003eca615 Merge pull request #5526 from YosysHQ/emil/fix-cellaigs-function-arg-eval-order 
cellaigs: fix function argument evaluation order
 2025-12-12 10:00:09 +01:00
Emil J
5594b817cd Merge pull request #5524 from rocallahan/single-thread-log 
Check that we don't use logging during multithreading
 2025-12-10 13:54:09 +01:00
Emil J
e08e9119ee Merge pull request #5516 from rocallahan/limit-threads 
Limit thread usage in tests
 2025-12-10 13:45:07 +01:00
Emil J. Tywoniak
99e873efc9 cellaigs: fix AOI and OAI ordering 2025-12-10 12:41:13 +01:00