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Mono Color

• e690fb59f1 docs: fix verilog frontend internals Emil J. Tywoniak 2025-07-09 16:11:10 +02:00
• 56058b3ed4 read_verilog, ast: use unified locations in errors and simplify dependencies Emil J. Tywoniak 2025-07-09 15:24:34 +02:00
• 41d9a1b88e readme, verilog_parser: bison 3.8 and ubuntu 22.04 example Emil J. Tywoniak 2025-07-09 14:34:03 +02:00
• 7e026d824a dpicall.cc: Fix sans-plugin function call Krystine Sherwin 2025-06-25 11:37:40 +12:00
• cf0f72dbd7 Makefile: Add flex lib/include for brew Krystine Sherwin 2025-06-25 11:32:46 +12:00
• a2b2188a7f preproc.cc: Use full path for generated file Krystine Sherwin 2025-06-25 11:25:39 +12:00
• b90622b7ed docs/verilog_frontend.rst: Fix indentation Krystine Sherwin 2025-06-25 10:39:50 +12:00
• 7b5035e0c4 preproc depends on parser Krystine Sherwin 2025-06-25 10:38:07 +12:00
• c70224a68a Add libfl-dev Krystine Sherwin 2025-06-25 10:23:44 +12:00
• 040d717ad7 fixup! fixup! ast, read_verilog: unify location types, reduce filename copying Emil J. Tywoniak 2025-06-24 22:45:59 +02:00
• ed0582c9f2 fixup! ast, read_verilog: unify location types, reduce filename copying Emil J. Tywoniak 2025-06-24 22:14:30 +02:00
• 81e5270484 ast, read_verilog: unify location types, reduce filename copying Emil J. Tywoniak 2025-06-18 22:50:46 +02:00
• b276fb6616 neater errors, lost in the sauce of source Emil J. Tywoniak 2025-06-18 18:05:48 +02:00
• 88800a16ea ast, read_verilog: refactoring Emil J. Tywoniak 2025-06-18 12:39:32 +02:00
• 31002cf259 ast: fix new memory safety bugs from rebase Emil J. Tywoniak 2025-06-17 15:25:57 +02:00
• 6cb789b2c2 ast: ownership for string values Emil J. Tywoniak 2025-06-17 01:57:51 +02:00
• 8a873a7724 ast, read_verilog: ownership in AST, use C++ styles for parser and lexer Emil J. Tywoniak 2025-06-16 22:55:24 +02:00
• bb08919105 Revert "verilog: fix string literal regular expression (#5187)" Emil J. Tywoniak 2025-07-10 21:15:38 +02:00
• dc204dc909 Revert "verilog: add support for SystemVerilog string literals." Emil J. Tywoniak 2025-07-10 21:14:38 +02:00
• e0822c048e Revert "verilog: fix parser "if" memory errors." Emil J. Tywoniak 2025-07-10 21:13:28 +02:00
• dfe86b50d8 Merge pull request #5217 from rocallahan/fix-importSigSpecWorker-leak Emil J 2025-07-10 19:56:56 +02:00
• 14aad097f0 Merge pull request #5190 from YosysHQ/emil/dfflibmap-fix-negated-next_state Emil J 2025-07-10 19:50:02 +02:00
• 7fe817c52f dfflibmap: test negated state next_state with mixed polarities Emil J. Tywoniak 2025-07-10 18:54:43 +02:00
• 02323295b0 Merge pull request #5179 from YosysHQ/krys/assert2cover N. Engelhardt 2025-07-10 14:53:22 +02:00
• d21a553fdc Merge pull request #5218 from YosysHQ/nak/limit_ub N. Engelhardt 2025-07-10 14:53:11 +02:00
• f34c4f2e26 log: deduplicate unescape_id from log_id Emil J. Tywoniak 2025-07-09 16:20:27 +02:00
• e47f5369fd verificsva: check -L value is small enough for code to work N. Engelhardt 2025-07-09 15:58:35 +02:00
• 9334a5c275 Merge pull request #5216 from YosysHQ/emil/publish-libparse-header Emil J 2025-07-09 14:28:59 +02:00
• 7566af4a4b Bump version github-actions[bot] 2025-07-09 00:25:57 +00:00
• 743df9f0f9 Fix space leak in SatGen::importSigSpecWorker() by avoiding log_id(). Robert O'Callahan 2025-07-08 23:53:38 +00:00
• 478b6a2b3f kernel: treat zero width constant as zero George Rennie 2025-06-16 13:40:07 +01:00
• ad80e2bd39 libparse: install headers for use in plugins Emil J. Tywoniak 2025-07-08 13:39:03 +02:00
• 66035f706e Merge pull request #5177 from YosysHQ/emil/rename-unescape Emil J 2025-07-08 10:45:11 +02:00
• e60cf3e2fa Bump version github-actions[bot] 2025-07-08 00:25:06 +00:00
• 1a215719e5 Merge pull request #5192 from garytwong/multiline-string KrystalDelusion 2025-07-08 10:27:01 +12:00
• 658c7dd424 rename: fix help Emil J. Tywoniak 2025-07-07 16:16:57 +02:00
• 024c9b022b WIP stubber Emil J. Tywoniak 2025-07-07 14:53:36 +02:00
• 8af60b7e17 Next dev cycle Miodrag Milanovic 2025-07-07 12:40:53 +02:00
• 60f126cd00 Release version 0.55 v0.55 Miodrag Milanovic 2025-07-07 11:16:07 +02:00
• 468cbb800c Merge pull request #5206 from yrabbit/cell-creation-script-5a Emil J 2025-07-07 10:36:42 +02:00
• 642756a9c6 Merge pull request #5178 from jix/sva_cover_only_followed_by N. Engelhardt 2025-07-07 10:07:06 +02:00
• dcf72ff8e2 Document tests/functional prereqs Krystine Sherwin 2025-07-07 11:27:37 +12:00
• 108a4ed496 tests/functional: Reduce CI to 100 steps Krystine Sherwin 2025-07-07 10:45:51 +12:00
• 3c54d8aef7 tests/functional: Auto parallelize Krystine Sherwin 2025-07-07 10:38:32 +12:00
• 62067cd6cb Update docs after addition of new pass Martin Povišer 2025-07-04 17:57:00 +02:00
• 22a44e4333 Start opt_hier Martin Povišer 2025-07-03 11:23:30 +02:00
• 99f7d79abb Bump version github-actions[bot] 2025-07-05 00:23:55 +00:00
• afd0ba0099 Merge pull request #5208 from YosysHQ/micko/replace_const_exprs Miodrag Milanović 2025-07-04 10:35:03 +02:00
• 5feb1a1752 verilog: add support for SystemVerilog string literals. Gary Wong 2025-07-03 20:51:12 -06:00
• eed3bc243f verific: enable replacing const exprs in static elaboration by default Miodrag Milanovic 2025-07-02 11:54:19 +02:00
• 85e7c68fc6 Gowin. BUGFIX. Fix multi-line descriptions. YRabbit 2025-07-02 12:39:18 +10:00
• 8a4f465143 update test to use suggested selection for assertions N. Engelhardt 2025-07-01 11:33:03 +02:00
• 7b0c1fe491 Merge pull request #5102 from YosysHQ/krys/verilog_no_select N. Engelhardt 2025-06-30 13:35:17 +00:00
• 54013c6da7 Merge pull request #5162 from YosysHQ/micko/attrmap Miodrag Milanović 2025-06-30 15:24:04 +02:00
• 67583fee48 Bump version github-actions[bot] 2025-06-30 00:27:10 +00:00
• 74575691a0 Merge pull request #5180 from YosysHQ/krys/test_asan KrystalDelusion 2025-06-30 10:40:34 +12:00
• 017524d7a2 tests/verific: Don't ASAN verific Krystine Sherwin 2025-06-28 11:33:18 +12:00
• e6961d8c9f CI: Test with ASAN as well Krystine Sherwin 2025-06-28 11:33:18 +12:00
• a1d68fe3bc Add option for using assoc list helpers in tests Gus Smith 2025-06-26 17:44:12 -07:00
• ef3f541501 add linecoverage command to generate lcov report from selection N. Engelhardt 2025-06-26 13:21:53 +02:00
• b85bd37360 fixup! box_derive: add -apply Emil J. Tywoniak 2025-06-25 14:14:31 +02:00
• 424f9f91aa box_derive: add -apply Emil J. Tywoniak 2025-06-25 12:43:15 +02:00
• 3c474a4965 publish: add pass for renaming private cell types to public Emil J. Tywoniak 2025-06-25 12:43:01 +02:00
• 9c1ba188b9 dpicall.cc: Fix sans-plugin function call krys/ast_ownership_with_old_bison Krystine Sherwin 2025-06-25 11:37:40 +12:00
• d04d4081fc Makefile: Add flex lib/include for brew Krystine Sherwin 2025-06-25 11:32:46 +12:00
• 274ccd0778 preproc.cc: Use full path for generated file Krystine Sherwin 2025-06-25 11:25:39 +12:00
• 5e44978ecc docs/verilog_frontend.rst: Fix indentation Krystine Sherwin 2025-06-25 10:39:50 +12:00
• c62efb0ace preproc depends on parser Krystine Sherwin 2025-06-25 10:38:07 +12:00
• b8218cb95e Add libfl-dev Krystine Sherwin 2025-06-25 10:23:44 +12:00
• 675a5744fa Changes for bison < 3.6 Krystine Sherwin 2025-06-25 10:15:51 +12:00
• fd463f9597 fixup! fixup! ast, read_verilog: unify location types, reduce filename copying Emil J. Tywoniak 2025-06-24 22:45:59 +02:00
• 4e1ac7830b fixup! ast, read_verilog: unify location types, reduce filename copying Emil J. Tywoniak 2025-06-24 22:14:30 +02:00
• 2b659626a3 rename: add -unescape Emil J. Tywoniak 2025-06-13 14:25:22 +02:00
• 513f0f16dd Merge pull request #5173 from RonxBulld/refine_setup_shutdown_flags Emil J 2025-06-24 12:32:52 +02:00
• 73cbcffbbb fixup! dfflibmap: propagate negated next_state to output correctly Emil J. Tywoniak 2025-06-24 12:31:30 +02:00
• 778079b058 dfflibmap: propagate negated next_state to output correctly Emil J. Tywoniak 2025-06-24 12:01:12 +02:00
• 7b2bf1fe2e CODEOWNERS: add myself for verilog frontend and ast layer emil/codeowners-verilog-ast Emil J. Tywoniak 2025-06-24 10:54:13 +02:00
• 8a9d724873 Finish up functions and tests, TODO: CLI Gus Smith 2025-06-23 19:20:06 -07:00
• a0a77cd1d0 Bump version github-actions[bot] 2025-06-24 00:24:55 +00:00
• 34a2abeddb verilog: fix parser "if" memory errors. Gary Wong 2025-06-20 17:26:20 -06:00
• efde8319dc json: add -wide mode which permits no non-trivial sigspecs emil/json-wide Emil Jiří Tywoniak 2025-06-21 16:47:36 +02:00
• 170933ecb0 Merge pull request #5165 from georgerennie/george/opt_dff_uaf George Rennie 2025-06-20 23:33:26 +01:00
• beaca05b40 Include boxes in attrmap Krystine Sherwin 2025-06-21 09:49:56 +12:00
• 44aa313ba9 Bump version github-actions[bot] 2025-06-20 00:24:40 +00:00
• 059228dd4e Makefile: remove hardcoded -soname for libyosys.so Jiahui Xu 2025-06-19 18:47:48 +02:00
• 834a7294b7 verilog: fix string literal regular expression (#5187) garytwong 2025-06-19 16:41:18 +00:00
• 653c002ad0 ast, read_verilog: unify location types, reduce filename copying Emil J. Tywoniak 2025-06-18 22:50:46 +02:00
• 6ac9f79de6 neater errors, lost in the sauce of source Emil J. Tywoniak 2025-06-18 18:05:48 +02:00
• 242853f1f2 ast, read_verilog: refactoring Emil J. Tywoniak 2025-06-18 12:39:32 +02:00
• 5af4e05125 ast: fix new memory safety bugs from rebase Emil J. Tywoniak 2025-06-17 15:25:57 +02:00
• 20225d19ae ast: ownership for string values Emil J. Tywoniak 2025-06-17 01:57:51 +02:00
• 8a9f491ffc ast, read_verilog: ownership in AST, use C++ styles for parser and lexer Emil J. Tywoniak 2025-06-16 22:55:24 +02:00
• 4276756f32 fixup! const2ast: add diagnostics tests Emil J. Tywoniak 2025-06-16 22:50:31 +02:00
• 49cd3887a7 const2ast: add diagnostics tests Emil J. Tywoniak 2025-06-16 21:48:12 +02:00
• 41107e5473 log: add -expect types prefix-log, prefix-warning, prefix-error Emil J. Tywoniak 2025-06-16 21:26:08 +02:00
• cd71f190cd Bump version github-actions[bot] 2025-06-14 00:24:06 +00:00
• fa68299b25 tests/verific: Add chformal tests Krystine Sherwin 2025-06-14 11:06:38 +12:00
• 45131f4425 chformal: Add -assert2cover option Krystine Sherwin 2025-06-14 10:54:06 +12:00
• efa30dfdf8 Merge pull request #5176 from YosysHQ/krys/no_cxxopt_split KrystalDelusion 2025-06-14 10:39:28 +12:00
• f019e44e74 verificsva: Support the followed-by operator in cover mode Jannis Harder 2025-06-13 21:27:31 +02:00