mirror of
https://github.com/aap/pdp6.git
synced 2026-01-13 15:27:46 +00:00
implemented mul and div subroutines
This commit is contained in:
aap
parent
534d4521c3
commit
d8edd19b0d
@ -1,4 +1,4 @@
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test: test.v pdp6.v apr.v core161c.v fast162.v modules.v
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test: test.v pdp6.v apr.v core161c.v fast162.v modules.v test1.inc test2.inc
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iverilog -o test test.v pdp6.v apr.v core161c.v fast162.v modules.v
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test_dec: test_dec.v pdp6.v apr.v core161c.v fast162.v modules.v
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364
verilog/apr.v
364
verilog/apr.v
@ -1087,7 +1087,7 @@ module apr(
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wire ar_clr = dst2 | fat6 |
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et0a & ar_clr_et0 |
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et1 & ar_clr_et1 |
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mst1_D;
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mst1_D0;
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wire ar_clr_et0 = boole_0 | boole_3 | boole_14 | boole_17;
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wire ar_clr_et1 = hwt_ar_clr | iot_status | iot_datai;
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wire ar_com = ar_incdec_t0 | ar_negate_t0 |
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@ -1211,11 +1211,6 @@ module apr(
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.in(ar_cry_comp),
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.p(ar_cry_comp_D));
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wire mst1_D;
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dly50ns ar_dly7(.clk(clk), .reset(reset),
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.in(mst1),
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.p(mst1_D));
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wire [0:35] ar_mb_cry = mb & ~ar;
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wire [0:35] ar_cry_in = ar_cry_initiate ? { mb[1:35]&~ar[1:35], 1'b0 } :
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ar35_cry_in & ar17_cry_in ? 36'o000001000001 :
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@ -1910,16 +1905,45 @@ module apr(
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reg mpf2;
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wire mp_clr = mr_clr;
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wire mpt0 = 0;
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wire mpt0a = 0;
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wire mpt1 = 0;
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wire mpt2 = 0;
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wire mpt0;
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wire mpt0a;
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wire mpt1;
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wire mpt2;
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pa mp_pa0(.clk(clk), .reset(reset),
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.in(et0 & ir_mul),
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.p(mpt0));
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pa mp_pa1(.clk(clk), .reset(reset),
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.in(mst6 & mpf1),
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.p(mpt0a));
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pa mp_pa2(.clk(clk), .reset(reset),
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.in(mpt0a_D & ~ir[6]),
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.p(mpt1));
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pa mp_pa3(.clk(clk), .reset(reset),
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.in(mpt1_D),
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.p(mpt2));
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wire mpt0a_D, mpt1_D, mpt2_D;
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dly200ns mp_dly0(.clk(clk), .reset(reset),
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.in(mpt0a),
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.p(mpt0a_D));
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dly100ns mp_dly1(.clk(clk), .reset(reset),
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.in(mpt1),
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.p(mpt1_D));
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dly100ns mp_dly2(.clk(clk), .reset(reset),
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.in(mpt2),
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.p(mpt2_D));
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always @(posedge clk) begin
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if(mp_clr | mpt0a)
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mpf1 <= 0;
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if(mpt0)
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mpf1 <= 1;
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if(mp_clr)
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mpf2 <= 0;
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if(mpt0 & ar[0] & mb[0])
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mpf2 <= 1;
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end
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/*
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@ -2022,19 +2046,58 @@ module apr(
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* MS
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*/
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reg msf1;
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wire ms_mult = 0;
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wire ms_mult = mpf1 | fmf2;
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wire mst1 = 0;
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wire mst2 = 0;
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wire mst3 = 0;
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wire mst3a = 0;
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wire mst4 = 0;
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wire mst5 = 0;
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wire mst6 = 0;
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wire mst1;
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wire mst2;
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wire mst3;
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wire mst3a;
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wire mst4;
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wire mst5;
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wire mst6;
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pa ms_pa0(.clk(clk), .reset(reset),
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.in(mpt0 | fmt0a),
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.p(mst1));
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pa ms_pa1(.clk(clk), .reset(reset),
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.in(((mst1_D1 | mst2_D) & mq35_eq_mq36 | mst3a) & ~sc_eq_777),
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.p(mst2));
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pa ms_pa2(.clk(clk), .reset(reset),
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.in((mst1_D1 | mst2_D) & ~mq[35] & mq36),
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.p(mst3));
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pa ms_pa3(.clk(clk), .reset(reset),
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.in((mst1_D1 | mst2_D) & mq[35] & ~mq36),
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.p(mst4));
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pa ms_pa4(.clk(clk), .reset(reset),
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.in(ar_t3 & msf1),
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.p(mst3a));
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pa ms_pa5(.clk(clk), .reset(reset),
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.in((mst2_D & mq35_eq_mq36 | mst3a) & sc_eq_777),
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.p(mst5));
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pa ms_pa6(.clk(clk), .reset(reset),
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.in(mst5_D),
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.p(mst6));
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wire mst1_D0, mst1_D1;
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wire mst2_D, mst5_D;
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dly50ns ms_dly0(.clk(clk), .reset(reset),
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.in(mst1),
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.p(mst1_D0));
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dly200ns ms_dly1(.clk(clk), .reset(reset),
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.in(mst1),
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.p(mst1_D1));
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dly150ns ms_dly2(.clk(clk), .reset(reset),
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.in(mst2),
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.p(mst2_D));
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dly100ns ms_dly3(.clk(clk), .reset(reset),
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.in(mst5),
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.p(mst5_D));
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always @(posedge clk) begin
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if(mp_clr | mst3a)
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msf1 <= 0;
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if(mst3 | mst4)
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msf1 <= 1;
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end
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/*
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@ -2049,69 +2112,253 @@ module apr(
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reg dsf7;
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reg dsf8;
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reg dsf9;
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wire ds_div = 0;
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wire ds_divi = 0;
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wire ds_div = ir_div & ir[6];
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wire ds_divi = ir_div & ~ir[6];
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wire dsf7_xor_mq0 = dsf7 ^ mq[0];
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wire ds_clr;
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wire dsf7_xor_mq0 = 0;
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wire dst0;
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wire dst0a;
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wire dst1;
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wire dst2;
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wire dst3;
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wire dst4;
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wire dst5;
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wire dst5a;
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wire dst6;
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wire dst7;
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wire dst8;
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wire dst9;
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wire dst10;
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wire dst10a;
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wire dst10b;
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wire dst11;
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wire dst11a;
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wire dst12;
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wire dst13;
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wire dst14a;
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wire dst14b;
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wire dst14;
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wire dst15;
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wire dst16;
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wire dst17;
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wire dst17a;
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wire dst18;
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wire dst19;
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wire dst19a;
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wire dst19b;
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wire dst20;
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wire dst21;
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wire dst21a;
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wire dst0 = 0;
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wire dst0a = 0;
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wire dst1 = 0;
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wire dst2 = 0;
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wire dst3 = 0;
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wire dst4 = 0;
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wire dst5 = 0;
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wire dst5a = 0;
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wire dst6 = 0;
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wire dst7 = 0;
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wire dst8 = 0;
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wire dst9 = 0;
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wire dst10 = 0;
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wire dst10a = 0;
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wire dst10b = 0;
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wire dst11 = 0;
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wire dst11a = 0;
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wire dst12 = 0;
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wire dst13 = 0;
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wire dst14 = 0;
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wire dst14a = 0;
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wire dst14b = 0;
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wire dst15 = 0;
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wire dst16 = 0;
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wire dst17 = 0;
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wire dst17a = 0;
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wire dst18 = 0;
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wire dst19 = 0;
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wire dst19a = 0;
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wire dst20 = 0;
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wire dst21 = 0;
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wire dst21a = 0;
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wire ds_div_t0 = 0;
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wire ds_div_t0;
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pa ds_pa0(.clk(clk), .reset(reset),
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.in(mr_clr),
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.p(ds_clr));
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pa ds_pa1(.clk(clk), .reset(reset),
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.in(et0 & ir_div),
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.p(ds_div_t0));
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pa ds_pa2(.clk(clk), .reset(reset),
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.in((et0 & ds_divi | fdt0a) & ar[0]),
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.p(dst0));
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pa ds_pa3(.clk(clk), .reset(reset),
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.in(ar_t3 & dsf1),
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.p(dst0a));
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pa ds_pa4(.clk(clk), .reset(reset),
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.in((et0 & ~ar[0] | dst0a) & ds_divi),
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.p(dst1));
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pa ds_pa5(.clk(clk), .reset(reset),
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.in(dst1_D),
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.p(dst2));
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pa ds_pa6(.clk(clk), .reset(reset),
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.in(et0 & ar[0] & ds_div),
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.p(dst3));
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pa ds_pa7(.clk(clk), .reset(reset),
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.in(dst3_D),
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.p(dst4));
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pa ds_pa8(.clk(clk), .reset(reset),
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.in(dst4_D),
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.p(dst5));
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pa ds_pa9(.clk(clk), .reset(reset),
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.in(ar_t3 & dsf2),
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.p(dst5a));
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pa ds_pa10(.clk(clk), .reset(reset),
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.in(dst5a_D & ~ar_eq_0),
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.p(dst6));
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pa ds_pa11(.clk(clk), .reset(reset),
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.in(dst6_D),
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.p(dst7));
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pa ds_pa12(.clk(clk), .reset(reset),
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.in(dst5a_D & ar_eq_0),
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.p(dst8));
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pa ds_pa13(.clk(clk), .reset(reset),
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.in(dst8_D),
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.p(dst9));
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pa ds_pa14(.clk(clk), .reset(reset),
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.in(ar_t3 & dsf3 |
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fdt0a & ~ar[0] |
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dst0a & ~ds_divi |
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et0 & ds_div & ~ar[0] |
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dst2 | dst7),
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.p(dst10));
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pa ds_pa15(.clk(clk), .reset(reset),
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.in(dst10_D & ir_fdv),
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.p(dst10a));
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pa ds_pa16(.clk(clk), .reset(reset),
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.in(dst10_D & ir_div),
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.p(dst10b));
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pa ds_pa17(.clk(clk), .reset(reset),
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.in((dst10a_D | dst10b_D) & mb[0]),
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.p(dst11));
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pa ds_pa18(.clk(clk), .reset(reset),
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.in((dst10a_D | dst10b_D) & ~mb[0]),
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.p(dst12));
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pa ds_pa19(.clk(clk), .reset(reset),
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.in(ar_t3 & dsf4),
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.p(dst11a));
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pa ds_pa20(.clk(clk), .reset(reset),
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.in(dst11a & ~ar[0]),
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.p(dst13));
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pa ds_pa21(.clk(clk), .reset(reset),
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.in(ar_t3 & dsf5 |
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dst11a & ar[0]),
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.p(dst14a));
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pa ds_pa22(.clk(clk), .reset(reset),
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.in(dst14a),
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.p(dst14b));
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pa ds_pa23(.clk(clk), .reset(reset),
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.in(dst14b_D & ~sc_eq_777 & mq35_xor_mb0),
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.p(dst14));
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pa ds_pa24(.clk(clk), .reset(reset),
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.in(dst14b_D & ~sc_eq_777 & ~mq35_xor_mb0),
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.p(dst15));
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pa ds_pa25(.clk(clk), .reset(reset),
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.in(dst14b_D & sc_eq_777),
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.p(dst16));
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pa ds_pa26(.clk(clk), .reset(reset),
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.in(dst16_D & ar[0] & ~mb[0]),
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.p(dst17));
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pa ds_pa27(.clk(clk), .reset(reset),
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.in(dst16_D & ar[0] & mb[0]),
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.p(dst18));
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pa ds_pa28(.clk(clk), .reset(reset),
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.in(dst16_D & ~ar[0] |
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ar_t3 & dsf6),
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.p(dst17a));
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pa ds_pa29(.clk(clk), .reset(reset),
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.in(dst17a & dsf7),
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.p(dst19));
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pa ds_pa30(.clk(clk), .reset(reset),
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.in(dst17a & ~dsf7 |
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ar_t3 & dsf8),
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.p(dst19a));
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pa ds_pa31(.clk(clk), .reset(reset),
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.in(dst19_D),
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.p(dst19b));
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pa ds_pa32(.clk(clk), .reset(reset),
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.in(dst19a_D),
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.p(dst20));
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pa ds_pa33(.clk(clk), .reset(reset),
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.in(dst20_D & dsf7_xor_mq0),
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.p(dst21));
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pa ds_pa34(.clk(clk), .reset(reset),
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.in(dst20_D & ~dsf7_xor_mq0 |
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ar_t3 & dsf9),
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.p(dst21a));
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wire dst1_D, dst3_D, dst4_D, dst5a_D, dst6_D, dst8_D;
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wire dst10_D, dst10a_D, dst10b_D, dst14b_D, dst16_D;
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wire dst19_D, dst19a_D, dst20_D;
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dly150ns ds_dly0(.clk(clk), .reset(reset),
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.in(dst1),
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.p(dst1_D));
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dly100ns ds_dly1(.clk(clk), .reset(reset),
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.in(dst3),
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.p(dst3_D));
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dly100ns ds_dly2(.clk(clk), .reset(reset),
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.in(dst4),
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.p(dst4_D));
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dly100ns ds_dly3(.clk(clk), .reset(reset),
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.in(dst5a),
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.p(dst5a_D));
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dly100ns ds_dly4(.clk(clk), .reset(reset),
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.in(dst6),
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.p(dst6_D));
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dly100ns ds_dly5(.clk(clk), .reset(reset),
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.in(dst8),
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.p(dst8_D));
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dly100ns ds_dly6(.clk(clk), .reset(reset),
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.in(dst10),
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.p(dst10_D));
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dly200ns ds_dly7(.clk(clk), .reset(reset),
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.in(dst10a),
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.p(dst10a_D));
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dly200ns ds_dly8(.clk(clk), .reset(reset),
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.in(dst10b),
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.p(dst10b_D));
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dly100ns ds_dly9(.clk(clk), .reset(reset),
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.in(dst14b),
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.p(dst14b_D));
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dly100ns ds_dly10(.clk(clk), .reset(reset),
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.in(dst16),
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.p(dst16_D));
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dly50ns ds_dly11(.clk(clk), .reset(reset),
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.in(dst19),
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.p(dst19_D));
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dly100ns ds_dly12(.clk(clk), .reset(reset),
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.in(dst19a),
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.p(dst19a_D));
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dly100ns ds_dly13(.clk(clk), .reset(reset),
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.in(dst20),
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.p(dst20_D));
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always @(posedge clk) begin
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if(ds_clr | dst0a)
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dsf1 <= 0;
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if(dst0)
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dsf1 <= 1;
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if(ds_clr | dst5a)
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dsf2 <= 0;
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if(dst5)
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dsf2 <= 1;
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if(ds_clr | dst10)
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dsf3 <= 0;
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if(dst9)
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dsf3 <= 1;
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if(ds_clr | dst11a)
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dsf4 <= 0;
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if(dst11 | dst12)
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dsf4 <= 1;
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if(ds_clr | dst14a)
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dsf5 <= 0;
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if(dst14 | dst15)
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dsf5 <= 1;
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if(ds_clr | dst17a)
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dsf6 <= 0;
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if(dst17 | dst18)
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dsf6 <= 1;
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if(mr_clr)
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dsf7 <= 0;
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if(dst0 | dst3)
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dsf7 <= 1;
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if(ds_clr | dst19a)
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dsf8 <= 0;
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if(dst19b)
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dsf8 <= 1;
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if(ds_clr | dst21a)
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dsf9 <= 0;
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if(dst21)
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dsf9 <= 1;
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end
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/*
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@ -2134,7 +2381,12 @@ module apr(
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wire nrt4 = 0;
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wire nrt5 = 0;
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wire nrt5a = 0;
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wire nrt6 = 0;
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wire nrt6;
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||||
pa nr_pa0(.clk(clk), .reset(reset),
|
||||
.in(mpt0a & ir[6] |
|
||||
mpt2_D), // TODO
|
||||
.p(nrt6));
|
||||
|
||||
always @(posedge clk) begin
|
||||
if(mp_clr | nrt5a)
|
||||
|
||||
@ -316,7 +316,7 @@ module core161c(
|
||||
`ifdef simulation
|
||||
if(cmc_t4)
|
||||
/* As a hack zero core here */
|
||||
core[cma[32:35]] <= 0;
|
||||
core[cma[22:35]] <= 0;
|
||||
`endif
|
||||
if(cmc_t5) begin
|
||||
cmc_rd <= 0;
|
||||
@ -337,7 +337,7 @@ module core161c(
|
||||
if(cmc_t9 & cmc_wr)
|
||||
/* again a hack. core is written some time after t8.
|
||||
* (cmc_wr is always set here) */
|
||||
core[cma[32:35]] <= core[cma[32:35]] | cmb;
|
||||
core[cma[22:35]] <= core[cma[22:35]] | cmb;
|
||||
`endif
|
||||
if(cmc_t11)
|
||||
cmc_await_rq <= 1;
|
||||
|
||||
@ -1,20 +1,19 @@
|
||||
[*]
|
||||
[*] GTKWave Analyzer v3.3.76 (w)1999-2016 BSI
|
||||
[*] Thu Nov 24 15:13:00 2016
|
||||
[*] Sat Dec 10 18:05:06 2016
|
||||
[*]
|
||||
[dumpfile] "/home/aap/src/pdp6/verilog/dump.vcd"
|
||||
[dumpfile_mtime] "Thu Nov 24 15:10:54 2016"
|
||||
[dumpfile_size] 251956
|
||||
[dumpfile_mtime] "Sat Dec 10 17:52:00 2016"
|
||||
[dumpfile_size] 335826
|
||||
[savefile] "/home/aap/src/pdp6/verilog/test.gtkw"
|
||||
[timestart] 0
|
||||
[timestart] 4810
|
||||
[size] 1920 1080
|
||||
[pos] -1 -1
|
||||
*-11.555068 8970 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
|
||||
*-11.555068 17575 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1 -1
|
||||
[treeopen] test.
|
||||
[treeopen] test.pdp6.
|
||||
[treeopen] test.pdp6.fmem0.
|
||||
[sst_width] 337
|
||||
[signals_width] 442
|
||||
[signals_width] 486
|
||||
[sst_expanded] 1
|
||||
[sst_vpaned_height] 319
|
||||
@28
|
||||
@ -60,6 +59,9 @@ test.pdp6.apr0.ir[0:17]
|
||||
test.pdp6.apr0.mb[0:35]
|
||||
test.pdp6.apr0.ar[0:35]
|
||||
test.pdp6.apr0.mq[0:35]
|
||||
@28
|
||||
test.pdp6.apr0.mq36
|
||||
@30
|
||||
test.pdp6.apr0.sc[0:8]
|
||||
test.pdp6.apr0.fe[0:8]
|
||||
test.pdp6.apr0.datasw[0:35]
|
||||
@ -304,7 +306,6 @@ test.pdp6.apr0.membus_mb_pulse
|
||||
@200
|
||||
-
|
||||
@30
|
||||
test.pdp6.mem0.corescope[0:35]
|
||||
test.pdp6.mem0.ma[21:35]
|
||||
test.pdp6.mem0.cma[22:35]
|
||||
@28
|
||||
@ -335,6 +336,8 @@ test.pdp6.mem0.cmc_t9a
|
||||
test.pdp6.mem0.cmc_t10
|
||||
test.pdp6.mem0.cmc_t11
|
||||
test.pdp6.mem0.cmc_t12
|
||||
@30
|
||||
test.pdp6.mem0.sa[0:35]
|
||||
@1401200
|
||||
-mem0
|
||||
@c00200
|
||||
@ -354,7 +357,6 @@ test.pdp6.fmem0.fmct5
|
||||
-fmem0
|
||||
@28
|
||||
test.pdp6.apr0.at1_inh
|
||||
@29
|
||||
test.pdp6.apr0.ia_NOT_int
|
||||
@c00200
|
||||
-PI
|
||||
@ -552,5 +554,81 @@ test.pdp6.apr0.dct2
|
||||
test.pdp6.apr0.dct3
|
||||
@1401200
|
||||
-DC
|
||||
@c00200
|
||||
-MP
|
||||
@28
|
||||
test.pdp6.apr0.mpf2
|
||||
test.pdp6.apr0.mpt0
|
||||
test.pdp6.apr0.mpf1
|
||||
test.pdp6.apr0.mpt0a
|
||||
test.pdp6.apr0.mpt1
|
||||
test.pdp6.apr0.mpt2
|
||||
@1401200
|
||||
-MP
|
||||
@c00200
|
||||
-MS
|
||||
@28
|
||||
test.pdp6.apr0.mst1
|
||||
test.pdp6.apr0.mst2
|
||||
test.pdp6.apr0.mst3
|
||||
test.pdp6.apr0.mst4
|
||||
test.pdp6.apr0.msf1
|
||||
test.pdp6.apr0.mst3a
|
||||
test.pdp6.apr0.mst5
|
||||
test.pdp6.apr0.mst6
|
||||
@1401200
|
||||
-MS
|
||||
@c00201
|
||||
-DS
|
||||
@28
|
||||
test.pdp6.apr0.ds_div_t0
|
||||
test.pdp6.apr0.dst0
|
||||
test.pdp6.apr0.dsf1
|
||||
test.pdp6.apr0.dst0a
|
||||
test.pdp6.apr0.dst1
|
||||
test.pdp6.apr0.dst2
|
||||
test.pdp6.apr0.dst3
|
||||
test.pdp6.apr0.dst4
|
||||
test.pdp6.apr0.dst5
|
||||
test.pdp6.apr0.dsf2
|
||||
test.pdp6.apr0.dst5a
|
||||
test.pdp6.apr0.dst6
|
||||
test.pdp6.apr0.dst7
|
||||
test.pdp6.apr0.dst8
|
||||
test.pdp6.apr0.dst9
|
||||
test.pdp6.apr0.dsf3
|
||||
test.pdp6.apr0.dst10
|
||||
test.pdp6.apr0.dst10a
|
||||
test.pdp6.apr0.dst10b
|
||||
test.pdp6.apr0.dst11
|
||||
test.pdp6.apr0.dst12
|
||||
test.pdp6.apr0.dsf4
|
||||
test.pdp6.apr0.dst11a
|
||||
test.pdp6.apr0.dst13
|
||||
test.pdp6.apr0.dst14a
|
||||
test.pdp6.apr0.dst14b
|
||||
test.pdp6.apr0.dst14
|
||||
test.pdp6.apr0.dst15
|
||||
test.pdp6.apr0.dst16
|
||||
test.pdp6.apr0.dst17
|
||||
test.pdp6.apr0.dst17a
|
||||
test.pdp6.apr0.dst18
|
||||
test.pdp6.apr0.dst19
|
||||
test.pdp6.apr0.dst19a
|
||||
test.pdp6.apr0.dst19b
|
||||
test.pdp6.apr0.dst20
|
||||
test.pdp6.apr0.dst21
|
||||
test.pdp6.apr0.dst21a
|
||||
@200
|
||||
-
|
||||
@28
|
||||
test.pdp6.apr0.dsf5
|
||||
test.pdp6.apr0.dsf6
|
||||
test.pdp6.apr0.dsf7
|
||||
test.pdp6.apr0.dsf7_xor_mq0
|
||||
test.pdp6.apr0.dsf8
|
||||
test.pdp6.apr0.dsf9
|
||||
@1401201
|
||||
-DS
|
||||
[pattern_trace] 1
|
||||
[pattern_trace] 0
|
||||
|
||||
@ -149,58 +149,15 @@ module test;
|
||||
#20 reset = 0;
|
||||
|
||||
pdp6.datasw = 36'o111777222666;
|
||||
pdp6.mas = 18'o000070;
|
||||
pdp6.mas = 18'o000000;
|
||||
|
||||
for(i = 0; i < 'o40000; i = i + 1)
|
||||
pdp6.mem0.core[i] = 0;
|
||||
for(i = 0; i < 'o20; i = i + 1)
|
||||
pdp6.fmem0.ff[i] = 0;
|
||||
|
||||
pdp6.fmem0.ff['o0] = 36'o000000_010000;
|
||||
pdp6.fmem0.ff['o1] = 36'o000000_010222;
|
||||
pdp6.fmem0.ff['o2] = 36'o700000_200006;
|
||||
pdp6.fmem0.ff['o3] = 36'o500000_000004;
|
||||
pdp6.fmem0.ff['o4] = 36'o000000_010304;
|
||||
pdp6.fmem0.ff['o5] = 36'o377777_777777;
|
||||
pdp6.fmem0.ff['o6] = 36'o444000_222000;
|
||||
pdp6.fmem0.ff['o7] = 36'o777776_000010; // BLK ptr
|
||||
pdp6.fmem0.ff['o10] = 36'o000002_001000; // BLT ptr
|
||||
pdp6.fmem0.ff['o11] = 36'o440600_001000; // char ptr
|
||||
pdp6.fmem0.ff['o12] = 36'o300600_001000; // char ptr
|
||||
pdp6.fmem0.ff['o13] = 36'o000000_005555; // char
|
||||
pdp6.fmem0.ff['o14] = 36'o010700_001017;
|
||||
pdp6.fmem0.ff['o17] = 36'o777000_001000; // PDL ptr
|
||||
// pdp6.fmem0.ff['o17] = 36'o777000_777777; // PDL ptr
|
||||
|
||||
pdp6.mem0.core['o20] = 36'o200_064_000104; // MOVE 1,@104(4) FAC_INH
|
||||
pdp6.mem0.core['o21] = 36'o202_064_000104; // MOVEM 1,@104(4)
|
||||
pdp6.mem0.core['o22] = 36'o245_100_000003; // ROTC 2,3
|
||||
pdp6.mem0.core['o23] = 36'o700200_675550; // CONO APR,675550
|
||||
pdp6.mem0.core['o24] = 36'o700200_102227; // CONO APR,102227
|
||||
pdp6.mem0.core['o25] = 36'o700240_000005; // CONI APR,5
|
||||
pdp6.mem0.core['o26] = 36'o700140_000006; // DATAO APR,6
|
||||
pdp6.mem0.core['o27] = 36'o700040_000005; // DATAI APR,5
|
||||
pdp6.mem0.core['o30] = 36'o700000_000007; // BLKI APR,7
|
||||
|
||||
pdp6.mem0.core['o40] = 36'o700640_000005; // CONI APR,5
|
||||
pdp6.mem0.core['o41] = 36'o260740_000020; // PUSHJ 17,20
|
||||
pdp6.mem0.core['o41] = 36'o250040_000000; // AOS 1,
|
||||
pdp6.mem0.core['o42] = 36'o270000_000001; // ADD 0,1
|
||||
pdp6.mem0.core['o43] = 36'o274000_000001; // SUB 0,1
|
||||
|
||||
pdp6.mem0.core['o54] = 36'o245_100_000003; // ROTC 2,3
|
||||
pdp6.mem0.core['o55] = 36'o245_100_777775; // ROTC 2,-3
|
||||
pdp6.mem0.core['o56] = 36'o244_100_000001; // ASHC 2,1
|
||||
|
||||
pdp6.mem0.core['o60] = 36'o251_400_001001; // BLT 10,1007
|
||||
pdp6.mem0.core['o64] = 36'o133_000_000011; // IBP 11
|
||||
pdp6.mem0.core['o65] = 36'o135_000_000012; // LBP 0,12
|
||||
pdp6.mem0.core['o66] = 36'o134_000_000012; // ILBP 0,12
|
||||
pdp6.mem0.core['o67] = 36'o137_540_000012; // DBP 13,12
|
||||
pdp6.mem0.core['o70] = 36'o134_000_000014; // ILBP 0,14
|
||||
|
||||
pdp6.mem0.core['o1000] = 36'o50_45_54_54_57_00;
|
||||
pdp6.mem0.core['o10410] = 36'o000_000_000333;
|
||||
//`include "test1.inc"
|
||||
`include "test2.inc"
|
||||
end
|
||||
|
||||
wire [0:35] mem0scope = pdp6.mem0.core['o1000];
|
||||
|
||||
50
verilog/test1.inc
Normal file
50
verilog/test1.inc
Normal file
@ -0,0 +1,50 @@
|
||||
pdp6.fmem0.ff['o0] = 36'o000000_010001;
|
||||
pdp6.fmem0.ff['o1] = 36'o000000_010222;
|
||||
pdp6.fmem0.ff['o2] = 36'o700000_200006;
|
||||
pdp6.fmem0.ff['o3] = 36'o500000_000004;
|
||||
pdp6.fmem0.ff['o4] = 36'o000000_010304;
|
||||
pdp6.fmem0.ff['o5] = 36'o377777_777777;
|
||||
pdp6.fmem0.ff['o6] = 36'o444000_222000;
|
||||
pdp6.fmem0.ff['o7] = 36'o777776_000010; // BLK ptr
|
||||
pdp6.fmem0.ff['o10] = 36'o000002_001000; // BLT ptr
|
||||
pdp6.fmem0.ff['o11] = 36'o440600_001000; // char ptr
|
||||
pdp6.fmem0.ff['o12] = 36'o300600_001000; // char ptr
|
||||
pdp6.fmem0.ff['o13] = 36'o000000_005555; // char
|
||||
pdp6.fmem0.ff['o14] = 36'o010700_001017;
|
||||
pdp6.fmem0.ff['o17] = 36'o777000_001000; // PDL ptr
|
||||
// pdp6.fmem0.ff['o17] = 36'o777000_777777; // PDL ptr
|
||||
|
||||
pdp6.mem0.core['o20] = 36'o200_064_000104; // MOVE 1,@104(4) FAC_INH
|
||||
pdp6.mem0.core['o21] = 36'o202_064_000104; // MOVEM 1,@104(4)
|
||||
pdp6.mem0.core['o22] = 36'o245_100_000003; // ROTC 2,3
|
||||
pdp6.mem0.core['o23] = 36'o700200_675550; // CONO APR,675550
|
||||
pdp6.mem0.core['o24] = 36'o700200_102227; // CONO APR,102227
|
||||
pdp6.mem0.core['o25] = 36'o700240_000005; // CONI APR,5
|
||||
pdp6.mem0.core['o26] = 36'o700140_000006; // DATAO APR,6
|
||||
pdp6.mem0.core['o27] = 36'o700040_000005; // DATAI APR,5
|
||||
pdp6.mem0.core['o30] = 36'o700000_000007; // BLKI APR,7
|
||||
|
||||
pdp6.mem0.core['o40] = 36'o700640_000005; // CONI APR,5
|
||||
pdp6.mem0.core['o41] = 36'o260740_000020; // PUSHJ 17,20
|
||||
pdp6.mem0.core['o41] = 36'o250040_000000; // AOS 1,
|
||||
pdp6.mem0.core['o42] = 36'o270000_000001; // ADD 0,1
|
||||
pdp6.mem0.core['o43] = 36'o274000_000001; // SUB 0,1
|
||||
|
||||
pdp6.mem0.core['o54] = 36'o245_100_000003; // ROTC 2,3
|
||||
pdp6.mem0.core['o55] = 36'o245_100_777775; // ROTC 2,-3
|
||||
pdp6.mem0.core['o56] = 36'o244_100_000001; // ASHC 2,1
|
||||
|
||||
pdp6.mem0.core['o60] = 36'o251_400_001001; // BLT 10,1007
|
||||
pdp6.mem0.core['o64] = 36'o133_000_000011; // IBP 11
|
||||
pdp6.mem0.core['o65] = 36'o135_000_000012; // LBP 0,12
|
||||
pdp6.mem0.core['o66] = 36'o134_000_000012; // ILBP 0,12
|
||||
pdp6.mem0.core['o67] = 36'o137_540_000012; // DBP 13,12
|
||||
pdp6.mem0.core['o70] = 36'o134_000_000014; // ILBP 0,14
|
||||
|
||||
pdp6.mem0.core['o100] = 36'o221_000_000123; // IMULI 0,123
|
||||
|
||||
pdp6.mem0.core['o110] = 36'o231_200_000123; // IDIVI 4,123
|
||||
pdp6.mem0.core['o111] = 36'o231_340_000123; // IDIVI 7,123
|
||||
|
||||
pdp6.mem0.core['o1000] = 36'o50_45_54_54_57_00;
|
||||
pdp6.mem0.core['o10410] = 36'o000_000_000333;
|
||||
21
verilog/test2.inc
Normal file
21
verilog/test2.inc
Normal file
@ -0,0 +1,21 @@
|
||||
pdp6.fmem0.ff['o0] = 36'o000000_010001;
|
||||
pdp6.fmem0.ff['o1] = 36'o777777_767777;
|
||||
|
||||
pdp6.fmem0.ff['o2] = 36'o000000_010001;
|
||||
pdp6.fmem0.ff['o3] = 36'o001200_034000;
|
||||
|
||||
pdp6.fmem0.ff['o4] = 36'o777777_767776;
|
||||
pdp6.fmem0.ff['o5] = 36'o776577_744000;
|
||||
|
||||
pdp6.fmem0.ff['o6] = 36'o777777_767776;
|
||||
pdp6.fmem0.ff['o7] = 36'o000000_000000;
|
||||
|
||||
pdp6.mem0.core['o100] = 36'o221_000_000123; // IMULI 0,123
|
||||
|
||||
pdp6.mem0.core['o110] = 36'o231_000_000123; // IDIVI 0,123
|
||||
pdp6.mem0.core['o111] = 36'o231_040_000123; // IDIVI 1,123
|
||||
pdp6.mem0.core['o112] = 36'o235_100_000123; // DIVI 2,123
|
||||
pdp6.mem0.core['o113] = 36'o235_200_000123; // DIVI 4,123
|
||||
pdp6.mem0.core['o114] = 36'o235_300_000123; // DIVI 6,123
|
||||
|
||||
pdp6.mas = 18'o000110;
|
||||
Loading…
x
Reference in New Issue
Block a user