1
0
mirror of https://github.com/antonblanchard/microwatt.git synced 2026-01-13 07:09:54 +00:00
Paul Mackerras 0a11e8455f core: Implement hashst and hashchk instructions
These are done in loadstore1.  The HashDigest function is computed in
9 cycles; for 8 cycles, a state machine does 4 steps of key expansion
per cycle, and for each of 4 lanes of data, does 4 steps of ciphering;
then there is 1 cycle to combine the results into the final hash
value.

At present, hashcmp does not overlap the computation of the hash with
fetching of data from memory (in the case of a cache miss).

The 'is_signed' field in the instruction decode table is used to
distinguish hashst and hashcmp from ordinary loads and stores.  We
have a new 'RBC' value for input_reg_c_t which says that we are
reading RB but we want the value to come in via the C port; this is
because we want the 5-bit immediate offset on the B port.

Note that in the list of insn_code values, hashst/chk have been put in
the section for instructions with an RB operand, which is not strictly
correct given that the B port is used for the immediate D operand;
however, adding them to the section for instructions without an RB
operand would have made that section exceed 128 entries, causing
changes to the padding needed.  The only downside to having hashst/cmp
where they are is that the debug logic can't use the RB port to read
GPR/FPRs when a hashst/cmp instruction is being decoded.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
2025-01-25 14:50:13 +11:00
2024-04-09 14:22:01 +10:00
2025-01-18 10:04:45 +11:00
2024-04-01 18:09:43 +11:00
2024-04-09 14:22:01 +10:00
2019-10-08 21:02:46 -07:00
2024-04-01 18:04:44 +11:00
2022-10-24 21:39:00 +11:00
2022-09-05 00:24:49 +10:00
2022-10-31 14:41:15 +08:00
2021-03-22 10:55:32 +11:00
2021-03-22 10:55:32 +11:00
2021-03-22 10:55:32 +11:00
2021-08-09 11:57:00 +10:00
2022-10-31 14:41:15 +08:00
2024-12-20 22:24:20 +11:00
2019-09-19 20:33:58 +10:00
2023-07-06 19:39:40 +10:00
2019-08-22 16:46:13 +10:00
2024-12-20 22:24:31 +11:00
2023-09-19 17:34:47 +10:00
2021-08-09 11:57:00 +10:00
2020-01-22 14:50:45 +11:00
2019-09-19 20:28:37 +10:00
2020-01-22 14:50:45 +11:00
2020-06-13 11:33:41 +10:00
2020-01-22 14:50:45 +11:00
2020-01-22 14:50:45 +11:00
2025-01-18 10:04:45 +11:00
2024-12-20 22:24:20 +11:00

Microwatt

Microwatt

A tiny Open POWER ISA softcore written in VHDL 2008. It aims to be simple and easy to understand.

Simulation using ghdl

MicroPython running on Microwatt

You can try out Microwatt/Micropython without hardware by using the ghdl simulator. If you want to build directly for a hardware target board, see below.

  • Build micropython. If you aren't building on a ppc64le box you will need a cross compiler. If it isn't available on your distro grab the powerpc64le-power8 toolchain from https://toolchains.bootlin.com. You may need to set the CROSS_COMPILE environment variable to the prefix used for your cross compilers. The default is powerpc64le-linux-gnu-.
git clone https://github.com/micropython/micropython.git
cd micropython
cd ports/powerpc
make -j$(nproc)
cd ../../../

A prebuilt micropython image is also available in the micropython/ directory.

  • Microwatt uses ghdl for simulation. Either install this from your distro or build it. Microwatt requires ghdl to be built with the LLVM or gcc backend, which not all distros do (Fedora does, Debian/Ubuntu appears not to). ghdl with the LLVM backend is likely easier to build.

    If building ghdl from scratch is too much for you, the microwatt Makefile supports using Docker or Podman.

  • Next build microwatt:

git clone https://github.com/antonblanchard/microwatt
cd microwatt
make

To build using Docker:

make DOCKER=1

and to build using Podman:

make PODMAN=1
  • Link in the micropython image:
ln -s ../micropython/ports/powerpc/build/firmware.bin main_ram.bin

Or if you were using the pre-built image:

ln -s micropython/firmware.bin main_ram.bin
  • Now run microwatt, sending debug output to /dev/null:
./core_tb > /dev/null

Synthesis on Xilinx FPGAs using Vivado

  • Install Vivado (I'm using the free 2019.1 webpack edition).

  • Setup Vivado paths:

source /opt/Xilinx/Vivado/2019.1/settings64.sh
  • Install FuseSoC:
pip3 install --user -U fusesoc

Fedora users can get FuseSoC package via

sudo dnf copr enable sharkcz/danny
sudo dnf install fusesoc
  • If this is your first time using fusesoc, initialize fusesoc. This is needed to be able to pull down fussoc library components referenced by microwatt. Run
fusesoc init
fusesoc fetch uart16550
fusesoc library add microwatt /path/to/microwatt
  • Build using FuseSoC. For hello world (Replace nexys_video with your FPGA board such as --target=arty_a7-100): You may wish to ensure you have installed Digilent Board files or appropriate files for your board first.
fusesoc run --target=nexys_video microwatt --memory_size=16384 --ram_init_file=/path/to/microwatt/fpga/hello_world.hex

You should then be able to see output via the serial port of the board (/dev/ttyUSB1, 115200 for example assuming standard clock speeds). There is a know bug where initial output may not be sent - try the reset (not programming button) on your board if you don't see anything.

  • To build micropython (currently requires 1MB of BRAM eg an Artix-7 A200):
fusesoc run --target=nexys_video microwatt

Linux on Microwatt

Mainline Linux supports Microwatt as of v5.14. The Arty A7 is the best tested platform, but it's also been tested on the OrangeCrab and ButterStick.

  1. Use buildroot to create a userspace

    A small change is required to glibc in order to support the VMX/AltiVec-less Microwatt, as float128 support is mandiatory and for this in GCC requires VSX/AltiVec. This change is included in Joel's buildroot fork, along with a defconfig:

    git clone -b microwatt https://github.com/shenki/buildroot
    cd buildroot
    make ppc64le_microwatt_defconfig
    make
    

    The output is output/images/rootfs.cpio.

  2. Build the Linux kernel

    git clone https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
    cd linux
    make ARCH=powerpc microwatt_defconfig
    make ARCH=powerpc CROSS_COMPILE=powerpc64le-linux-gnu- \
      CONFIG_INITRAMFS_SOURCE=/buildroot/output/images/rootfs.cpio -j`nproc`
    

    The output is arch/powerpc/boot/dtbImage.microwatt.elf.

  3. Build gateware using FuseSoC

    First configure FuseSoC as above.

    fusesoc run --build --target=arty_a7-100 microwatt --no_bram --memory_size=0
    

    The output is build/microwatt_0/arty_a7-100-vivado/microwatt_0.bit.

  4. Program the flash

    This operation will overwrite the contents of your flash.

    For the Arty A7 A100, set FLASH_ADDRESS to 0x400000 and pass -f a100.

    For the Arty A7 A35, set FLASH_ADDRESS to 0x300000 and pass -f a35.

    microwatt/openocd/flash-arty -f a100 build/microwatt_0/arty_a7-100-vivado/microwatt_0.bit
    microwatt/openocd/flash-arty -f a100 dtbImage.microwatt.elf -t bin -a $FLASH_ADDRESS
    
  5. Connect to the second USB TTY device exposed by the FPGA

    minicom -D /dev/ttyUSB1
    

    The gateware has firmware that will look at FLASH_ADDRESS and attempt to parse an ELF there, loading it to the address specified in the ELF header and jumping to it.

Testing

  • A simple test suite containing random execution test cases and a couple of micropython test cases can be run with:
make -j$(nproc) check

Issues

  • There are a few instructions still to be implemented:
    • Vector/VMX/VSX
Description
A tiny Open POWER ISA softcore written in VHDL 2008
Readme 75 MiB
Languages
Verilog 79.8%
VHDL 14.8%
C 3.2%
Tcl 1.1%
Assembly 0.6%
Other 0.4%