1
0
mirror of https://github.com/antonblanchard/microwatt.git synced 2026-04-14 07:29:47 +00:00
Paul Mackerras b181d28df2 dcache: Cancel reservation on snooped store
This restructures the reservation machinery so that the reservation is
cleared when a snooped store by another agent is done to reservation
address.  The reservation address is now a real address rather than an
effective address.

For store-conditional, it is possible that a snooped store to the
reservation address could come in even after we have asserted cyc and
stb on the wishbone to do the store, and that should cause the store
not to be performed.  To achieve this, store-conditional now uses a
separate state in the r1 state machine, which is set up so that losing
the reservation due to a snooped store cause cyc and stb to be dropped
immediately, and the store-conditional fails.

For load-reserve, the reservation address is set at the end of cycle 1
and the reservation is made valid when the data is available.  For
lqarx, the reservation is made valid when the first doubleword of data
is available.

For the case where a snooped write comes in on cycle 0 of a larx and
hits the same cache line, we detect that the index and way of the
snooped write are the same as the index and way of the larx; it is
done this way because reservation.addr is not set until the real
address is available at the end of cycle 1.  A hit on the same index
and way causes reservation.valid to be set to 0 at the end of cycle 1.

For a write in cycle 1, we compare the latched address in cycle 2 with
the reservation address and clear reservation.valid at the end of
cycle 2 if they match.  In other words we compare the reservation
address with both the address being written this cycle and the address
being written in the previous cycle.

Signed-off-by: Paul Mackerras <paulus@ozlabs.org>
2024-12-28 18:57:00 +11:00
2024-04-09 14:22:01 +10:00
2024-12-20 20:32:30 +11:00
2024-04-01 18:09:43 +11:00
2024-04-09 14:22:01 +10:00
2019-10-08 21:02:46 -07:00
2024-04-01 18:04:44 +11:00
2024-12-20 22:24:31 +11:00
2022-10-24 21:39:00 +11:00
2022-09-05 00:24:49 +10:00
2024-12-20 22:24:31 +11:00
2022-10-31 14:41:15 +08:00
2021-03-22 10:55:32 +11:00
2021-03-22 10:55:32 +11:00
2024-12-20 20:32:30 +11:00
2021-03-22 10:55:32 +11:00
2021-08-09 11:57:00 +10:00
2022-10-31 14:41:15 +08:00
2024-12-20 22:24:20 +11:00
2019-09-19 20:33:58 +10:00
2023-07-06 19:39:40 +10:00
2019-08-22 16:46:13 +10:00
2024-12-20 22:24:31 +11:00
2023-09-19 17:34:47 +10:00
2022-07-28 10:16:50 +10:00
2021-08-09 11:57:00 +10:00
2020-01-22 14:50:45 +11:00
2019-09-19 20:28:37 +10:00
2020-01-22 14:50:45 +11:00
2020-06-13 11:33:41 +10:00
2020-01-22 14:50:45 +11:00
2020-01-22 14:50:45 +11:00
2024-12-20 20:32:30 +11:00
2022-10-31 14:41:15 +08:00
2024-12-20 22:24:20 +11:00

Microwatt

Microwatt

A tiny Open POWER ISA softcore written in VHDL 2008. It aims to be simple and easy to understand.

Simulation using ghdl

MicroPython running on Microwatt

You can try out Microwatt/Micropython without hardware by using the ghdl simulator. If you want to build directly for a hardware target board, see below.

  • Build micropython. If you aren't building on a ppc64le box you will need a cross compiler. If it isn't available on your distro grab the powerpc64le-power8 toolchain from https://toolchains.bootlin.com. You may need to set the CROSS_COMPILE environment variable to the prefix used for your cross compilers. The default is powerpc64le-linux-gnu-.
git clone https://github.com/micropython/micropython.git
cd micropython
cd ports/powerpc
make -j$(nproc)
cd ../../../

A prebuilt micropython image is also available in the micropython/ directory.

  • Microwatt uses ghdl for simulation. Either install this from your distro or build it. Microwatt requires ghdl to be built with the LLVM or gcc backend, which not all distros do (Fedora does, Debian/Ubuntu appears not to). ghdl with the LLVM backend is likely easier to build.

    If building ghdl from scratch is too much for you, the microwatt Makefile supports using Docker or Podman.

  • Next build microwatt:

git clone https://github.com/antonblanchard/microwatt
cd microwatt
make

To build using Docker:

make DOCKER=1

and to build using Podman:

make PODMAN=1
  • Link in the micropython image:
ln -s ../micropython/ports/powerpc/build/firmware.bin main_ram.bin

Or if you were using the pre-built image:

ln -s micropython/firmware.bin main_ram.bin
  • Now run microwatt, sending debug output to /dev/null:
./core_tb > /dev/null

Synthesis on Xilinx FPGAs using Vivado

  • Install Vivado (I'm using the free 2019.1 webpack edition).

  • Setup Vivado paths:

source /opt/Xilinx/Vivado/2019.1/settings64.sh
  • Install FuseSoC:
pip3 install --user -U fusesoc

Fedora users can get FuseSoC package via

sudo dnf copr enable sharkcz/danny
sudo dnf install fusesoc
  • If this is your first time using fusesoc, initialize fusesoc. This is needed to be able to pull down fussoc library components referenced by microwatt. Run
fusesoc init
fusesoc fetch uart16550
fusesoc library add microwatt /path/to/microwatt
  • Build using FuseSoC. For hello world (Replace nexys_video with your FPGA board such as --target=arty_a7-100): You may wish to ensure you have installed Digilent Board files or appropriate files for your board first.
fusesoc run --target=nexys_video microwatt --memory_size=16384 --ram_init_file=/path/to/microwatt/fpga/hello_world.hex

You should then be able to see output via the serial port of the board (/dev/ttyUSB1, 115200 for example assuming standard clock speeds). There is a know bug where initial output may not be sent - try the reset (not programming button) on your board if you don't see anything.

  • To build micropython (currently requires 1MB of BRAM eg an Artix-7 A200):
fusesoc run --target=nexys_video microwatt

Linux on Microwatt

Mainline Linux supports Microwatt as of v5.14. The Arty A7 is the best tested platform, but it's also been tested on the OrangeCrab and ButterStick.

  1. Use buildroot to create a userspace

    A small change is required to glibc in order to support the VMX/AltiVec-less Microwatt, as float128 support is mandiatory and for this in GCC requires VSX/AltiVec. This change is included in Joel's buildroot fork, along with a defconfig:

    git clone -b microwatt https://github.com/shenki/buildroot
    cd buildroot
    make ppc64le_microwatt_defconfig
    make
    

    The output is output/images/rootfs.cpio.

  2. Build the Linux kernel

    git clone https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
    cd linux
    make ARCH=powerpc microwatt_defconfig
    make ARCH=powerpc CROSS_COMPILE=powerpc64le-linux-gnu- \
      CONFIG_INITRAMFS_SOURCE=/buildroot/output/images/rootfs.cpio -j`nproc`
    

    The output is arch/powerpc/boot/dtbImage.microwatt.elf.

  3. Build gateware using FuseSoC

    First configure FuseSoC as above.

    fusesoc run --build --target=arty_a7-100 microwatt --no_bram --memory_size=0
    

    The output is build/microwatt_0/arty_a7-100-vivado/microwatt_0.bit.

  4. Program the flash

    This operation will overwrite the contents of your flash.

    For the Arty A7 A100, set FLASH_ADDRESS to 0x400000 and pass -f a100.

    For the Arty A7 A35, set FLASH_ADDRESS to 0x300000 and pass -f a35.

    microwatt/openocd/flash-arty -f a100 build/microwatt_0/arty_a7-100-vivado/microwatt_0.bit
    microwatt/openocd/flash-arty -f a100 dtbImage.microwatt.elf -t bin -a $FLASH_ADDRESS
    
  5. Connect to the second USB TTY device exposed by the FPGA

    minicom -D /dev/ttyUSB1
    

    The gateware has firmware that will look at FLASH_ADDRESS and attempt to parse an ELF there, loading it to the address specified in the ELF header and jumping to it.

Testing

  • A simple test suite containing random execution test cases and a couple of micropython test cases can be run with:
make -j$(nproc) check

Issues

  • There are a few instructions still to be implemented:
    • Vector/VMX/VSX
Description
A tiny Open POWER ISA softcore written in VHDL 2008
Readme 76 MiB
Languages
Verilog 79.6%
VHDL 14.9%
C 3.2%
Tcl 1.2%
Assembly 0.6%
Other 0.4%