pli/ide/pli_ide.c

@@ -44,7 +44,7 @@ static struct state_s {
     int fifo_rd;
     int fifo_wr;
     int fifo_depth;
-    unsigned short fifo[256 * 64];
+    unsigned short fifo[256 * 128];
 
     int file_inited;
     int file_fd;
@@ -120,7 +120,7 @@ do_ide_read(struct state_s *s)
         ((s->reg_cyllow & 0xff) << 8) |
         (s->reg_secnum & 0xff);
 
-    vpi_printf("pli_ide: lba %08x (%d), seccnt %d\n",
+    vpi_printf("pli_ide: lba %08x (%d), seccnt %d (read)\n",
                s->lba, s->lba*512,s->reg_seccnt);
 
     ret = lseek(s->file_fd, (off_t)s->lba*512, SEEK_SET);
@@ -135,6 +135,40 @@ do_ide_read(struct state_s *s)
     s->status = (1<<IDE_STATUS_DRDY)|(1<<IDE_STATUS_DSC) | (1<<IDE_STATUS_DRQ);
 }
 
+static void
+do_ide_write(struct state_s *s)
+{
+    s->lba =
+        ((s->reg_drvhead & 0x0f) << 24) |
+        ((s->reg_cylhigh & 0xff) << 16) |
+        ((s->reg_cyllow & 0xff) << 8) |
+        (s->reg_secnum & 0xff);
+
+    vpi_printf("pli_ide: write prep\n");
+
+    s->fifo_depth = (512 * s->reg_seccnt) / 2;
+    s->fifo_rd = 0;
+    s->fifo_wr = 0;
+
+    s->status = (1<<IDE_STATUS_DRDY)|(1<<IDE_STATUS_DSC) | (1<<IDE_STATUS_DRQ);
+}
+
+static void
+do_ide_write_done(struct state_s *s)
+{
+    int ret;
+
+    vpi_printf("pli_ide: lba %08x (%d), seccnt %d (write)\n",
+               s->lba, s->lba*512, s->reg_seccnt);
+
+    ret = lseek(s->file_fd, (off_t)s->lba*512, SEEK_SET);
+    ret = write(s->file_fd, (char *)s->fifo, 512 * s->reg_seccnt);
+    if (ret < 0)
+        perror("write");
+
+    s->status = (1<<IDE_STATUS_DRDY)|(1<<IDE_STATUS_DSC);
+}
+
 /*
  *
  */
@@ -280,11 +314,21 @@ PLI_INT32 pli_ide(void)
             break;
 
         case ATA_DATA:
-            if (1) vpi_printf("pli_ide: write data %04x %s\n", bus, bus_bits);
+            s->fifo[s->fifo_wr] = bus;
+
+            if (0) vpi_printf("pli_ide: write data [%d/%d] %o\n",
+                              s->fifo_wr, s->fifo_depth, bus);
+
+            if (s->fifo_wr < s->fifo_depth)
+                s->fifo_wr++;
+
+            if (s->fifo_wr >= s->fifo_depth) {
+                do_ide_write_done(s);
+            }
             break;
 
         case ATA_COMMAND:
-            vpi_printf("pli_ide: command %04x %s\n", bus, bus_bits);
+            vpi_printf("pli_ide: command %04x\n", bus);
             switch (bus) {
             case 0x0020:
                 vpi_printf("pli_ide: XXX READ\n");
@@ -292,6 +336,7 @@ PLI_INT32 pli_ide(void)
                 break;
             case 0x0030:
                 vpi_printf("pli_ide: XXX WRITE\n");
+                do_ide_write(s);
                 break;
             }
             break;

pli/rf/pli_ram.c

@@ -21,16 +21,21 @@
 
 typedef unsigned short u16;
 
-static char last_ce_bit;
-static char last_we_bit;
+static char last_rd_bit;
+static char last_wr_bit;
 static unsigned last_addr;
+static int rom_enabled;
+static int rom_disabling;
 
 static vpiHandle do_aref;
 static int mem_init;
 u16 *M;
 
+/*
 static char *instnam_tab[10]; 
 static int last_evh;
+*/
+extern int running_cver;
 
 void do_mem_preload(char *fn)
 {
@@ -51,7 +56,7 @@ void do_mem_init(void)
 
     vpi_printf("pli_ram: allocate memory array\n");
 
-    M = (u16 *)malloc(1024*32);
+    M = (u16 *)malloc(1024*32*2);
     mem_init = 1;
 
     for (i = 0; i < 32768; i++)
@@ -60,6 +65,7 @@ void do_mem_init(void)
     if (0) do_mem_preload("test1.mem");
 }
 
+#if 0
 static int getadd_inst_id(vpiHandle mhref)
 {
     register int i;
@@ -80,21 +86,24 @@ static int getadd_inst_id(vpiHandle mhref)
 
     return(last_evh);
 } 
+#endif
 
 PLI_INT32 pli_ram(void)
 {
-    vpiHandle href, iter, mhref;
-    vpiHandle clkref, resetref, aref, diref, doref, ceref, weref;
+    vpiHandle href, iter/*, mhref*/;
+    vpiHandle resetref, aref, diref, doref, rdref, wrref;
     s_vpi_value tmpval, outval;
     int numargs, inst_id;
 
-    char clk_bit, reset_bit;
+    char reset_bit;
     char di_bits[17], do_bits[17];
-    char ce_bit, we_bit;
+    char rd_bit, wr_bit;
     unsigned int a, datai;
 
     int read_start, read_stop, write_start, write_stop, addr_change;
 
+    if (0) vpi_printf("pli_ram: entry\n");
+
     if (M == 0/*!mem_init*/) {
         do_mem_init();
     }
@@ -125,35 +134,31 @@ PLI_INT32 pli_ram(void)
 
     numargs = vpi_get(vpiSize, iter);
 
-    /* clk, reset, a, di, do, ce, we */
-    clkref = vpi_scan(iter);
+    /* reset, a, di, do, rd, wr */
     resetref = vpi_scan(iter);
     aref = vpi_scan(iter);
     diref = vpi_scan(iter);
     doref = vpi_scan(iter);
-    ceref = vpi_scan(iter);
-    weref = vpi_scan(iter);
+    rdref = vpi_scan(iter);
+    wrref = vpi_scan(iter);
 
-    vpi_free_object(iter);
+//    vpi_free_object(iter);
     vpi_free_object(href);
 
-    if (clkref == NULL || resetref == NULL || aref == NULL ||
-	diref == NULL || doref == NULL || ceref == NULL ||
-	weref == NULL)
+    if (resetref == NULL || aref == NULL ||
+	diref == NULL || doref == NULL || rdref == NULL ||
+	wrref == NULL)
     {
         vpi_printf("**ERR: $pli_ram bad args\n");
         return(0);
     }
 
     /* */
-    tmpval.format = vpiBinStrVal; 
-    vpi_get_value(clkref, &tmpval);
-    clk_bit = tmpval.value.str[0];
-
     tmpval.format = vpiBinStrVal; 
     vpi_get_value(resetref, &tmpval);
     reset_bit = tmpval.value.str[0];
 
+    memset(&tmpval, 0, sizeof(tmpval));
     tmpval.format = vpiIntVal; 
     vpi_get_value(aref, &tmpval);
     a = tmpval.value.integer;
@@ -170,13 +175,15 @@ PLI_INT32 pli_ram(void)
     vpi_get_value(doref, &tmpval);
     strcpy(do_bits, tmpval.value.str);
 
+    memset(&tmpval, 0, sizeof(tmpval));
     tmpval.format = vpiBinStrVal; 
-    vpi_get_value(ceref, &tmpval);
-    ce_bit = tmpval.value.str[0];
+    vpi_get_value(rdref, &tmpval);
+    rd_bit = tmpval.value.str[0];
 
+    memset(&tmpval, 0, sizeof(tmpval));
     tmpval.format = vpiBinStrVal; 
-    vpi_get_value(weref, &tmpval);
-    we_bit = tmpval.value.str[0];
+    vpi_get_value(wrref, &tmpval);
+    wr_bit = tmpval.value.str[0];
 
     /* */
     read_start = 0;
@@ -188,23 +195,27 @@ PLI_INT32 pli_ram(void)
     if (a != last_addr)
         addr_change = 1;
 
-    if (we_bit != last_we_bit || addr_change) {
-        if (we_bit == '0') write_start = 1;
-        if (we_bit == '1') write_stop = 1;
+    if (wr_bit != last_wr_bit || addr_change) {
+        if (wr_bit == '1') write_start = 1;
+        if (wr_bit == '0') write_stop = 1;
     }
 
-    if (ce_bit != last_ce_bit || write_stop || addr_change) {
-        if (ce_bit == '0') read_start = 1;
-        if (ce_bit == '1') read_stop = 1;
+    if (rd_bit != last_rd_bit || write_stop || addr_change) {
+        if (rd_bit == '1') read_start = 1;
+        if (rd_bit == '0') read_stop = 1;
     }
 
-    last_ce_bit = ce_bit;
-    last_we_bit = we_bit;
+    last_rd_bit = rd_bit;
+    last_wr_bit = wr_bit;
     last_addr = a;
 
-    if (0) vpi_printf("pli_ram: clk %c ce %c we %c\n", clk_bit, ce_bit, we_bit);
+    if (0) vpi_printf("pli_ram: rd %c wr %c\n", rd_bit, wr_bit);
 
-    if (reset_bit == '1') vpi_printf("pli_ram: reset\n");
+    if (reset_bit == '1') {
+        vpi_printf("pli_ram: reset\n");
+        rom_enabled = 1;
+        rom_disabling = 0;
+    }
 
     if (0) {
         if (read_start) vpi_printf("pli_ram: read start\n");
@@ -215,10 +226,10 @@ PLI_INT32 pli_ram(void)
 
     /* */
     if (write_start) {
-        //vpi_printf("pli_ram: write %o <- %o\n", a, datai);
+        if (1) vpi_printf("pli_ram: write %o <- %o\n", a, datai);
 
         if (a > 1024*1024) {
-            vpi_printf("pli_ram: write, address error %x\n", a);
+            vpi_printf("pli_ram: write, address error %o\n", a);
             while (1);
         }
 
@@ -233,16 +244,57 @@ PLI_INT32 pli_ram(void)
             while (1);
         }
 
-        value = M[a];
+#if 1
+        if (rom_enabled) {
+            switch (a) {
+                // copy tss8 bootstrap to ram and jump to it
+                // (see ../rom/rom.pal)
+	    case 07400: value = 07240; break;
+	    case 07401: value = 01224; break;
+	    case 07402: value = 03010; break;
+	    case 07403: value = 01217; break;
+	    case 07404: value = 03410; break;
+	    case 07405: value = 01220; break;
+	    case 07406: value = 03410; break;
+	    case 07407: value = 01221; break;
+	    case 07410: value = 03410; break;
+	    case 07411: value = 01222; break;
+	    case 07412: value = 03410; break;
+	    case 07413: value = 01223; break;
+	    case 07414: value = 03410; break;
+	    case 07415: value = 07300; break;
+	    case 07416: value = 05624; break;
+	    case 07417: value = 07600; break;
+	    case 07420: value = 06603; break;
+	    case 07421: value = 06622; break;
+	    case 07422: value = 05352; break;
+	    case 07423: value = 05752; break;
+	    case 07424: value = 07750; break;
+            default: value = M[a]; break;
+            }
 
-        //vpi_printf("pli_ram: read %o -> %o\n", a, value);
+            if (a == 07416)
+                rom_disabling = 1;
 
-#ifdef __CVER__
-        if (do_aref == 0)
-            do_aref = vpi_put_value(doref, NULL, NULL, vpiAddDriver);
-#else
-        do_aref = doref;
+            if (rom_disabling)
+                rom_disabling++;
+
+            if (rom_disabling == 3) {
+                rom_enabled = 0;
+            }
+        } else
 #endif
+        {
+            value = M[a];
+        }
+
+        if (1) vpi_printf("pli_ram: read %o -> %o\n", a, value);
+
+//        if (running_cver) {
+//            if (do_aref == 0)
+//                do_aref = vpi_put_value(doref, NULL, NULL, vpiAddDriver);
+//        } else
+            do_aref = doref;
 
         outval.format = vpiIntVal;
         outval.value.integer = value;
@@ -250,23 +302,27 @@ PLI_INT32 pli_ram(void)
         vpi_put_value(do_aref, &outval, NULL, vpiNoDelay);
     }
 
-    if (read_stop) {
-        outval.format = vpiBinStrVal;
-//        outval.value.str = "16'bzzzzzzzzzzzzzzzz";
-        outval.value.str = "16'b0000000000000000";
-        if (do_aref)
-            vpi_put_value(do_aref, &outval, NULL, vpiNoDelay);
-    }
+//    if (read_stop) {
+//        outval.format = vpiBinStrVal;
+//        outval.value.str = "16'b0000000000000000";
+//        if (do_aref)
+//            vpi_put_value(do_aref, &outval, NULL, vpiNoDelay);
+//    }
 
-    vpi_free_object(clkref);
+#if 0
     vpi_free_object(resetref);
     vpi_free_object(aref);
     vpi_free_object(diref);
     vpi_free_object(doref);
-    vpi_free_object(ceref);
-    vpi_free_object(weref);
+    vpi_free_object(rdref);
+    vpi_free_object(wrref);
+#endif
 
-    return(0);
+    vpi_free_object(iter);
+
+    if (0) vpi_printf("pli_ram: exit\n");
+
+    return 0;
 }