Josh Dersch
01755df8c2
Further cleanup, implementation of missing commands.
2020-04-02 02:55:33 +02:00
Josh Dersch
06b2a6ebc9
Major refactoring for overlapped-seeks. Moved most of the RP drive logic to rp_drive_c,
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where I should have put it to begin with. Working better, still a few glitches to track
down and a number of register bits that need to be hooked up properly.
2020-04-01 01:56:11 +02:00
Josh Dersch
8906fe3485
Code cleanup/simplification. Moved stuff out to rp_drive_c that belonged there.
2020-03-30 21:13:15 +02:00
Josh Dersch
b6f933a4a2
Small cleanup, implemented most of the remaining rp04/05/06 functions. Prep for supporting multiple drives.
2020-03-27 19:12:51 +01:00
Josh Dersch
828e4f5371
RH11 now runs 2.11bsd reliably; interrupt priority was mistakenly set to 6 instead of 5. Fixed.
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Cleaned up bizarre formatting screwups in rk11/rk05 and mscp code, along with other general cleanups.
2020-03-26 09:02:21 +01:00
Josh Dersch
e037b0d36d
Added dato_mask to allow discerning DATOB operations to emulated registers.
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This allows the RH11's RHCS1 register to function properly. 2.11BSD now boots!
2020-03-25 07:06:54 +01:00
Josh Dersch
6bc7703e63
Cleanup, modifications while trying to get diagnostics to pass.
2020-03-24 01:39:31 +01:00
Josh Dersch
f2b6ece8f1
Status bit fixes; 2.11BSD gets a bit further.
2020-02-03 02:44:09 +01:00
Josh Dersch
a72a845623
Slow progress. RH11 can now boot 2.11BSD and load the kernel into memory; XP driver then fails
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to read the label block, though it looks like the proper transfers take place.
Minor code cleanup.
2020-01-29 02:03:35 +01:00
Josh Dersch
311b5f48a7
Further RH11/RP0x implementation. Boots 2.11BSD then falls over; code is currently a tangly mess.
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Started cleanup of old code that got mangled by someone running "indent" over it. Ugh.
2020-01-25 03:09:49 +01:00
Josh Dersch
a2c8d6f2bc
Initial commit of work-in-progress RH11 (MASSBUS) emulation.
2020-01-10 03:27:08 +01:00
Joerg Hoppe
20997cc123
allow non-standard clock frequencies
2019-12-21 15:42:41 +01:00
Joerg Hoppe
b2a79c5221
Cleanup
2019-12-19 10:30:45 +01:00
Joerg Hoppe
d70ab0566c
CPU20 diag in comments
2019-12-08 18:00:12 +01:00
Joerg Hoppe
48f10ed34b
removed RL02 test images from repository
2019-11-01 14:21:39 +01:00
Joerg Hoppe
b3293be2e3
removed big documentation PDFs from repository
2019-11-01 14:11:48 +01:00
Joerg Hoppe
6c9f41dd2b
PRU generated wrong GRANT OUT on REQUEST
2019-11-01 12:33:57 +01:00
Joerg Hoppe
6751f13c91
Removed documenation scans from git repository (faster update)
2019-10-08 19:35:51 +02:00
Joerg Hoppe
10f0540c4a
CPU20 WAIT
2019-10-08 15:05:37 +02:00
Joerg Hoppe
3f71d6f093
CPU20 UNIBUS Interrupt, Experiments to probe UNIBUS arbitrator
2019-10-08 12:36:36 +02:00
Joerg Hoppe
f314317e2a
DMA/INTR arbitration rework, emulated CPU20 with DMA&INTR, runs XXDP
2019-10-04 12:45:26 +02:00
Joerg Hoppe
cef911f70b
Better integration of CPU20 into UniBone framework
2019-09-26 07:42:59 +02:00
Joerg Hoppe
b2d944f9cd
First successful iNTR on emulated CPU20
2019-09-23 13:42:47 +02:00
Joerg Hoppe
47bf827c52
typo
2019-09-19 14:06:06 +02:00
Joerg Hoppe
e46b26b497
DL11 / KW11 ZDLD and RSX11 OK
2019-09-19 10:56:43 +02:00
Joerg Hoppe
92714c1ebe
Test "MultiArb": parallel INTR and DMA of DL11,RL11,RK11.
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Also MSCP IOX.
2019-09-02 15:46:54 +02:00
Joerg Hoppe
f13b35bc08
KW11 LKS line monitor bit can only be cleared
2019-08-31 17:29:48 +02:00
Joerg Hoppe
30df58f42c
fix baudrate bit width
2019-08-30 13:38:34 +02:00
Joerg Hoppe
d058310e53
CPU20 power start/power fail
2019-08-27 19:05:41 +02:00
Joerg Hoppe
6f2adbd216
levelchange(PSW) on RTI
2019-08-27 13:31:37 +02:00
Joerg Hoppe
ea91180f28
Connected CPU20 to INTR,INIT,Power ON/OFF.
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PRU INTR routing still do to.
2019-08-25 09:17:28 +02:00
Joerg Hoppe
3d1d9d3cf6
ACLO/DCLO/INIT moved from PRU to ARM
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INTR/DMA request params linked to device params on change
2019-08-19 13:12:42 +02:00
Joerg Hoppe
8ff33a0be1
Infrastructure for emulated CPUs: Bus arbitrator, Interrupt fielding processor
2019-08-16 19:04:12 +02:00
Josh Dersch
6f1b476716
Cleaned up signaling of DMA/INTR completion (using pthread_cond_wait).
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Tweaked MSYN timeout value from 350ns to 400ns to compensate for timing changes
with latest PRU code -- MSCP works reliably on PDP-11/84 again.
2019-08-16 02:23:32 +02:00
Josh Dersch
073a2334b6
Fixes for MSCP after Joerg's INTR/DMA rewrites:
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- Fixed programmable interrupt vector (was broken after changes)
- Fixed interrupts during MSCP 4-stage init to atomically update SA register; 4.3bsd now boots.
2019-08-14 09:46:32 +02:00
Josh Dersch
1d4fe694ae
Merge remote-tracking branch 'upstream/master'
2019-08-12 17:28:19 -07:00
Joerg Hoppe
7eaa7c0729
RL11 changed to atomically INTR/CSR write. Passes exerciser ZRLKB3 now for 2h.
2019-08-12 12:21:56 +02:00
Joerg Hoppe
5ba6142b52
cleanup
2019-08-10 12:10:44 +02:00
Joerg Hoppe
39caffd6e6
Emulated DL11: stream interface parallel to RS232.
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demo: "dl11 rcv" and "dl11 wait" script extension
cleanup
2019-08-10 10:19:05 +02:00
Joerg Hoppe
313957631f
Cleanup, fixes Interrupt logic, RL11 tests
2019-08-08 07:32:08 +02:00
Joerg Hoppe
974aeed8eb
Big summer rework:
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Interrupt and DMA system now handles multiple levels and multiple devices in parallel
Interrupt Register changes synced with INTR transaction
DL11 and KW11 clock pass the ZDLDI0 diagnostic.
Devices can now be enabled and disabled individually.
2019-08-02 16:45:54 +02:00
Joerg Hoppe
04869fb46f
PRU statemachines easier to control from main thread
2019-07-02 07:09:01 +02:00
Joerg Hoppe
e23b2cf4d3
Dl11w rcv intr
2019-06-26 07:48:31 +02:00
Joerg Hoppe
01efdee04a
DL11W interrupt tests&fixes
2019-06-25 16:47:17 +02:00
Joerg Hoppe
81c3295e31
DL11 cleanup&fixes
2019-06-24 17:25:20 +02:00
Joerg Hoppe
28ab69050c
break enable, maintenance loopback
2019-06-24 14:51:18 +02:00
Joerg Hoppe
b749ce5897
SLU compiles, minimal function
2019-06-24 12:03:47 +02:00
Joerg Hoppe
4062386b97
Multiple parallel instances of device::worker() possible
2019-06-23 12:00:13 +02:00
Joerg Hoppe
3952cb93b0
Enable devices individually over param "enabled"
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UNIBUS addr, intr vector, level setable
2019-06-20 21:58:04 +02:00
Joerg Hoppe
264f6e5085
Cleanup incomplete commits
2019-06-18 21:03:02 +02:00
