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90ddeb54d67c97d22f9ed451e472b762d7a5d84c
lowobservable.coax/interface2/rtl
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Andrew Kay 90ddeb54d6 Work in progress
2020-07-05 13:00:46 -05:00
..
.gitignore
Verilog templating
2020-02-04 22:11:14 -06:00
coax_rx_bit_timer.v
testing rx_coax_bit_timer on TinyFPGA
2020-06-21 18:52:21 -05:00
coax_rx.v
Work in progress
2020-07-05 13:00:46 -05:00
Makefile
wip
2020-06-16 16:53:53 -05:00
pins.pcf
testing rx_coax_bit_timer on TinyFPGA
2020-06-21 18:52:21 -05:00
top.v
testing rx_coax_bit_timer on TinyFPGA
2020-06-21 18:52:21 -05:00