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sim: sim_halfword: handle HRRO/HRROI/HRROM/HRROS, add unit tests
This commit is contained in:
Mikael Pettersson
parent
ba24bbbbf1
commit
757e25e922
@ -357,6 +357,10 @@ dispatch(Core, Mem, IR, EA) ->
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8#551 -> sim_moves:handle_MOVEI(Core, Mem, IR, EA); % HRRZI = MOVEI
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8#552 -> sim_halfword:handle_HRRZM(Core, Mem, IR, EA);
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8#553 -> sim_halfword:handle_HRRZS(Core, Mem, IR, EA);
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8#560 -> sim_halfword:handle_HRRO(Core, Mem, IR, EA);
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8#561 -> sim_halfword:handle_HRROI(Core, Mem, IR, EA);
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8#562 -> sim_halfword:handle_HRROM(Core, Mem, IR, EA);
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8#563 -> sim_halfword:handle_HRROS(Core, Mem, IR, EA);
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_ ->
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PC = (Core#core.pc_section bsl 18) bor Core#core.pc_offset,
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{Core, Mem, {error, {?MODULE, {dispatch, PC, IR, EA}}}}
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@ -56,6 +56,10 @@
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, handle_HRR/4
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, handle_HRRI/4
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, handle_HRRM/4
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, handle_HRRO/4
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, handle_HRROI/4
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, handle_HRROM/4
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, handle_HRROS/4
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, handle_HRRS/4
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, handle_HRRZ/4
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, handle_HRRZM/4
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@ -500,6 +504,49 @@ handle_HRRZS(Core, Mem, IR, EA) ->
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fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
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end.
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%% HRRO - Half Word Right to Right, Ones
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-spec handle_HRRO(#core{}, sim_mem:mem(), IR :: word(), #ea{})
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-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
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handle_HRRO(Core, Mem, IR, EA) ->
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case sim_core:c(Core, Mem, EA) of
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{ok, CE} ->
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AC = IR band 8#17,
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Word = set_right_ones(get_right(CE)),
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sim_core:next_pc(sim_core:set_ac(Core, AC, Word), Mem);
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{error, Reason} ->
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sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
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fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
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end.
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-spec handle_HRROI(#core{}, sim_mem:mem(), IR :: word(), #ea{})
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-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
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handle_HRROI(Core, Mem, IR, EA) ->
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AC = IR band 8#17,
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Word = set_right_ones(EA#ea.offset),
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sim_core:next_pc(sim_core:set_ac(Core, AC, Word), Mem).
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-spec handle_HRROM(#core{}, sim_mem:mem(), IR :: word(), #ea{})
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-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
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handle_HRROM(Core, Mem, IR, EA) ->
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AC = IR band 8#17,
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CA = sim_core:get_ac(Core, AC),
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Word = set_right_ones(get_right(CA)),
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handle_writeback(Core, Mem, EA, Word).
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-spec handle_HRROS(#core{}, sim_mem:mem(), IR :: word(), #ea{})
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-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
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handle_HRROS(Core, Mem, IR, EA) ->
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case sim_core:c(Core, Mem, EA) of
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{ok, CE} ->
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AC = IR band 8#17,
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Word = set_right_ones(get_right(CE)),
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handle_writeback(Core, Mem, AC, EA, Word);
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{error, Reason} ->
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sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
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fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
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end.
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%% Miscellaneous ===============================================================
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handle_writeback(Core, Mem, EA, Word) ->
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@ -539,3 +586,5 @@ set_left_ones(Left) -> (Left bsl 18) bor ((1 bsl 18) - 1).
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set_left_zeros(Left) -> Left bsl 18.
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set_right(Word, Right) -> (Word band (((1 bsl 18) - 1) bsl 18)) bor Right.
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set_right_ones(Right) -> (((1 bsl 18) - 1) bsl 18) bor Right.
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@ -85,6 +85,10 @@
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-define(OP_HRRZI, 8#551).
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-define(OP_HRRZM, 8#552).
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-define(OP_HRRZS, 8#553).
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-define(OP_HRRO, 8#560).
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-define(OP_HRROI, 8#561).
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-define(OP_HRROM, 8#562).
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-define(OP_HRROS, 8#563).
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%% 2.8 Half-Word Data Transmission =============================================
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@ -689,6 +693,64 @@ hrrzs_no_ac_test() ->
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, {#ea{section = 1, offset = 0, islocal = false}, ?COMMA2(1, 0)} % AC0 = 1,,0
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]).
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%% HRRO - Half Word Right to Right, Ones
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hrro_test() ->
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Prog =
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[ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 1)} % 1,,100/ MOVEI 1,1
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, {1, 8#101, ?INSN(?OP_HRRO, 1, 0, 0, 8#200)} % 1,,101/ HRRO 1,200
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, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
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, {1, 8#200, ?COMMA2(0, 2)} % 1,,200/ 0,,2
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],
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expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
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[ {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(-1, 2)} % AC1 = -1,,2
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]).
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hrroi_test() ->
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Prog =
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[ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 1)} % 1,,100/ MOVEI 1,1
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, {1, 8#101, ?INSN(?OP_HRROI, 1, 0, 0, 2)} % 1,,101/ HRROI 1,2
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, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
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],
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expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
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[ {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(-1, 2)} % AC1 = -1,,2
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]).
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hrrom_test() ->
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Prog =
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[ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 2)} % 1,,100/ MOVEI 1,2
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, {1, 8#101, ?INSN(?OP_HRROM, 1, 0, 0, 8#200)} % 1,,101/ HRROM 1,200
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, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
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, {1, 8#200, ?COMMA2(0, 1)} % 1,,200/ 0,,1
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],
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expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
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[ {#ea{section = 1, offset = 8#200, islocal = false}, ?COMMA2(-1, 2)} % C(1,,200) = -1,,2
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]).
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hrros_ac_test() ->
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Prog =
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[ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 1)} % 1,,100/ MOVEI 1,1
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, {1, 8#101, ?INSN(?OP_HRROS, 1, 0, 0, 8#200)} % 1,,101/ HRROS 1,200
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, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
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, {1, 8#200, ?COMMA2(0, 2)} % 1,,200/ 0,,2
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],
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expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
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[ {#ea{section = 1, offset = 8#200, islocal = false}, ?COMMA2(-1, 2)} % C(1,,200) = -1,,2
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, {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(-1, 2)} % AC1 = -1,,2
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]).
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hrros_no_ac_test() ->
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Prog =
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[ {1, 8#100, ?INSN(?OP_MOVEI, 0, 0, 0, 1)} % 1,,100/ MOVEI 0,1
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, {1, 8#101, ?INSN(?OP_HRROS, 1, 0, 0, 8#200)} % 1,,101/ HRROS 1,200
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, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
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, {1, 8#200, ?COMMA2(0, 2)} % 1,,200/ 0,,2
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],
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expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
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[ {#ea{section = 1, offset = 8#200, islocal = false}, ?COMMA2(-1, 2)} % C(1,,200) = -1,,2
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, {#ea{section = 1, offset = 0, islocal = false}, ?COMMA2(0, 1)} % AC0 = 0,,1
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]).
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%% Common code to run short sequences ==========================================
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expect(Prog, ACs, ExpectedPC, ExpectedFlags, ExpectedEs) ->
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