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sim: sim_halfword: handle HLLE/HLLEM/HLLES, sim_core: handle HLLEI as SETZ, add unit tests
This commit is contained in:
Mikael Pettersson
parent
0de3b9c6ad
commit
e22c1c10a2
@ -329,6 +329,10 @@ dispatch(Core, Mem, IR, EA) ->
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8#521 -> sim_halfword:handle_HLLOI(Core, Mem, IR, EA);
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8#522 -> sim_halfword:handle_HLLOM(Core, Mem, IR, EA);
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8#523 -> sim_halfword:handle_HLLOS(Core, Mem, IR, EA);
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8#530 -> sim_halfword:handle_HLLE(Core, Mem, IR, EA);
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8#531 -> sim_boolean:handle_SETZ(Core, Mem, IR, EA); % HLLEI = HLLZI = SETZ
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8#532 -> sim_halfword:handle_HLLEM(Core, Mem, IR, EA);
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8#533 -> sim_halfword:handle_HLLES(Core, Mem, IR, EA);
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_ ->
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PC = (Core#core.pc_section bsl 18) bor Core#core.pc_offset,
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{Core, Mem, {error, {?MODULE, {dispatch, PC, IR, EA}}}}
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@ -25,6 +25,9 @@
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-module(sim_halfword).
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-export([ handle_HLL/4
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, handle_HLLE/4
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, handle_HLLEM/4
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, handle_HLLES/4
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, handle_HLLI/4
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, handle_HLLM/4
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, handle_HLLS/4
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@ -181,6 +184,42 @@ handle_HLLOS(Core, Mem, IR, EA) ->
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fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
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end.
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%% HLLE - Half Word Left to Left, Extend
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-spec handle_HLLE(#core{}, sim_mem:mem(), IR :: word(), #ea{})
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-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
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handle_HLLE(Core, Mem, IR, EA) ->
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case sim_core:c(Core, Mem, EA) of
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{ok, CE} ->
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AC = IR band 8#17,
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Word = set_left_extend(get_left(CE)),
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sim_core:next_pc(sim_core:set_ac(Core, AC, Word), Mem);
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{error, Reason} ->
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sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
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fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
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end.
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-spec handle_HLLEM(#core{}, sim_mem:mem(), IR :: word(), #ea{})
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-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
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handle_HLLEM(Core, Mem, IR, EA) ->
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AC = IR band 8#17,
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CA = sim_core:get_ac(Core, AC),
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Word = set_left_extend(get_left(CA)),
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handle_writeback(Core, Mem, EA, Word).
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-spec handle_HLLES(#core{}, sim_mem:mem(), IR :: word(), #ea{})
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-> {#core{}, sim_mem:mem(), {ok, integer()} | {error, {module(), term()}}}.
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handle_HLLES(Core, Mem, IR, EA) ->
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case sim_core:c(Core, Mem, EA) of
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{ok, CE} ->
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AC = IR band 8#17,
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Word = set_left_extend(get_left(CE)),
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handle_writeback(Core, Mem, AC, EA, Word);
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{error, Reason} ->
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sim_core:page_fault(Core, Mem, ea_address(EA), read, Reason,
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fun(Core1, Mem1) -> ?FUNCTION_NAME(Core1, Mem1, IR, EA) end)
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end.
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%% Miscellaneous ===============================================================
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handle_writeback(Core, Mem, EA, Word) ->
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@ -211,6 +250,10 @@ get_right(Word) -> Word band ((1 bsl 18) - 1).
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set_left(Word, Left) -> get_right(Word) bor (Left bsl 18).
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set_left_extend(Left) ->
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Right = (0 - ((Left bsr 17) band 1)) band ((1 bsl 18) - 1),
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(Left bsl 18) bor Right.
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set_left_ones(Left) -> (Left bsl 18) bor ((1 bsl 18) - 1).
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set_left_zeros(Left) -> Left bsl 18.
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@ -57,6 +57,10 @@
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-define(OP_HLLOI, 8#521).
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-define(OP_HLLOM, 8#522).
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-define(OP_HLLOS, 8#523).
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-define(OP_HLLE, 8#530).
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-define(OP_HLLEI, 8#531).
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-define(OP_HLLEM, 8#532).
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-define(OP_HLLES, 8#533).
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%% 2.8 Half-Word Data Transmission =============================================
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@ -257,6 +261,64 @@ hllos_no_ac_test() ->
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, {#ea{section = 1, offset = 0, islocal = false}, ?COMMA2(0, 1)} % AC0 = 0,,1
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]).
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%% HLLE - Half Word Left to Left, Extend
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hlle_test() ->
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Prog =
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[ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 1)} % 1,,100/ MOVEI 1,1
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, {1, 8#101, ?INSN(?OP_HLLE, 1, 0, 0, 8#200)} % 1,,101/ HLLE 1,200
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, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
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, {1, 8#200, ?COMMA2(-1, 0)} % 1,,200/ -1,,0
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],
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expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
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[ {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(-1, -1)} % AC1 = -1,,-1
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]).
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hllei_test() ->
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Prog =
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[ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 1)} % 0,,100/ MOVEI 1,1
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, {1, 8#101, ?INSN(?OP_HLLEI, 1, 0, 0, 0)} % 0,,101/ HLLEI 1,0
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, {1, 8#102, ?INSN_INVALID} % 0,,102/ <invalid>
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],
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expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
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[ {#ea{section = 1, offset = 1, islocal = false}, 0} % AC1 = 0
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]).
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hllem_test() ->
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Prog =
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[ {1, 8#100, ?INSN(?OP_MOVSI, 1, 0, 0, 1)} % 1,,100/ MOVSI 1,1
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, {1, 8#101, ?INSN(?OP_HLLEM, 1, 0, 0, 8#200)} % 1,,101/ HLLEM 1,200
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, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
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, {1, 8#200, ?COMMA2(0, 1)} % 1,,200/ 0,,1
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],
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expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
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[ {#ea{section = 1, offset = 8#200, islocal = false}, ?COMMA2(1, 0)} % C(1,,200) = 1,,0
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]).
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hlles_ac_test() ->
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Prog =
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[ {1, 8#100, ?INSN(?OP_MOVEI, 1, 0, 0, 1)} % 1,,100/ MOVEI 1,1
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, {1, 8#101, ?INSN(?OP_HLLES, 1, 0, 0, 8#200)} % 1,,101/ HLLES 1,200
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, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
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, {1, 8#200, ?COMMA2(-1, 0)} % 1,,200/ -1,,0
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],
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expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
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[ {#ea{section = 1, offset = 8#200, islocal = false}, ?COMMA2(-1, -1)} % C(1,,200) = -1,,-1
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, {#ea{section = 1, offset = 1, islocal = false}, ?COMMA2(-1, -1)} % AC1 = -1,,-1
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]).
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hlles_no_ac_test() ->
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Prog =
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[ {1, 8#100, ?INSN(?OP_MOVEI, 0, 0, 0, 1)} % 1,,100/ MOVEI 0,1
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, {1, 8#101, ?INSN(?OP_HLLES, 0, 0, 0, 8#200)} % 1,,101/ HLLES 0,200
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, {1, 8#102, ?INSN_INVALID} % 1,,102/ <invalid>
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, {1, 8#200, ?COMMA2(1, 1)} % 1,,200/ 1,,1
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],
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expect(Prog, [], {1, 8#102}, ?DEFAULT_FLAGS,
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[ {#ea{section = 1, offset = 8#200, islocal = false}, ?COMMA2(1, 0)} % C(1,,200) = 1,,0
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, {#ea{section = 1, offset = 0, islocal = false}, ?COMMA2(0, 1)} % AC0 = 0,,1
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]).
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%% Common code to run short sequences ==========================================
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expect(Prog, ACs, ExpectedPC, ExpectedFlags, ExpectedEs) ->
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