Jim
8c04dcdd8f
STLB changes, ITLB instruction
2005-08-21 00:00:00 -04:00
Jim
99337af999
STLB added, boots rev20 up to DWRITE channel order
2005-08-19 00:00:00 -04:00
Jim
8648e7426b
moved ea64v to an include file ea64v.h
...
implemented stack extensions
more PCL/fault work
more PX work
more FP work
2005-08-19 00:00:00 -04:00
Jim
b22a6c0e65
more PX, interrupt work, C/L/CC work
...
on overflow, use mathexception to either set C or fault
2005-07-31 00:00:00 -04:00
Jim
bbd311f048
more interrupt/fault work
...
reordered switches to process more frequent instructions first
2005-07-19 00:00:00 -04:00
Jim
7e68427b90
distinguish live register access in SR modes vs VI modes
...
Primos load map handling to enhance traces
more PX/interrupt work
device initialization feature
standard/vectored interrupt handling
device polling
more C/L bit changes
work on BMxx instructions
lots of stupid work on JMP/JST - older DIAG routines are broken
2005-07-11 00:00:00 -04:00
Jim
bdae5dede9
realtime clock, interrupts, process timer, LDC/STC, ZMV, ZMVD, ZFIL, PCL work
2005-06-25 00:00:00 -04:00
Jim
5ab1209f0a
INCVA macro for segment wraparound, PX work, added --cpuid option
2005-06-16 00:00:00 -04:00
Jim
997332c487
first implementation of process exchange, WAIT, NFY +
...
added restricted instruction checking
added CALF
more PCL work
2005-06-13 00:00:00 -04:00
Jim
7f433b9b27
implemented ARGT for interruptable PCL, more work on PCL
2005-06-11 00:00:00 -04:00
Jim
32c4116e52
more work on PCL
2005-06-11 00:00:00 -04:00
Jim
0b2994585c
changed mem[] to be Prime physical memory array, removed direct references +
...
more work on PCL
2005-06-10 00:00:00 -04:00
Jim
22f4c22f8f
virtual address translation, fault handling code +
...
tracing for address translation, disk I/O, and PCL
field address, field length, and load/store character instructions
queue instructions
more work on setting C & L bits correctly
2005-06-07 00:00:00 -04:00
Jim
c2c3e8f650
added trace feature and XEC instruction
2005-05-27 00:00:00 -04:00
Jim
8daced9db4
expanded CC macros, ea64v changes
...
attempt to set CC on instructions, or use XSETCC macros when not sure
2005-05-26 00:00:00 -04:00
Jim
3763da4cbe
added live register access to memory get/put functions
...
added live register access flag to effective address calculations
first attempt at complete 64V address calculation
first RSAV/RRST, STAC/STLC, LPSW, LDLR/STLR, EIO
more shift instruction work
2005-05-24 00:00:00 -04:00
Jim
efc25712b5
defined register file with regs.h
...
began using (get,put)16/32/64 functions to access memory instead of mem[]
began using crs[] to access current registers instead of mem[]
2005-05-23 00:00:00 -04:00
Jim
655b35b0f9
added table of generic instructions to ignore & log
...
initial disk controller support
began FP instruction work
2005-04-23 00:00:00 -04:00
Jim
ff3fd68935
condition code macros
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mem array is segment addressable
start of boot support
use CC macros and BCxx to emulate Bxyy (eg, BFLT)
use CC macros and LCxx to emulate Lxyy (eg, LFLT)
shift instruction work
2005-04-28 00:00:00 -04:00
Jim
9291d9e864
64R mode added, started 64V mode +
...
fixed ea16/32 to use previous pc in address calculations
initial support for arithmetic exceptions
added more instructions
2005-04-14 00:00:00 -04:00
Jim
b9e1439d39
Added Prime syscom directory for k key
2005-04-18 00:00:00 -04:00
Jim
ec56fd7a9e
Initial version of Prime emulator for Mac OSX on PowerPC
2005-04-18 00:00:00 -04:00
