Under certain circumstances, the timer resolution in the Version 3
could become coarse enough that very short timer intervals would lead
to an infinite loop of bus errors when running timer firmware
diagnostics.
When the 3B2 simulator was set to allow idling, there was significant
clock drift related to the primary timer unit. It turns out that the
simulator was using `AIO_SET_INTERRUPT_LATENCY` and `sim_rtcn_tick_ack`
incorrectly. They are not needed with the structure of system timers in
the 3B2 architecture.
The previous implementation of sim_load was riddled with little errors.
This change fixes those errors, improves user feedback, and limits the
allowable flags to '-r' and '-o'.
This commit introduces dozens of changes to make the 3B2-700 simulator
fully functional and ready for wider use. In addition to 3B2-700
availability, this commit includes a tremendous amount of refactoring
of the 3B2-400 and common code to make the project structure easier to
maintain and reason about.
- Plan is to avoid "#ifdef DONT_USE_INTERNAL_ROM" in simulator code
and handle builtin or external files in SCP facilities
- Export ROM checksum value and source file path to allow for transparent
dynamic ROM location at run time.
The CTC and PORTS pump code for System V Release 2.0.5 for the 3B2 is
different from the pump code used by SVR 3, leading to PORTS and CTC
diagnostics failing to pass when running SVR2. This change adds
support for the pump code used in SVR 2.
At one point in the distant past, there was an unremembered
reason to prefer __libc_longjmp if it was available. It is no
longer needed, and has been removed from glibc in the most recent
versions.
Fixes#1088.
This commit fixes an issue that caused floppy diagnostics to fail if
the floppy drive unit was not attached. The 3B2 floppy controller has
a "force interrupt" command that should run whether or not the floppy
unit is attached to an image.
- This change introduces a full refactor of the interrupt subsystem
for the system board (SBD) and the I/O bus (CIO). Interrupt decode
should now be significantly faster, and not require an expensive
calculation on every step.
- The TIMER device has been split into Rev 2 and Rev 3
implementations.
- The optional 3B2/400 Debug Monitor ROMs can now be booted by passing
the "DEMON" argument to the 3B2/400 simulator BOOT command. Any
of the following will cause the Debug Monitor ROM to be booted
instead of the standard 3B2/400 ROM:
sim> BOOT DEMON
sim> BOOT CPU DEMON
sim> BOOT DEMON CPU
The actual contents of the input ROM binary files and the contents of the
created arrays are unchanged.
Multiple ROM image include files can be included in the same source module
without the need for any #undef BOOT_CODE_SIZE, etc.
This change signficantly improves header hygiene in the 3B2 project by
moving global symbols out of 3b2_defs.h and into the appropriate
individual module header files.
Each compilation unit now includes:
- its appropriate matching .h file
- any other .h files necessary for linting and compilation
Each header file in turn includes 3b2_defs.h, which contains truly
global symbols, and which pulls in sim_defs.h and exports global
devices.
The Rev 3 firmware does not check floppy controller status before
commanding a sector read, which can lead to calling sim_disk_rdsect()
on a detached unit. With this checkin, the simulator will no longer
attempt a read or write if the floppy unit is not attached.
This change introduces initial support for the AT&T 3B2 Rev 3 platform, based
around the WE32200 CPU with up to 64MB of RAM and SCSI disk and tape support.
This simulator is experimental and not yet supported. It will not be built by
default, but can be built with:
make 3b2-600
Or by using the 3B2-600 Windows Visual Studio project.
This commit adds support for automatically running DGMON SBD diagnostic tests
on build.
Additionally, a small bug is fixed in simulator boot caused by failure to
parse boot switches.
This change lays the groundwork for adding support for Rev 3 3B2 models,
which includes the Model 500, Model 600, and Model 1000.
Rather than use the fixed strings "400" and "1000" in file names, the
strings "rev2" and "rev3" will be used, which allows greater flexibility
to implement various system configurations more easily.
Additionally, this change adds a copy of the Debug Monitor (DEMON) ROM
image for the Rev 2 board, to be used soon in a later checkin.
Historically this functionality was reimplemented within each
DEVICE simulator often with slightly different implementations
and inconsistencies. Solving this globally within SCP required
changes in many places, but should henceforth be reasonably
managed.
As discussed in #1034
This avoids a potential invalid pointer dereference when formatting
the return value from sim_instr() if it is < SCPE_BASE but greater
than the previously defined static array size.sizeof
Update simh.doc to reflect this generic change.
Floppy disk images are potentially used as a medium of data exchange
between some hosts and simulators and the disk information can confuse
this process.
As discussed in #847
Refactor in preparation for the addition of a Rev 3 simulator for the
3B2/1000 system.
This change also includes a full cleanup of the rat's-nest of includes
and externs that plagued the 3B2 simulator and made it difficult to
understand and maintain. Headers are now required in the following
order:
compilation unit -> "3b2_defs.h" -> {... dependencies ...}
Finally, HELP has been added to the CPU device.
The WE32100 supports expanded datatypes for its opcodes, allowing an
opcode to override the default size (byte/halfword/word) expected by the
instruction. For example:
CMPH &0x10000,{uword}-8(%fp)
Without the {uword} marker, this instruction would only compare the
lower 2 bytes of -8(%fp) against the lower two bytes of the constant
value 0x10000, since the CMPH instruction compares halfwords. However,
with the {uword} marker, the CMPH instruction promotes the opcode from a
halfword to an unsigned word, sign extending if appropriate.
The CMP{W|H|B} instruction implementation in the 3B2 simulator was
ignoring any expanded type markers on its opcodes when checking whether
to set the "N" (negative) bit in the PSW, leading to a failure in
compiling GCC. This fix causes the instruction to honor the expanded
datatype in this case.
- The previous fix for STRCPY introduced a new bug. STRCPY must always
copy the final NULL terminator of the string, but must NOT increment
the source or destination pointers for the NULL terminator.
- The CTC simulation did not correctly support streaming mode, which
can in some cases request reads that are not on 512-byte block
boundaries.
- To begin to support System V Release 4 UNIX, the NI card (called EMD
under SVR4) needed to support several more CRC codes for pump code.
- A bug in the Square Root implementation could lead to
an infinite loop.
- Incorrect rounding was used when MAU destination register
was single or double word.
- Fix Coverity-discovered issues.
This change adds a small infinite loop program that will be used by
the simulator to establish a reasonable guess at the host's
performance in order to precalibrate the system timer.
