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prepare w11a_V0.752 release
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wfjm
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### Table of contents
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- Current [HEAD](#user-content-head)
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- Release [w11a_V0.752](#user-content-w11a_V0.752)
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- Release [w11a_V0.751](#user-content-w11a_V0.751)
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- Release [w11a_V0.75](#user-content-w11a_V0.75)
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- Release [w11a_V0.742](#user-content-w11a_V0.742)
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@ -19,10 +20,33 @@ software or firmware builds or that the documentation is consistent.
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The full set of tests is only run for tagged releases.
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### Summary
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<!-- --------------------------------------------------------------------- -->
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---
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## <a id="w11a_V0.752">2018-08-26: [w11a_V0.752](https://github.com/wfjm/w11/releases/tag/w11a_V0.752) - rev 1041(wfjm)</a>
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### Summary
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- the Arty board is now also offered with a Spartan-7 FPGA. To evaluate the
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Spartan vs Artix performance a w11a port to the Arty S7 board was added.
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The design runs with 80 MHz, same clock rate as achieved with Artix-7 FPGAs.
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_Note_: the design is only simulation tested, was _not FPGA tested_ !!
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- use vivado 2017.2 as default (needed for Spartan-7 support). All vivado
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versions from 2017.3 to 2018.2 were tested. All designs build properly under
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vivado 2018.2, but the CPU time for a build increased very substantially,
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so they are currently not used as default build tool.
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### New features
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- Add Digilent Arty A7 (50 die size) support
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- general board support (for rev E board)
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- rgbdrv_3x2mux.vhd : driver for array with 2 RGB LEDs
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- add systems
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- w11a: w11a system with 256 kB memory (from BRAM) (_only sim tested_)
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### Changes
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- xviv_msg_filter: allow {yyyy.x} tags (in addition to ranges)
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- xviv_msg_summary: check also for .bit and .dcp files
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- get vivado 2017.2 ready; all designs build under 2017.2 and 2018.2
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- *.vmfset: update rules to cover 2017.4-2018.2
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- get vivado 2017.2 ready (needed for Spartan-7 support)
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- test vivado 2017.3 - 2018.2 ready
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- *.vmfset: update rules to cover 2017.4-2018.2
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- all designs build under 2017.2 and 2018.2
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<!-- --------------------------------------------------------------------- -->
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---
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@ -50,7 +74,7 @@ The full set of tests is only run for tagged releases.
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- rgbdrv_analog(_rbus): add ACTLOW generic to invert output polarity
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- ti_rri: adopt Digilent autodetect for CmodA7
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- add systems
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- tst_rlink: rlink tested
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- tst_rlink: rlink tester
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- tst_sram: SRAM tester
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- w11a: w11a system with 672 kB memory (512 SRAM + 160 BRAM)
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- rtl/vlib/rutil.vhd: added package, with imin helper function
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@ -1,6 +1,6 @@
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-- $Id: sys_w11a_br_arty.vhd 984 2018-01-02 20:56:27Z mueller $
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-- $Id: sys_w11a_br_arty.vhd 1039 2018-08-12 10:04:09Z mueller $
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--
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-- Copyright 2016-2017 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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-- Copyright 2016-2018 by Walter F.J. Mueller <W.F.J.Mueller@gsi.de>
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--
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-- This program is free software; you may redistribute and/or modify it under
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-- the terms of the GNU General Public License as published by the Free
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-- Test bench: tb/tb_sys_w11a_br_arty
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--
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-- Target Devices: generic
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-- Tool versions: viv 2015.4-2016.4; ghdl 0.33
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-- Tool versions: viv 2015.4-2018.2; ghdl 0.33-0.34
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--
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-- Synthesized:
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-- Date Rev viv Target flop lutl lutm bram slic
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-- 2018-08-11 1038 2018.2 xc7a35t-1 2283 5190 138 47.5 1602
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-- 2018-08-11 1038 2018.1 xc7a35t-1 2283 5193 138 47.5 1616
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-- 2018-08-11 1038 2017.4 xc7a35t-1 2278 5130 138 47.5 1541
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-- 2018-08-11 1038 2017.2 xc7a35t-1 2275 5104 138 47.5 1581
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-- 2018-08-11 1038 2017.1 xc7a35t-1 2275 5104 138 47.5 1581
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-- 2017-04-16 881 2016.4 xc7a35t-1 2275 5104 138 47.5 1611 +DEUNA
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-- 2017-01-29 846 2016.4 xc7a35t-1 2225 5100 138 47.5 1555 +int24
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-- 2016-05-26 768 2016.1 xc7a35t-1 2226 5080 138 47.5 1569 fsm+dsm=0
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@ -5,7 +5,7 @@
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#---------------------------------------------------------------------------
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DOXYFILE_ENCODING = UTF-8
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PROJECT_NAME = "w11 - cpp"
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PROJECT_NUMBER = 0.751
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PROJECT_NUMBER = 0.752
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PROJECT_BRIEF = "Backend server for Rlink and w11"
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PROJECT_LOGO =
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OUTPUT_DIRECTORY = $(RETRODOXY)/w11/cpp
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#---------------------------------------------------------------------------
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DOXYFILE_ENCODING = UTF-8
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PROJECT_NAME = "w11 - tcl"
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PROJECT_NUMBER = 0.751
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PROJECT_NUMBER = 0.752
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PROJECT_BRIEF = "Backend server for Rlink and w11"
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PROJECT_LOGO =
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OUTPUT_DIRECTORY = $(RETRODOXY)/w11/tcl
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#---------------------------------------------------------------------------
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DOXYFILE_ENCODING = UTF-8
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PROJECT_NAME = "w11 - vhd"
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PROJECT_NUMBER = 0.751
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PROJECT_NUMBER = 0.752
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PROJECT_BRIEF = "W11 CPU core and support modules"
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PROJECT_LOGO =
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OUTPUT_DIRECTORY = $(RETRODOXY)/w11/vhd
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