- xsim support complete (but many issues to be resolved yet)
- Added configurable w11a cache
- Removed some never documented and now strategically obsolete designs
- re-organize modules 'human I/O' interface on Digilent boards
- add test designs for 'human I/O' interface for atlys,nexys2, and s3board
- small updates in crc8 and dcm areas
- with one exception all vhdl sources use now numeric_std