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https://github.com/wfjm/w11.git
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0c395856d7
- add fifo_simple_dram: simple fifo with CE/WE interface, dram based - add test benches for fifo_simple_dram, fifo_2c_dram, and fifo_2c_dram2 - add simclkv: test bench clock generator with variable period
This directory tree contains all HDL sources and is organized in
| Directory | Content |
|---|---|
| bplib | support modules for boards or parts |
| ibus | w11 ibus devices |
| make_ise | make includes for ISE build flows |
| make_viv | make includes for Vivado build flows |
| sys_gen | HDL sources for top level designs |
| vlib | wide range of support modules |
| w11a | HDL sources for w11a core |