wfjm.w11

mirror of https://github.com/wfjm/w11.git synced 2026-01-21 02:37:20 +00:00

History

wfjm 4aa1db49c7 Cleanups; 17bit support for tst_sram

- s3_sram_memctl: drop superfluous idata_cei=1 in s_write2
- arty_bram/tb/tbrun.yml: retire mem70 - now in tbcpu
- tst_sram.vhd: allow AWIDTH=17; sstat_rbf_awidth instead of _wide
- tcl/tst_sram/*.tcl: 17bit support; use sstat(awidth); add isnarrow
- rtl/vlib/rutil.vhd: added package, with imin helper function

2017-06-25 20:20:48 +02:00

cdclib

Fix license disclaimer

2016-12-26 21:27:33 +01:00

comlib

rename .cvsignore -> .gitignore

2016-12-17 16:28:37 +01:00

genlib

fixes for Vivado 2016.3 and 2016.4

2017-01-07 18:25:21 +01:00

memlib

Fix license disclaimer

2016-12-26 21:27:33 +01:00

rbus

code and comment cosmetics

2017-05-07 18:54:16 +02:00

rlink

Miscellaneous fixes and changes

2017-05-07 18:57:45 +02:00

serport

correct spelling

2017-04-30 15:33:23 +02:00

simlib

- upgraded CRAM controller, now with 'page mode' support

2016-10-15 07:42:21 +00:00

xlib

rename .cvsignore -> .gitignore

2016-12-17 16:28:37 +01:00

generic_clk_100mhz.xdc

Fix license disclaimer

2016-12-26 21:27:33 +01:00

README.md

docu tune-ups; some more README.md

2016-12-23 15:51:48 +01:00

rutil.vhd

Cleanups; 17bit support for tst_sram

2017-06-25 20:20:48 +02:00

slvtypes.vhd

23 line interrupt mapper for full system configuration

2017-01-29 14:08:04 +01:00

README.md

This directory sub-tree contains a wide range of support modules and is organized in

Directory	Content
cdclib	modules for clock domain crossing
comlib	modules for communication
genlib	grab bag of other modules
memlib	wrappers for distributed and block RAM; fifos
rbus	modules for rbus fabric; some basic rbus devices
rlink	rlink interface
serport	serial port interface
simlib	helper modules for test benches
xlib	warppers for some Xilinx components