mirror of
https://github.com/Gehstock/Mist_FPGA.git
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3161ae1d9ede1258baa2d487a106ef709ef2d16a
Description
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Languages
VHDL
66.6%
Verilog
19.2%
SystemVerilog
11.7%
Tcl
2.1%
Batchfile
0.2%
Other
0.1%