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nextpnr-0.1

nextpnr-0.2

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Mono Color

• 675a96fc5a Merge pull request #807 from acomodi/fix-xdc gatecat 2021-09-07 17:01:37 +01:00
• 46fc902bcf interchange: xdc: add common not_implemented function Alessandro Comodi 2021-09-07 15:59:19 +02:00
• 9368671ca9 Merge branch 'master' into extend-placement YRabbit 2021-09-07 09:18:28 +10:00
• d4a14a0d04 clangformat gatecat 2021-09-06 13:29:52 +01:00
• d08fb255a2 router2: Fix uninitialised values gatecat 2021-09-06 13:29:08 +01:00
• d6fdd6c7ce Merge branch 'combine-dff' into extend-placement YRabbit 2021-09-04 17:39:09 +10:00
• e4701f2da1 Merge branch 'master' into extend-placement YRabbit 2021-09-04 16:29:21 +10:00
• 68e4d18339 nexus: Promote CE/LSR globals gatecat/nexus-celsr-globals gatecat 2021-05-06 17:21:22 +01:00
• fd6366f027 nexus: Fix getBelGlobalBuf gatecat 2021-09-02 17:22:59 +01:00
• 01b51fb715 router2: Fix explored count gatecat 2021-09-02 17:08:54 +01:00
• e82d49e13a Merge branch 'master' into combine-dff YRabbit 2021-09-02 18:19:30 +10:00
• 0c40bed425 Merge pull request #790 from acomodi/place-only-same-cluster-in-site gatecat 2021-08-31 12:37:04 +01:00
• e0950408d5 interchange: clusters: fix other cluster allowance checks in same site Alessandro Comodi 2021-08-31 12:44:36 +02:00
• 2df931f7db interchange: entirely disable cache when binding site routing Alessandro Comodi 2021-08-31 12:08:46 +02:00
• 85cf6562b6 gh: interchange: bump python-interchange tag Alessandro Comodi 2021-08-27 17:03:19 +02:00
• f3899696a7 gowin: Place DFFs of different types in the slice. YRabbit 2021-08-31 07:53:15 +10:00
• 23a5e91858 gowin: Add constraints on primitive placement. YRabbit 2021-08-31 07:36:11 +10:00
• 78bf5796db interchange: disallow placing cells on sites with clusters Alessandro Comodi 2021-08-05 14:20:25 +02:00
• 0e83db47a0 clangformat gatecat 2021-08-26 14:58:43 +01:00
• 7f8e467acd Merge pull request #805 from YosysHQ/gatecat/py-portref-byvalue gatecat 2021-08-26 14:57:46 +01:00
• b85fe12234 python: Wrap PortRef by value gatecat 2021-08-26 13:23:16 +01:00
• 6fc41692d6 Merge pull request #710 from Ravenslofty/mistral-mlab-as-lab gatecat 2021-08-24 18:25:44 +01:00
• 0367719eea mistral: Permute MLAB init bits correctly gatecat 2021-08-24 13:58:18 +01:00
• e15f0db408 clangformat gatecat 2021-08-24 12:48:08 +01:00
• 86393c8c8e Merge pull request #801 from yrabbit/TRBL-style gatecat 2021-08-23 21:58:08 +01:00
• 42166f2e3e Merge pull request #802 from YosysHQ/gatecat/python-rt-dly gatecat 2021-08-23 21:56:42 +01:00
• de311e052f python: Allow querying route delays gatecat 2021-08-23 20:51:53 +01:00
• e4196f32d3 gowin: Add the IO[TRBL]style placement recognition YRabbit 2021-08-23 16:19:02 +10:00
• 897a2fccb6 Merge pull request #798 from kleinai/extref-loc gatecat 2021-08-19 16:36:18 +01:00
• 6ae9b47155 Merge pull request #800 from smunaut/fix_py_portrefvector gatecat 2021-08-19 12:36:32 +01:00
• df67783dd3 pybindings: Fix mapping for PortRefVector Sylvain Munaut 2021-08-19 12:01:49 +02:00
• e6006805ce Make EXTREFB handling more robust Aidan Klein 2021-08-18 20:49:55 -04:00
• b88e86f366 mistral: Use MLABs as if they're LABs (for now) Lofty 2021-05-16 08:19:08 +01:00
• b37d133c43 Merge pull request #794 from YosysHQ/gatecat/router2p5 gatecat 2021-08-16 14:08:20 +01:00
• f207068ee2 router2: Add experimental timing-driven ripup option gatecat 2021-08-15 16:18:57 +01:00
• 42522c492c router2: Alternative congestion cost schedule gatecat 2021-08-15 09:34:50 +01:00
• 2a856db72c router2: Adding some criticality heuristics gatecat 2021-08-15 09:34:27 +01:00
• 64f6b8bc67 router2: Improved bidir routing and data structures gatecat 2021-08-14 15:02:26 +01:00
• 4d54b62e63 Merge pull request #795 from YosysHQ/gatecat/mistral-include-fix gatecat 2021-08-15 16:20:51 +01:00
• f7be385230 mistral: Include mistral generated files in include dirs gatecat 2021-08-15 15:13:31 +01:00
• e7db15d6a4 mistral: Fix pip binding check gatecat 2021-08-14 20:18:54 +01:00
• a66cd0200b clangformat gatecat 2021-08-14 20:22:54 +01:00
• b0a4f1b86e Merge pull request #793 from gregdavill/ecp5_diff_od gatecat 2021-08-14 13:48:55 +01:00
• 200c57f475 ecp5: Enable OPENDRAIN on differential outputs Greg Davill 2021-08-14 19:26:58 +09:30
• dd63764331 Merge pull request #791 from yrabbit/wip gatecat 2021-08-06 10:14:59 +01:00
• 3f959c7421 gowin: Change the constraint parser to support multiple options per line. Add support for IOBUF and TBUF I/O modes. YRabbit 2021-08-06 17:43:20 +10:00
• 0c1ee5fad1 Merge pull request #789 from YosysHQ/gatecat/ecp5-pdp-outreg gatecat 2021-08-03 13:05:01 +01:00
• 5482b9a0c6 ecp5: Copy REGMODE in PDP mode to both A and B ports gatecat 2021-08-02 20:58:45 +01:00
• ef1fbfc651 Merge pull request #787 from YosysHQ/gatecat/report gatecat 2021-07-30 14:29:55 +01:00
• 8466985bc7 Merge pull request #788 from YosysHQ/gatecat/router2-ice40 gatecat 2021-07-30 11:10:21 +01:00
• b5a31d2e4e router2: Mark dest as visited during backwards routing gatecat 2021-07-30 09:14:46 +01:00
• 42f48b6dc0 router2: Improve debugability of pip conflicts gatecat 2021-07-29 13:04:59 +01:00
• d2007a386c common: Add JSON timing and utilisation report gatecat 2021-07-29 12:52:33 +01:00
• 4ac00af6fa basectx: Add a field to store timing results gatecat 2021-07-29 12:02:45 +01:00
• 0991003de9 Merge pull request #785 from YosysHQ/gatecat/nexus2glb2fabric gatecat 2021-07-29 09:17:37 +01:00
• 504199e70e nexus: Fix routeing of global clocks that also drive fabric gatecat 2021-07-28 15:34:54 +01:00
• 39a7381928 Merge pull request #784 from YosysHQ/gatecat/nexus-ddr gatecat 2021-07-28 15:34:31 +01:00
• efd3252d08 Merge pull request #783 from YosysHQ/gatecat/router2-crit-update gatecat 2021-07-28 13:57:14 +01:00
• 5686fdcf1c nexus: Basic packer and FASM support for I/ODDR gatecat 2021-07-28 13:18:38 +01:00
• d0acb1b239 nexus: Add IOLOGIC pins data gatecat 2021-07-28 12:42:58 +01:00
• ce92cdf8e4 router2: Update route delays even when routes are congested gatecat 2021-07-28 11:46:08 +01:00
• 14c676ab49 timing: Allow overriding of route delays gatecat 2021-07-28 11:20:28 +01:00
• eb6817c259 Merge pull request #780 from YosysHQ/gatecat/fix-io-inv gatecat 2021-07-26 16:58:00 +01:00
• 0b36616940 Merge pull request #779 from YosysHQ/gatecat/ic-import-fix gatecat 2021-07-26 16:57:49 +01:00
• b4602ae5bf interchange: Search backwards for IO macro placements, too gatecat 2021-07-26 16:01:21 +01:00
• c74f0d3239 interchange: Don't attempt to import instances as modules gatecat 2021-07-26 15:36:20 +01:00
• 6be26fbde7 Merge pull request #775 from YosysHQ/gatecat/fix-io-checks gatecat 2021-07-26 12:35:29 +01:00
• ef3be26a69 Merge pull request #777 from YosysHQ/gatecat/gui-fixes gatecat 2021-07-25 13:07:47 +01:00
• bbb1ea26b6 gui: Fix some typos gatecat 2021-07-25 12:11:03 +01:00
• 0e3b25468c gui: Implement about dialog gatecat 2021-07-25 12:06:51 +01:00
• f61fa73b77 interchange: Check IO validity after all are placed gatecat 2021-07-23 17:09:39 +01:00
• 5212e38512 Merge pull request #757 from antmicro/lut-mapping-cache gatecat 2021-07-22 14:09:40 +01:00
• 580a45485a Added an option to disable the LUT mapping cache Maciej Kurc 2021-07-22 14:07:35 +02:00
• 8fc16a57c9 Added more code comments, formatted the code Maciej Kurc 2021-07-16 16:01:21 +02:00
• 8733cce5fa Merge pull request #772 from antmicro/xdc_parse gatecat 2021-07-21 18:53:15 +01:00
• 0e838c3cea Add dummy function to parse creat_clock in XDC files Maciej Dudek 2021-07-21 18:43:11 +02:00
• 391248e031 Merge pull request #768 from YosysHQ/gatecat/fix-gui-error gatecat 2021-07-21 11:42:54 +01:00
• 86a91ccf1b clangformat gatecat 2021-07-21 10:57:48 +01:00
• 1a5bb7b8ab Merge pull request #770 from YosysHQ/gatecat/empty-idstringlist gatecat 2021-07-20 18:25:49 +01:00
• ef08c4a91d Merge pull request #771 from YosysHQ/gatecat/ice40-ip-no-busaddr74 gatecat 2021-07-20 18:25:39 +01:00
• 8f722a0d35 ice40: Use default value when IP is missing BUS_ADDR74 parameter gatecat 2021-07-20 16:08:26 +01:00
• 08bbe173ce Fix definition of an empty IdStringList gatecat 2021-07-20 15:51:04 +01:00
• 41eecd7ce2 gui: Improve Fatal Error message gatecat 2021-07-20 13:22:47 +01:00
• f3be638ea9 Merge pull request #767 from YosysHQ/gatecat/ic-pref-const gatecat 2021-07-20 12:04:12 +01:00
• ffd97945ba interchange: Fix preferred constant handling when canInvert gatecat 2021-07-13 14:56:27 +01:00
• c6aa51a2de Merge pull request #766 from pepijndevos/python gatecat 2021-07-17 20:37:04 +01:00
• 916ae180ac remove generic leftover in gowin Pepijn de Vos 2021-07-17 17:36:54 +02:00
• 811f5b4d18 remove generic leftover in gowin Pepijn de Vos 2021-07-17 17:35:49 +02:00
• ccf2bb123c Added computing and reporting LUT mapping cache size Maciej Kurc 2021-07-16 15:53:00 +02:00
• c95aa86a8e Fixed assertion typos Maciej Kurc 2021-07-16 15:16:31 +02:00
• 857961a6bb Migrated C arrays to std::array containers. Maciej Kurc 2021-07-16 14:55:45 +02:00
• 0336f55b16 LUT mapping ceche optimizations 2 Maciej Kurc 2021-07-16 13:55:19 +02:00
• 044c9ba2d4 LUT mapping cache optimizations 1 Maciej Kurc 2021-07-16 13:28:40 +02:00
• d52516756c Working site LUT mapping cache Maciej Kurc 2021-07-09 15:40:06 +02:00
• 2c4599612c Merge pull request #764 from acomodi/fix-pseudo-pips gatecat 2021-07-15 17:39:13 +01:00
• 7edfcc3bfa interchange: disallow pseudo-pip on same nets if tile has luts Alessandro Comodi 2021-07-15 16:02:22 +02:00
• 084e15f9cf Merge pull request #762 from antmicro/testarch_timing gatecat 2021-07-14 17:44:50 +01:00
• 9190bda27d [interchange] Update chipdb and python-fpga-interchange versions Maciej Dudek 2021-07-14 14:59:20 +02:00
• 034467ff61 Merge pull request #761 from acomodi/interchange-constrs gatecat 2021-07-12 20:04:48 +01:00
• 7abfeb11c3 interchange: xdc and place constr: address review comments Alessandro Comodi 2021-07-12 17:02:55 +02:00