Emil J
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992e64342c
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Merge pull request #5621 from rocallahan/remove-opt-sort
Remove `Design::sort()` calls from optimization passes
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2026-02-04 16:55:56 +01:00 |
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Miodrag Milanović
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776b4d06a6
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Merge pull request #5669 from YosysHQ/release/v0.62
Release version 0.62
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2026-02-04 08:55:31 +01:00 |
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Miodrag Milanovic
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ddfa34d743
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Next dev cycle
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2026-02-04 08:54:38 +01:00 |
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Robert O'Callahan
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7326bb7d66
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Only reuse ABC processes if we're using yosys-abc and it was built with ENABLE_READLINE
(cherry picked from commit 5054fd17d7)
v0.62
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2026-02-04 17:19:10 +13:00 |
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Miodrag Milanovic
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fc11754557
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Release version 0.62
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2026-02-03 12:09:24 +01:00 |
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Miodrag Milanović
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6dbe03f0f5
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Merge pull request #5667 from Logikable/vhdl
Guard vhdl_file::UNDEFINED behind VERIFIC_VHDL_SUPPORT.
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2026-02-03 07:59:52 +01:00 |
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github-actions[bot]
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153ddc0c84
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Bump version
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2026-02-03 00:33:37 +00:00 |
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Sean Luchen
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224549fb88
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Guard vhdl_file::UNDEFINED behind VERIFIC_VHDL_SUPPORT.
Signed-off-by: Sean Luchen <seanluchen@google.com>
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2026-02-02 15:26:03 -08:00 |
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KrystalDelusion
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414b1b6019
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Merge pull request #5651 from rocallahan/abc-error-nonfatal
Handle ABC nonfatal "Error:" messages
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2026-02-03 08:55:05 +13:00 |
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Emil J
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59653da599
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Merge pull request #5609 from nataliakokoromyti/upstream-design-run-pass
Add Design::run_pass()
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2026-02-02 19:30:18 +01:00 |
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Miodrag Milanović
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f5c8368f7a
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Merge pull request #5662 from YosysHQ/update_abc
Update ABC as per 2026-02-02
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2026-02-02 13:44:56 +01:00 |
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Miodrag Milanovic
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b88d6588bc
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Update ABC as per 2026-02-02
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2026-02-02 11:25:57 +01:00 |
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Miodrag Milanović
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ac427a79b0
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Merge pull request #5644 from nataliakokoromyti/upstream-linux-perf-unistd
Add unistd header for Linux
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2026-01-30 08:17:43 +01:00 |
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Miodrag Milanović
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382b28acbe
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Merge pull request #5648 from YosysHQ/verific_moreopts
verific: fixed -sv2017 option and added ability to set VHDL standard
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2026-01-30 08:17:19 +01:00 |
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Robert O'Callahan
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9c56c93632
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Add missing newlines to some 'log_error's
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2026-01-30 01:52:19 +00:00 |
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Robert O'Callahan
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6af1b5b19c
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Don't treat ABC 'Error:' output as indicating a fatal error, since these messages aren't necessarily fatal
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2026-01-30 01:52:19 +00:00 |
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github-actions[bot]
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106f289e31
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Bump version
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2026-01-30 00:30:58 +00:00 |
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KrystalDelusion
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5a4ad6a6d0
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Merge pull request #5640 from YosysHQ/krys/fix_mod.py
Don't use `module mod_name(...)` style in cell libs
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2026-01-30 11:40:07 +13:00 |
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Emil J
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a68fee1115
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Merge pull request #5646 from rocallahan/debug-design_equal
Dump module details when `design_equal` fails
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2026-01-29 18:57:24 +01:00 |
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Natalia
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61b1c3c75a
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use run_pass in ecp5 add/sub test
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2026-01-29 02:42:23 -08:00 |
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Natalia
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7439d2489e
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add assertion to run_pass test
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2026-01-29 02:23:07 -08:00 |
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Miodrag Milanovic
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b70f527c67
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verific: fixed -sv2017 option and added ability to set VHDL standard if applicable
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2026-01-29 10:32:30 +01:00 |
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Miodrag Milanović
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6ba8f3dc19
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Merge pull request #5647 from YosysHQ/update_abc
ABC update (MINGW fix)
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2026-01-29 10:12:25 +01:00 |
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Miodrag Milanović
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43db5c9488
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Merge pull request #5645 from nataliakokoromyti/upstream-verific-mixed-sv-vhdl
Upstream verific mixed sv vhdl
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2026-01-29 10:12:09 +01:00 |
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Miodrag Milanovic
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6007b68e9c
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ABC update (MINGW fix)
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2026-01-29 09:30:12 +01:00 |
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Natalia
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8d504ecb48
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verific: use MFCU for SV file list
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2026-01-29 00:03:28 -08:00 |
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Natalia
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b6c148f84a
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tests/verific: ensure mixed -f requires VHDL unit
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2026-01-28 22:46:10 -08:00 |
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github-actions[bot]
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1f6a13dac7
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Bump version
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2026-01-29 00:31:03 +00:00 |
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Robert O'Callahan
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139c38ecfa
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Dump module details when design_equal fails
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2026-01-28 18:32:12 +00:00 |
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nella
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8f6c4d40e4
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Merge pull request #5623 from YosysHQ/nella/opt-dff-rewrite
opt_dff restructure.
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2026-01-28 14:41:40 +01:00 |
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Natalia
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5a64fe2d91
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tests/verific: assert module count explicitly
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2026-01-28 04:21:13 -08:00 |
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Natalia
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8c2ef89732
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tests/verific: import mixed -f list with -all
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2026-01-28 04:13:04 -08:00 |
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Natalia
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74c601db0f
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tests/verific: add mixed -f list case
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2026-01-28 03:55:42 -08:00 |
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Natalia
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6a6e5f0f54
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linux_perf: only include unistd on Linux
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2026-01-28 03:44:33 -08:00 |
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Natalia
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188082551a
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verific: only use MFCU when VHDL present
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2026-01-28 03:37:08 -08:00 |
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Natalia
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fc2b7c317f
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linux_perf: include unistd for POSIX I/O
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2026-01-28 03:14:20 -08:00 |
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Emil J
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75008b70e5
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Merge pull request #5638 from YosysHQ/emil/linux_perf-fix-help
linux_perf: mark internal, fix help formatting
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2026-01-28 11:06:08 +01:00 |
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Miodrag Milanović
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97366933b3
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Merge pull request #5643 from YosysHQ/update_abc
Update ABC as per 2026-01-28
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2026-01-28 10:21:08 +01:00 |
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Miodrag Milanovic
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fdff3dac2b
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Update ABC as per 2026-01-28
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2026-01-28 09:38:33 +01:00 |
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Krystine Sherwin
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8ed7ac04d8
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linux_perf.cc: Fix overlength codeblock
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2026-01-28 08:17:56 +13:00 |
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Krystine Sherwin
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4031310ebb
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linux_perf.cc: Use formatted_help
Gets the codeblock formatting better.
Also fold the on|off into a single usage.
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2026-01-28 08:10:31 +13:00 |
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Krystine Sherwin
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aaebce7adc
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log_help: Don't reformat codeblocks
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2026-01-28 08:07:44 +13:00 |
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Krystine Sherwin
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c3ffb48a6b
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Add and use fix_mod.py
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2026-01-28 07:45:58 +13:00 |
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github-actions[bot]
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33e4b1d97f
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Bump version
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2026-01-27 00:28:42 +00:00 |
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Gus Smith
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09ceadfde7
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Merge pull request #4269 from povik/icells_not_derived
Avoid `module_not_derived` on internal cells in techmap result
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2026-01-26 14:48:40 -08:00 |
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Emil J
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5b10c7f3c6
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Merge pull request #4928 from XutaxKamay/main
Add gatesi_mode to init gates under gates_mode in BLIF format
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2026-01-26 23:30:11 +01:00 |
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Emil J. Tywoniak
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ef3b2b0380
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linux_perf: mark internal, fix help formatting
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2026-01-26 22:59:20 +01:00 |
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nella
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a3c9716f18
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OptDff fix unit tests.
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2026-01-26 22:35:25 +01:00 |
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nella
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9367090763
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OptDff more accurate ctrl/pattern desc.
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2026-01-26 22:19:36 +01:00 |
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nella
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5803461c24
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opt_dff pattern extraction.
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2026-01-26 22:10:10 +01:00 |
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