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Commit Graph

160 Commits

Author SHA1 Message Date
Jim
83e05663cb - Replace HOBBY #ifdef with DEMO,
- Remove long integers so x86_64, where long is 8 bytes, is like i686
compile, where long is 4 bytes.
- Dont' handle xon/xoff on sys console in full duplex
- Add geom hash for DEMO emulator
- Add -mmacosx-version-min=10.4 option for DEMO emulator
- Add 1-line AMLC and 2-node PNC to DEMO emulator
2011-11-15 14:01:58 -05:00
Jim
7b2ea3828b Don't print memory contents on a fatal error. Diag CPU.TIMER causes a
fatal error in get16trap, and printing the memory contents causes a
nested fatal error.
2011-10-24 22:59:04 -04:00
Jim
5ae86cca58 bs: fix major bug in get64r: plp jimmy>date_af would fail, l command
(ld -packed -sort_name) would fail after running jimmy>lines>lines.run
2011-10-24 16:47:10 -04:00
Jim
d829b0efd9 Hey, it runs Primos again! This time on Intel. :) 2011-10-21 18:55:43 -04:00
Jim
53893d85ae bs: more changes, functions for symbolic register access, incl DMX 2011-10-20 17:23:15 -04:00
Jim
e43a2167f0 bs: flt.pt. fixes, fix ecb copy in PCL 2011-10-20 10:44:04 -04:00
Jim
7075729d8c lrs: don't try to shift 32 bits: works on PPC, fails on Intel 2011-10-20 09:42:33 -04:00
Jim
ff791c1b9c Remove bogus var from ea64v.h, add quit handler to flush trace buffers 2011-10-19 11:02:23 -04:00
Jim
ec9496ec75 bs: change add32 to a function, use get/put in callers 2011-10-18 10:43:00 -04:00
Jim
3ed4d26624 bs: change tch and tcr to functions, change callers to use get/put 2011-10-17 22:45:33 -04:00
Jim
f77c58a69b bs: remove remaining crs[] references: BI/DX/Y, I/DRX, ... 2011-10-17 22:39:30 -04:00
Jim
8b5d47c733 bs: change add16 to a function, change all callers to use get/put 2011-10-17 22:30:28 -04:00
Jim
fa097d21fc BS rvec, memory accesses; order of RPH/RPL is byte-order dependent,
fix bug in get32 when -DFAST isn't used
2011-10-17 22:14:55 -04:00
Jim
7b150eed02 bs: replace pmep C pointer with Prime physical address 2011-10-17 15:15:35 -04:00
Jim
5790718ed7 Add swap calls to get/put functions & macros, add tracei target for Intel 2011-10-17 15:06:55 -04:00
Jim
2a89fb6ab8 First set of byte-swap changes; should compile equal to version 194 2011-10-17 10:53:58 -04:00
Jim
69a37aef55 Remove crs[] and crsl[] references in trace output, add vfy target to
makefile to allow comparing emulator binaries
2011-10-17 10:53:12 -04:00
Jim
aad6c9f94c Don't delay on first BDX * to avoid Prime bug in SCHED.PMA causing
backstop process to delay on the first cycle
2011-10-11 17:39:32 -04:00
Jim
77ee732144 Changes to get rev 18 to boot 2011-10-01 22:42:59 -04:00
Jim
ff48e0c07a fatal: display message on nested call 2011-09-17 12:00:56 -04:00
Jim
88d7a3fba6 Add a way for device to be polled when CPU is idle. Maybe this can be used
to interleave user processes with device & DIM processes, for example, during
a file upload.
2011-09-05 16:20:26 -04:00
Jim
5d43e41c12 Revert #139 (eafa); emacs, esc75* inserted garbage, not 75 *'s 2011-08-31 12:46:53 -04:00
Jim
6b8abd3a8b Use current hg rev when building 2011-08-18 20:58:18 -04:00
Jim
aba2688490 Don't enable tsrc$$ trace hack whenever tracing is enabled. 2011-08-18 14:07:23 -04:00
Jim
05251fbcce Allow tracing 3-digit user numbers vs 2. System processes sometimes
have high user numbers.
2011-08-18 13:35:33 -04:00
Jim
459873ff90 Add stlb/iotlb trace option "tlb", set T_EAS when requested 2011-08-18 13:17:54 -04:00
Jim
2ef1438900 Updated some comments. Still some confusion about PTLB re: IOTLB. 2011-08-18 10:10:28 -04:00
Jim
a68971cc1c Flush tracefile every line only when "flush" arg is used. This is
useful for situations where the emulator bombs, eg, with a Unix seg
fault.  But it's slower too, so make it optional.
2011-08-17 09:35:01 -04:00
Jim
4ddd43debf Add async I/O code to devpnc, but disabled for now: there is a delay
problem with remote terminal sessions:

1. netlink to remote Prime
2. a prirun
3. l (list directory)
4. displays a little, then a longish pause up to 30 seconds, then the rest

Does a similar thing with stat us.  Hitting Enter will cause it to
finish, while typing characters does not.  I suspect this is a problem
with Prime's networking code, but not sure.

Also, if async I/O is used, the QUIT. OK, message doesn't appear after
ctrl-p.  I think they are getting wiped out by Primenet's buffer
flushes.

All of this might be subtle timing problems because I changed the
default clock rate from 250/330/500/whatever times per sec to 20 times
per second in this rev 19 version of Primos.
2011-08-15 17:11:28 -04:00
Jim
479acd4788 When tracing, fatal() dumps RP instruction address queue 2011-08-14 13:34:07 -04:00
Jim
703940e525 PNC cleanups, still halts at RCV_ERR2 in PNCDIM on node B during
a directory copy from node A to a disk on node B.
2011-08-14 12:10:14 -04:00
Jim
6348f80b5a Add "eas" trace flag to trace 32S addressing 2011-08-13 16:12:33 -04:00
Jim
945f48057c Add multi-indirect level test for several 32R cases (64R is always
single indirect)
2011-08-13 11:07:37 -04:00
Jim
26b86c84e9 Add "off" trace option: initially disabled, ctrl-t to toggle it 2011-08-13 10:58:16 -04:00
Jim
f69f9e9696 After changing EAFA to preserve the E-bit, CPUT4 halted at 10001. In
this case, bitno was specified in the EAFA instruction itself.  The
emulator was setting the E-bit in the returned ea because there was a
non-zero bit offset.  This extra test of bitno & setting of E-bit was
removed from apea to pass CPUT4 at 10001.

Issues like this, might be why DIAG was developed to surpass T&M: many
of these CPUT4 tests are testing the implementation of an instruction
rather than just the architectural feature of the instruction.
2011-08-09 09:10:55 -04:00
Jim
f0983d6ccb Preserve fault and E bits in EAFA instructions to pass CPUT4 T&M halt
at 7753 and 10061.  At 7753, CPUT4 loads -1L into the SB register,
EAFA 1,SB%, then LDLR '12 to get the FAR1 register value.  It expects
it to be -1.  For the test at 10061, EAFA was clearing the E-bit in
FAR1, but the test expected it to be set.  The emulator never uses the
E-bit in the FAR (it only looks at bitno), so it doesn't matter how the
E-bit is set in the register.
2011-08-09 09:04:15 -04:00
Jim
bffaa206bf CPUT4 halt at 10203 reveals that the field length register bits 60-64
are the high-order bits of the length, not the low-order bits as I had
assumed.
2011-08-08 19:03:25 -04:00
Jim
687d068335 Default sense switches are now 0 instead of 14114 when booting from a
Prime runfile, eg, T&M.  Check for either CR or LF to continue after
HLT.
2011-08-08 09:24:17 -04:00
Jim
499d07d82e CPUT4 T&M: max indirect levels is 8 then RXM fault occurs (S/R mode) 2011-08-06 14:44:42 -04:00
Jim
adbf7dff22 Always print a linefeed after HLT 2011-08-06 09:39:19 -04:00
Jim
6b080f7c5e For CPUT4, add LPID (only checks restricted) and mark some other
unimplemented instructions as restricted.
2011-08-06 09:30:27 -04:00
Jim
23b8cd9892 Only use 28 bits of physical address in mapva to correct CPUT4
emulator seg fault after LPSW near label RXM in CPUT4.

CPUT4 activates Ring 3 by loading the ring bits of the program
counter.  However, it does not enable segmentation, so we're still
accessing memory by physical location - no address mapping occurs.
mapva used the entire 32-bit program counter as an offset in the MEM
array (physical memory), and because of the ring bits, this caused a
Unix seg fault.

mapva was changed to only use 28 bits of the address when VA mapping
is disabled (28 bits matches the size of the MEM array).  Technically,
a more accurate mask should be applied based on the CPU model.  For
example, a P750 could only access 8MB of memory.
2011-08-06 09:01:16 -04:00
Jim
8ad786dc42 Invalidate brp cache on LPSW, since segmentation could be enabled. 2011-08-06 08:47:53 -04:00
Jim
3b6ed6f52c On HLT with -boot filename (T&M), either continue or halt. Add trace
code for CLS to show memory value used for comparison.
2011-08-06 08:44:36 -04:00
Jim
4388350678 Allow continue after HLT for -boot filename for V-mode T&Ms 2011-08-03 17:31:09 -04:00
Jim
6beed769cf Add -trace arg (number > 99) to start tracing after this instruction.
This is an unsigned int, so will overflow after 4B instructions, but
it's impractical to trace that many instructions anyway.  This feature
is used for debugging the emulator, getting diags to work, etc., so
instruction counts tend to be low.
2011-08-02 16:57:10 -04:00
Jim
2943b41e0c Cause UII for P300 paging instructions for CPUT4 T&M 2011-08-02 14:41:16 -04:00
Jim
cefc0e64e8 Corrected CREP and RTN based on CPUT4 T&M 2011-08-01 18:08:14 -04:00
Jim
efe90b9abb Change UII fault to pass ea for faddr instead of RP, to pass CPUT1 T&M.
NOTE: ea would only be set for mem. ref. instructions, but we use the
same code at label d_uii: for generics too.  Not sure what the ea should
be for a generic UII fault where there is no ea computed.
2011-07-31 23:25:51 -04:00
Jim
12e82b1d9a Fix bug in CEA: 16S not truncating ea after indexing. Caught by old
T&M test CPUT1.  Checked ea16s, and it was already doing the truncate.
2011-07-31 22:54:11 -04:00