github.com/rcornwell.sims
1
0
Fork 0
mirror of https://github.com/rcornwell/sims.git synced 2026-02-16 20:51:57 +00:00
Code Releases Activity
629 Commits 4 Branches 0 Tags
f0cc9bd94bebd6b4d0796bfcbbe61ba699ed0427
Commit Graph

11 Commits

Author SHA1 Message Date
AZBevier
0c3385304d SIM32: Change instruction processing based on Gould diags. 
SIM32: Add more changes for UTX install tape processing.
 2019-08-09 19:17:55 -07:00
AZBevier
caa3398164 SEL32: Correct opcode processing errors caught by Gould diagnostics. 
SEL32: Do some code cleanup.
 2019-08-04 10:50:01 -07:00
AZBevier
53026c66c3 SEL32: Add three missing basemode instructions. 
SEL32: Handle multiple EOFs on MT.
SEL32: Correct basemode instruction processing and display errors.
SEL32:Fix ex -m to display basemode instructions.
 2019-07-25 12:58:19 -07:00
AZBevier
f89e8aefa8 SEL32: Fix basemode instruction display code. 2019-07-18 17:28:43 -07:00
James C. Bevier
d3f33f8d8e SEL32: Change instruction display. 2019-07-17 21:39:18 -04:00
James C. Bevier
c8f72fb1c1 SEL32: Fix LEAR instruction display. 2019-07-17 21:39:18 -04:00
James C. Bevier
ec4c722919 SEL32: Change examine/depisit code. 2019-07-17 21:39:18 -04:00
James C. Bevier
d9283178d9 SEL32: Reformat files to use DOS format and no tabbing 2019-07-17 21:39:18 -04:00
James C. Bevier
d3d4e808cc SEL32: Initial commit of working simulator. 2019-07-17 21:39:18 -04:00
Richard Cornwell
c27809c194 SEL32: Added test cases, more devices. 2019-07-17 21:39:18 -04:00
Richard Cornwell
5decc40fa5 SEL32: Initial commit. 2019-07-17 21:39:18 -04:00