Romain Dolbeau
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d2cc1412c2
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reindent
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2021-01-09 16:05:10 -05:00 |
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Romain Dolbeau
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91b6e04f92
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drop some old commented-out stuff
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2021-01-09 16:04:08 -05:00 |
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Romain Dolbeau
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ff3e2deeb6
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Add a secondary driver for a pretend-trng (it's a prng at this stage, the trng I found won't synthesize)
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2021-01-09 15:57:03 -05:00 |
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Romain Dolbeau
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f3ac0898ba
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PROM with a second device (not yet in HW), by abusing the tokenizer a bit (OF doesn't behave as OBP2 for siblings)
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2021-01-09 14:02:29 -05:00 |
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Romain Dolbeau
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007add0015
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new device name, trying to figure out how to have siblings device in the PROM
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2021-01-09 13:37:43 -05:00 |
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Romain Dolbeau
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cc18210794
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more constants, more room for the prom
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2021-01-09 12:12:10 -05:00 |
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Romain Dolbeau
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753ddd3106
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DMA for cbc decrypt
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2021-01-09 11:48:27 -05:00 |
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Romain Dolbeau
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20fbac086c
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PIO decrypt of CBC
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2021-01-09 09:02:43 -05:00 |
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Romain Dolbeau
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8e27ed97e6
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pipeline AES DMAs
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2021-01-09 08:17:46 -05:00 |
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Romain Dolbeau
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140fb92032
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split AES DMA in two control registers (for future pipelining?)
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2021-01-09 07:22:13 -05:00 |
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Romain Dolbeau
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58bcaeec5a
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constant-ify
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2021-01-09 06:35:17 -05:00 |
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Romain Dolbeau
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54a2fabe4f
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make AES asynchronous behind a couple FIFOs, now running at 120 MHz
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2021-01-04 10:18:21 -05:00 |
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Romain Dolbeau
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ccdbf0c454
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add timing constraints for master signals
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2021-01-09 05:12:39 -05:00 |
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Romain Dolbeau
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92b48ce7e1
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encdec signal for AS (unused)
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2021-01-09 04:58:27 -05:00 |
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Romain Dolbeau
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a80fed802a
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fix multi-session
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2021-01-03 10:13:45 -05:00 |
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Romain Dolbeau
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766b7d1e06
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try multi-sessions; there could be a race condition for keys, and device is too busy leading to failure...
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2021-01-03 07:59:09 -05:00 |
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Romain Dolbeau
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0e570cc871
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aes-256-cbc
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2021-01-03 06:44:15 -05:00 |
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Romain Dolbeau
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6e3bf32634
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Move CTRLs registers around, add 4 key registers/preliminary HW support for AES256
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2021-01-03 06:12:29 -05:00 |
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Romain Dolbeau
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cec1eae5e5
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rename fifo to uart
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2020-12-22 11:07:57 -05:00 |
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Romain Dolbeau
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2001f54c45
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Move the AES block to https://github.com/secworks/aes (slower at this time, but has decrypt & 256 bits support)
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2020-12-22 09:48:13 -05:00 |
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Romain Dolbeau
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2eba35f890
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DMA busmaster AES-128-CBC
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2020-12-22 06:24:42 -05:00 |
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Romain Dolbeau
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7992fd2b94
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cleanup
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2020-12-21 11:13:22 -05:00 |
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Romain Dolbeau
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55b8b7697e
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enable the XOR in HW for CBC mode, some R/W protect on registers
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2020-12-21 09:03:57 -05:00 |
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Romain Dolbeau
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0f737c1064
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switch driver code to basic aes128-cbc support, where openssl and devcrypto are in agreement
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2020-12-21 06:59:44 -05:00 |
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Romain Dolbeau
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c7ecb4b128
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Having a go at basic opencrypto/aes-ctr support, but it seems OpenSSL and /dev/crypto disagree on the interface :-(
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2020-12-21 05:27:36 -05:00 |
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Romain Dolbeau
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8afe45ea54
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Adding basic AES support (using AES block from https://github.com/mbgh/aes128-hdl)
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2020-12-20 11:19:25 -05:00 |
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Romain Dolbeau
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1b25261073
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Merge branch 'main' of github.com:rdolbeau/SBusFPGA into main
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2020-12-19 07:21:42 -05:00 |
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Romain Dolbeau
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b7244a4060
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unify LED register with others
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2020-12-19 05:59:07 -05:00 |
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Romain Dolbeau
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d1aa7748ea
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new prom
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2020-12-18 19:55:22 +01:00 |
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Romain Dolbeau
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fe5f869db0
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new prom
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2020-12-18 13:50:08 -05:00 |
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Romain Dolbeau
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d5a5041562
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larger DMA burst (Burst16 disabled, as it doesn't work on the SS20, presumably hitting the limit of the 'up-burst-sizes' attribute https://mail-index.netbsd.org/port-sparc/2020/12/18/msg002291.html)
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2020-12-18 12:47:33 -05:00 |
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Romain Dolbeau
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75d40d76c1
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add soe rigidity
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2020-12-18 16:55:44 +01:00 |
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Romain Dolbeau
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62198d5494
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12 bits of blocks in GCM DMA
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2020-12-18 10:15:05 -05:00 |
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Romain Dolbeau
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6d4235c794
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only alloc/map/load once per write()
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2020-12-18 09:38:09 -05:00 |
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Romain Dolbeau
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9a5892be71
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disable tracing
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2020-12-18 09:25:17 -05:00 |
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Romain Dolbeau
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92c7751290
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basic DMA support
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2020-12-18 07:28:30 -05:00 |
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Romain Dolbeau
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10447bb7ec
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master mode: 1 cycle delay between receiving ACK and reading data...
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2020-12-18 07:13:34 -05:00 |
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Romain Dolbeau
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7cbd2d68a6
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ultra-preliminary support for a bus master DMA)
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2020-12-17 07:18:13 -05:00 |
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Romain Dolbeau
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1bec4569ec
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add some extra registers for potential DMA
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2020-12-16 09:37:54 -05:00 |
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Romain Dolbeau
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eb473454ce
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Improve reset (?), add IOBUF on some signals that are INOUT when including 'master' mode (but not yet Extended Transfer for which 'master' is a pretty much a prerequisite)
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2020-12-16 09:10:18 -05:00 |
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Romain Dolbeau
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d1e36d05da
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more comments
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2020-12-16 05:22:50 -05:00 |
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Romain Dolbeau
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d696ae0209
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signal comment
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2020-12-16 05:17:30 -05:00 |
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Romain Dolbeau
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04284d7f6f
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change ROM 'LEDs show that the board has been probed'
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2020-12-16 05:03:14 -05:00 |
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Romain Dolbeau
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71b1995dea
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cleanup
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2020-12-16 04:55:32 -05:00 |
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Romain Dolbeau
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3738909f37
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LEDs show that the board has been probed
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2020-12-16 10:15:37 +01:00 |
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Romain Dolbeau
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0d2fce0146
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disable COUNTER25 heartbeat, remove superfluous state in the FSM (detecting ACK is handled by a variable instead)
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2020-12-15 06:23:14 -05:00 |
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Romain Dolbeau
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b39f32afb7
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finish rename
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2020-12-14 13:30:32 +01:00 |
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Romain Dolbeau
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f8e6de242b
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fix names, add new picture
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2020-12-14 13:29:00 +01:00 |
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Romain Dolbeau
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04a01f564c
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Update README.md
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2020-12-14 12:57:00 +01:00 |
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Romain Dolbeau
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0d2f75c7a6
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Add write() support for I, much faster than going through ioctl 16 bytes at a time...
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2020-12-13 18:17:59 +01:00 |
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