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2026-02-27 16:53:01 +00:00
f4c5c0e5b7
Merge branch 'V1_3' of github.com:rdolbeau/SBusFPGA into V1_3
2023-10-07 12:45:33 +02:00
648a64a697
upd for V1.3
2023-10-07 12:45:13 +02:00
7448fb851e
missing connection (no impact, connected elsewhere)
2023-10-07 11:38:44 +02:00
c41b655d40
cleanup, missing accel in do
2023-09-23 10:07:51 +02:00
da84b93d23
details
2023-09-23 08:42:25 +02:00
eb383471ed
minor upd
2023-09-21 22:12:34 +02:00
f1b0b79c3d
fixes
2023-08-21 22:08:34 +02:00
ac1654f8f8
logo
2023-09-20 22:17:32 +02:00
536ca47dbd
more V1.3
2023-09-19 22:03:41 +02:00
504a25bd0f
thinking about a V1.3
2023-09-17 20:12:59 +02:00
e76af06299
license
2023-09-16 15:09:37 +02:00
c4717d4bd6
add preliminary support for PROM-in-flash-NOR using a custom PMod
2023-02-26 13:19:09 +01:00
a60b731d72
typos
2022-12-11 14:37:23 +01:00
e7089c961d
update common
2022-11-18 17:37:15 +01:00
f0301444ba
update readme
2022-11-18 17:35:50 +01:00
04d65aedb3
update
2022-11-18 16:43:20 +01:00
fa2108e074
Fix support for USB, I2C in updated Litex & submodules
2022-11-18 09:56:14 +01:00
9d6e3c075e
Fix support for USB, I2C in updated Litex & submodules
2022-11-18 09:54:29 +01:00
260f513e2c
commit patch for newer Litex
2022-11-04 09:52:03 +01:00
a25adb4ed7
update common
2022-11-01 09:10:54 +01:00
a148f8982d
update common
2022-10-31 17:04:42 +01:00
c8656537bd
wb_master moved to common
2022-10-31 16:51:56 +01:00
02b1b7fced
move blit_goblin to common
2022-10-31 16:38:07 +01:00
b47cc4a54e
more stuff moved to common
2022-10-31 15:58:54 +01:00
6435c0ee01
move to shared goblin
2022-10-31 15:49:20 +01:00
a34da1a326
move some files to a new common submodules
2022-10-31 15:38:25 +01:00
b4872b4602
fix sdram irq polarity (to align with NuBusFPGA modifications)
2022-10-31 15:12:07 +01:00
8c2cee307b
typoe
2022-10-31 15:11:30 +01:00
deb604ee26
more define for HW accel (only used by X11)
2022-10-31 15:11:18 +01:00
d021cf7a20
missing files?
2022-10-09 12:44:34 +02:00
d133e95ca6
named parameters for more compatibility
2022-10-09 12:09:03 +02:00
c8a8ddeedb
IRQ update for NuBusFPGA, TBC w/ SBusFPGA
2022-10-08 18:21:59 +02:00
0bd3099e40
fix (probably partial) to support SS IPX (and probably other similar sun4c)
2022-09-03 11:28:42 +02:00
cf6460029e
comments for burst_size
2022-09-03 11:27:47 +02:00
4c6157d4b5
For some reason, the dkdriver needs open/close otherwise we can't mount / when booting from sdcard
2022-09-03 11:27:06 +02:00
500c0113f4
byte-swap the FB
2022-08-27 10:21:27 +02:00
013f4ae853
debug stuff cleanup
2022-08-27 08:30:56 +02:00
e7509d40ca
more bugfixes for EXA
2022-08-21 15:20:44 +02:00
232c53f1ee
more bugfixes for EXA
2022-08-21 15:05:38 +02:00
64e158e496
Stuff for exa/composite support in X11 (SBusFPGA only for now)
2022-08-20 18:55:25 +02:00
732a0bfb4b
some EXA fix (off-screen solid) ; still an issue in the copy code (could be firmware?)
2022-08-15 16:36:41 +02:00
15a593f44e
preliminary EXA support for new Goblin Accel ; still some issues
2022-08-15 14:59:13 +02:00
6767363415
Replace engine-based Jareth by VexRiscv-based 'Jareth' based on NuBusFPGA's goblin accel; also shorten some Forth name to avoid namespace issues.
2022-08-15 10:28:39 +02:00
cd03241fc6
vmsize in MiB not KiB (thread at http://mail-index.netbsd.org/port-sparc/2022/02/27/msg002432.html )
2022-07-24 11:22:11 +02:00
b2377276b2
rename blit to blit_cg6
2022-07-23 12:51:43 +02:00
a90021072c
non-hardwired clock domain (for NuBusFPGA)
2022-07-23 12:50:41 +02:00
c5efbba648
missing commits
2022-06-26 09:44:08 +02:00
5b26ac9c25
optional delay on WDCM
2022-06-26 09:43:03 +02:00
c4e5d16597
fix fill when leftovers are 16 aligned bytes
2022-04-01 19:11:16 +02:00
8797571de8
push masking from registers to stores
2022-03-27 19:32:28 +02:00
f5822c8385
forward port HW cursor from cg6, still some issues (sw or hw???) + untested sw fix
2022-03-20 09:24:48 +01:00
938d931e51
more jareth
2022-03-18 23:00:03 +01:00
d8504c8713
more aceel
2022-03-16 23:27:07 +01:00
a75b2a2d18
more EXA
2022-03-14 23:13:46 +01:00
be6101d39d
more jareth-with-goblin
2022-03-13 14:44:42 +01:00
936736d35a
16 MiB for Goblin
2022-03-13 07:59:30 +01:00
fb9cbeb165
brz to brz32, erasecols in console
2022-03-12 13:32:29 +01:00
798a4975c0
add direct memory access support to Jareth UnitLS
2022-03-12 13:05:55 +01:00
12ea2bc18b
goblin+jareth console HW scrolling, cleanup
2022-03-12 10:39:50 +01:00
a87e7eaa6b
first go at jareth-with-goblin
2022-03-11 23:02:43 +01:00
9ee9bcd692
preliminary goblin X11
2022-03-08 23:24:38 +01:00
c9f08f0dee
preliminary goblin
2022-03-08 22:55:27 +01:00
dd3d1caeff
working on goblin
2022-03-06 19:22:06 +01:00
68b81d91b8
first go at jareth vector engine
2022-03-06 15:17:02 +01:00
ff212ded91
fix i2c support
2022-02-25 22:28:48 +01:00
def3e5e8ae
ignore OLD stuff
2022-01-29 11:24:45 +01:00
f81e4fedcd
oups, forgotten files for DDR3 hardware initializer based on gist 529a4d9994f0cc95e45382e4eb253b09-3c8bb9c1f4528ccb0c0ef603d66f05b1470e8056
2022-01-29 11:23:23 +01:00
543cc9d2e1
git ignore
2022-01-29 11:17:10 +01:00
d753f0ad3a
oups, missing file
2022-01-29 11:15:10 +01:00
9ae081ed19
preliminary i2c support via the OC I2C ctrl & betrustedio wrapper
2022-01-29 10:52:05 +01:00
8f017f5b92
improve backplate
2022-01-29 10:49:35 +01:00
3e7bd4c8ab
fix sdram prom config fix, drop DMA from the sdram DMA and talk to a native SDRAM port instead
2022-01-26 22:45:22 +01:00
9ff265446d
fix sdram prom config for 90 MHz sysclk
2022-01-25 23:13:57 +01:00
fa5401fb00
update README
2022-01-08 10:41:38 +01:00
479b976567
changes to be able to test cg3/cg6 support with original PROM contents
2022-01-08 10:34:34 +01:00
7fb915237d
add support for alu/mode used by 501-2253/2325 PROMs
2022-01-08 10:30:59 +01:00
2aec1af733
Merge branch 'main' of github.com:rdolbeau/SBusFPGA into main
2021-12-19 18:50:39 +01:00
43efe14afb
Simple model of SBus retainer
2021-12-19 18:50:32 +01:00
6e7bb3b1e3
Emulate a bw2 FB, mostly to test feasibility of 1bpp FB in Litex
2021-12-18 11:30:45 +01:00
d95a233268
record/layour for cmap/omap
2021-12-05 09:31:50 +01:00
45292aea6f
layout for dma_blk fifo (instead of raw offsets)
2021-12-04 15:56:59 +01:00
56586bcdf1
upd readme
2021-11-20 08:38:37 +01:00
429697db18
minor details, more non-working intr code
2021-11-20 08:38:03 +01:00
802d8118c5
better sd(ram|card) drivers
2021-11-19 21:27:38 +01:00
c9fbaf61f8
various updates, and prom driver for sdcard
2021-11-17 19:19:32 +01:00
a3d210b27f
can't get async (interrupt-based) sdram driver to work
2021-11-14 15:28:40 +01:00
a944704ef4
sdcard, interrupt line on sdram
2021-11-13 12:42:18 +01:00
94c36e7a36
fb stuff
2021-11-13 12:41:37 +01:00
42f39c846f
drop V1.0
2021-11-13 12:41:05 +01:00
334759951b
cleanup, preliminary sdcard driver
2021-11-13 12:40:34 +01:00
893e5a7c67
Merge branch 'main' of github.com:rdolbeau/SBusFPGA into main
2021-11-13 12:05:05 +01:00
f6b7dcaba3
upd backplate
2021-11-13 12:04:26 +01:00
3af873fdb7
add remove functions, doesn't help
2021-11-07 08:52:56 +01:00
98ba64beda
cleanup
2021-11-07 08:52:16 +01:00
479c780b27
cleanup
2021-11-06 10:21:59 +01:00
87687de1ea
comment
2021-11-06 10:19:07 +01:00
3c96a56dfb
fix checksum-less building
2021-11-06 10:18:23 +01:00
ef9d16507b
use fth cst
2021-11-06 10:18:02 +01:00
35dee425e9
typo fix
2021-11-06 10:17:51 +01:00
d7d1772a48
Add sext.b to Vex, as some are generated in -O2/-O3 (none in -Os)
2021-11-01 15:23:27 +01:00
Romain Dolbeau