github.com/rdolbeau.VintageBusFPGA_Common
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413b7beec51f58444c57b6021774afa4468c888d
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9 Commits

Author SHA1 Message Date
Romain Dolbeau
8d7ad20ac5 DDR2 support in HW init 2026-03-25 22:59:33 +01:00
Romain Dolbeau
92ff9831fe more oups python.... 2023-11-18 15:53:10 +01:00
Romain Dolbeau
a3b1143bef oups python.... 2023-11-18 15:48:24 +01:00
Romain Dolbeau
81bf3835a1 common sdram_init 2023-11-18 11:58:50 +01:00
Romain Dolbeau
42c44bb35a common sdram_init 2023-11-18 11:58:15 +01:00
Romain Dolbeau
ad54db78be common sdram_init 2023-11-18 11:54:56 +01:00
Romain Dolbeau
9266948658 common sdram_init 2023-11-18 11:54:09 +01:00
Romain Dolbeau
31ed3afcba common sdram_init 2023-11-18 11:53:08 +01:00
Romain Dolbeau
30ae9af57a common sdram_init 2023-11-18 11:51:29 +01:00