While working on the AltairZ80 documentation, I found some problems
with the SOL20 registers and fixed some formatting issues.
Added static and "vdm1_" prefix to "charset" variable in s100_vdm1.c
This PR adds support for the Processor Technology VDM-1 display adapter and Sol-20 computer system. The VDM-1 was integrated into the Sol-20 but has been separated out into its own device.
This PR adds the following devices to the AltairZ80 simulator:
VDM1 - Processor Technology VDM-1 display adapter
SOL20 - Processor Technology SOL20 with SOLOS ROMs
SOL20K - SOL20 Keyboard (callback from VDM1)
SOL20T - SOL20 Tape (reads/writes cassette file images)
SOL20S - SOL20 Serial Port (TMXR capable)
SOL20P - SOL20 Printer Port (TMXR capable)
This corrects an error that caused SIO reject when SIO occured before
a pending seek interrupt on a different device.
- Move the interrupt pending test from sigma_io.c into each device.
- Make the sigma_dp.c test a special case that looks for pending
seek interrupts.
Used to initialize SCP timers to prevent problems during simulator startup
when THROTTLE is being used.
/*
* This sequence of instructions is a mix that mimics
* a resonable instruction set that is a close estimate
* to the calibrated result.
*/
static const char *cpu_clock_precalibrate_commands[] = {
"-m 100 LXI H,200H",
"-m 103 MVI B,0",
"-m 105 DCR B",
"-m 106 MOV M,B",
"-m 107 INX H",
"-m 108 JNZ 0105H",
"-m 10B JMP 0100H",
"PC 100",
NULL};
- Add common system includes used in may places which are allowed
and thus added directly in sim_defs.h.
- Separate completely private system data structures and system APIs
for use only by SCP library routines into sim_scp_private.h.
Proper initialization of the ADCS6 unit data structure depended on the
ADCS6 device being enabled. In cases where the ADCS6 unit was not
enabled, non-debug builds may crash on some host platforms depending on
compiler/memory layout.
- uncalibrated clock mode executes at a precisely specified instruction
rate relative to pseudo wall clock time independent of the host
computer's speed or other loads on the host system.
- Provide additional failure state if/when diagnostics fail.
Experimentation with the SDS 9 Series Algol compiler found a problem in
the card reader.
The Algol card input function reads a complete card with the usual EOM
and WIM loop followed by a disconnect EOM.
A final service is requested after the last column is read to signal
that the card has passed through the reader. If the disconnect EOM
occurs before this service, it cancels it and shuts down the request
as it ought to. However, the disconnect EOM does not reset the status
READING flag and a subsequent Reader Ready Test fails and loops waiting
for the disconnected reader to become ready.
This change fixes the disconnect EOM case to reset the uptr->STATUS and
end of record flag, cr_eor.
- Run simulator with clock calibration disabled so that execution rate
is 1 Mips which the vax ROM diags (the Power up self test) expects
when running from ROM.
- Record test information in the debug file when debugging.
- Add separate mutex serializing debug writes
- Change panel destructor to clear panel on successful destruction.
- Debug status info during shutdown/destruction.
- Request number tracking provided in request and response debug output.
- All relevant thread ids recorded to help debug deadlocks.
- Add debug abort interface to close debug file.
- Reliably detect transitions to HALT state
- When in the middle of a transition to HALT state, avoid calling any
display callback to avoid deadlocks which can occur if the callback
invokes a subsequent dialog with the simulator.
- More robustly capture the reason for the simulator HALTing.
- Avoid register list updates in the callback thread unless in the HALT state.
- Fix potential buffer overrun while pending remote command actions
- Add debug abort interface to close debug file
- Flush partially read command line on EOF
- Flush partially read command line when WRU HALTs execution and switches
to multi-command mode.
- Disable any pending repeat when WRU HALTs execution
- Also abort simulation if idle delay is crazy big which indicates a
problem that has already happened.
- Extend calibration initialization debug output to record optional ticks.
Start of support for PiDP10 front panel.
Moved interrupt checking from check_irq_level to clear_interrupt.
Pending interrupts now saved in IOB_PI.
Cleanup of KL10 Timer interrupts.
Minor code cleanup.
Asynchronous MUX functionality was added long ago and never completely
tested and thus never completed and never actually used.
All of what it was supposed to achieve was independently achieved when
bit rate speed functionality was added.
Forgot to attribute this commit to Seth Morabito <web@loomcom.com>
as author.
When the 3B2 simulator was set to allow idling, there was significant
clock drift related to the primary timer unit. It turns out that the
simulator was using `AIO_SET_INTERRUPT_LATENCY` and `sim_rtcn_tick_ack`
incorrectly. They are not needed with the structure of system timers in
the 3B2 architecture.
When the 3B2 simulator was set to allow idling, there was significant
clock drift related to the primary timer unit. It turns out that the
simulator was using `AIO_SET_INTERRUPT_LATENCY` and `sim_rtcn_tick_ack`
incorrectly. They are not needed with the structure of system timers in
the 3B2 architecture.
